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This reverts commit fde8982.
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@mawad-amd not sure how useful the changes and copy egine path for examples 07 and 10 are. I might revert those and only keep the changes for message-passing example |
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Thanks, David! I think we will want to keep the benchmark you used for your results. The message passing one would be a great introductory example. Will review this PR soon. |
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| @triton.jit | ||
| def wait_cnt(): |
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Can we move this to iris/mem/utils.py? Can we also guard for cdna3/4 and throw/return something for anything else?
Something like https://github.com/ROCm/iris/blob/main/iris/mem/utils.py#L69
| return ptr, bits | ||
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| def put( | ||
| self, |
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Use similar naming scheme to the device side one
Lines 281 to 299 in 9ff7048
| def put_tile( | ||
| self, | ||
| tile, | ||
| dst_rank: int, |
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| Args: | ||
| from_ptr (triton.PointerType, or block of dtype=triton.PointerType): Pointer in the current rank's local memory from which to read data. | ||
| to_ptr (triton.PointerType, or block of dtype=triton.PointerType): Pointer in the current rank's address space that will be translated to the `to_rank`'s address space. Must be the current rank where the pointer is local. |
| copy_engine_ctx: tl.tensor = None, | ||
| src_row_stride: tl.constexpr = 0, | ||
| dst_row_stride: tl.constexpr = 0, | ||
| USE_COPY_ENGINE: tl.constexpr = False, |
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let's just use lower case for all new arguments/constexpr
| scope=None, | ||
| hint: tl.constexpr = None, | ||
| copy_engine_ctx=None, | ||
| USE_COPY_ENGINE: tl.constexpr = False, |
| scope=None, | ||
| hint: tl.constexpr = None, | ||
| copy_engine_ctx=None, | ||
| USE_COPY_ENGINE: tl.constexpr = False, |
| "ruff", | ||
| "tritonblas @ git+https://github.com/ROCm/tritonBLAS.git@muhaawad/iris", | ||
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| "rocm-xio @ git+https://github.com/ROCm/rocm-xio.git", |
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This will likely break the simulation backend but let's merge it and see.
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