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A GPU with transformation & lighting, rasterization, texture mapping, flat shading, double buffer, z-buffer

Verilog 108 15 Updated Aug 2, 2026

wafer.space GF180MCU Run 2

Shell 7 Updated Jul 30, 2026

A compact USB HID host FPGA core supporting keyboards, mice and gamepads.

Verilog 174 33 Updated Mar 22, 2025

Compact 80386 CPU in SystemVerilog

SystemVerilog 176 14 Updated Aug 7, 2026

Topaz Computer

C 13 Updated Jul 15, 2026

Multiplayer CMOS Standard Cell Chips Reverse Engineering Tool

TypeScript 127 7 Updated Jun 12, 2026

Custom Standard Cell Library for GF180MCU process node on open PDK.

Verilog 10 1 Updated Jul 14, 2026

FreePDK45 organized in the style of the OpenPDKs

Verilog 4 1 Updated Jun 26, 2026

HeiChips 2025 Tapeout on IHP SG13G2 130nm process

Verilog 23 2 Updated Apr 10, 2026

eFuse memory compiler for GF180MCU

Python 4 2 Updated Mar 10, 2026

📸 ADCs for 100,000 FPS imaging

Python 9 Updated Aug 8, 2026

Self-contained RTL to GDS flow for simple chip designs

Python 73 3 Updated Jul 7, 2026

Parametric layout generator for digital, analog and mixed-signal integrated circuits

C 81 6 Updated Jul 28, 2026

RISC-V Zve32x, Zve32f, Zvfh Vector Coprocessor

SystemVerilog 20 15 Updated Aug 7, 2026

Split voltage (5.0V pad, 3.3V core) version of the gf180mcu I/O library

Verilog 1 3 Updated Jun 22, 2026
Rust 37 5 Updated Jul 23, 2026

A novel Design-for-Test flow using LibreLane

Python 45 3 Updated May 9, 2026

PSOC SoC code with peripherals and synthesis scripts for FPGA/ASIC

Tcl 11 1 Updated Oct 8, 2025

KLayout plugin for efficient alignments of layout objects

Python 10 2 Updated Jul 24, 2026

Curriculum for a university course to teach chip design using open source EDA tools

Jupyter Notebook 160 22 Updated Oct 21, 2023
Jupyter Notebook 152 27 Updated Jun 16, 2026

ASIC implementation flow infrastructure, successor to OpenLane

Python 502 94 Updated Aug 9, 2026

An innovative Verilog-A compiler - reloaded

Rust 45 14 Updated Jun 19, 2026

An open-source HDL register code generator fast enough to run in real time.

Python 91 15 Updated Jul 27, 2026

Project Peppercorn GateMate Test Cases

Verilog 17 8 Updated Feb 25, 2026

Open-source PDK version manager

Python 57 13 Updated Jul 9, 2026

A configurable SRAM generator

Rust 67 8 Updated Jun 28, 2026

Premier open-source RTL-to-GDSII flow

Python 4 1 Updated Apr 14, 2025

ElemRV - End-to-end Open-Source RISC-V Microcontroller

Scala 116 12 Updated Aug 6, 2026
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