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Starred repositories

25 stars written in Verilog
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Verilog Ethernet components for FPGA implementation

Verilog 2,802 800 Updated Feb 27, 2025

Open source FPGA-based NIC and platform for in-network compute

Verilog 2,094 496 Updated Jul 5, 2024

Must-have verilog systemverilog modules

Verilog 1,894 411 Updated Aug 2, 2025

Verilog AXI components for FPGA implementation

Verilog 1,889 515 Updated Feb 27, 2025

A small, light weight, RISC CPU soft core

Verilog 1,489 177 Updated Dec 8, 2025

Verilog library for ASIC and FPGA designers

Verilog 1,377 299 Updated May 8, 2024

The USRP™ Hardware Driver Repository

Verilog 1,185 729 Updated Nov 28, 2025

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Verilog 840 202 Updated Apr 15, 2020

A tiny Open POWER ISA softcore written in VHDL 2008

Verilog 707 109 Updated Dec 14, 2025

A Pi emulating a GameBoy sounds cheap. What about an FPGA?

Verilog 508 61 Updated Dec 10, 2022

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

Verilog 401 137 Updated Dec 17, 2025

🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board

Verilog 353 108 Updated Jan 14, 2022

All code found on nandland is here. underconstruction.gif

Verilog 351 76 Updated Aug 21, 2022

Recipe for FPGA cooking

Verilog 308 68 Updated Sep 29, 2024

A Verilog implementation of DisplayPort protocol for FPGAs

Verilog 263 57 Updated Mar 15, 2019

Repository for the SCALE-MAMBA MPC system

Verilog 263 84 Updated Sep 6, 2023

Fearless hardware design

Verilog 184 11 Updated Aug 20, 2025

A collection of demonstration digital filters

Verilog 162 37 Updated Jan 18, 2024

i8080 precise replica in Verilog, based on reverse engineering of real die

Verilog 159 24 Updated Jul 13, 2019

Homotopy theory in Coq.

Verilog 89 8 Updated Mar 26, 2011

PanoLogic Zero Client G1 reverse engineering info

Verilog 75 12 Updated Apr 2, 2024
Verilog 25 3 Updated Aug 11, 2021
Verilog 25 3 Updated Jan 16, 2019

Multi-threaded 32-bit embedded core family.

Verilog 24 7 Updated Jul 9, 2012

Hardware implementation of the SipHash short-inout PRF

Verilog 17 7 Updated Apr 3, 2025