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[BUG] Cross-context Zcmp expansion-state poisoning occurs when the macro decoder retains stale expansion state after a trap, corrupting subsequent privileged execution.
Component:RTLFor issues in the RTL (e.g. for files in the rtl directory)For issues in the RTL (e.g. for files in the rtl directory)Status:NewNewly created issue, nobody has looked at it yet.Newly created issue, nobody has looked at it yet.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3408 In openhwgroup/cva6;[BUG] cva6_mmu: Sv39 canonical-address check samples the unregistered request, so a non-canonical access page-faults the preceding in-flight access
Component:RTLFor issues in the RTL (e.g. for files in the rtl directory)For issues in the RTL (e.g. for files in the rtl directory)Status:NewNewly created issue, nobody has looked at it yet.Newly created issue, nobody has looked at it yet.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3404 In openhwgroup/cva6;[BUG] a non-leaf VS-stage PTE with out-of-range guest physical address raises a page-fault instead of a guest-page-fault
Component:RTLFor issues in the RTL (e.g. for files in the rtl directory)For issues in the RTL (e.g. for files in the rtl directory)Status:In ProgressWork on this issue has started, but is not complete.Work on this issue has started, but is not complete.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3401 In openhwgroup/cva6;[BUG] HLVX physical access is not checked for execute permission
Component:RTLFor issues in the RTL (e.g. for files in the rtl directory)For issues in the RTL (e.g. for files in the rtl directory)Status:NewNewly created issue, nobody has looked at it yet.Newly created issue, nobody has looked at it yet.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3400 In openhwgroup/cva6;[BUG] With mstatus.MPRV=1, MPV=1 and MPP=M, explicit accesses wrongly use VS/G-stage translation
Component:RTLFor issues in the RTL (e.g. for files in the rtl directory)For issues in the RTL (e.g. for files in the rtl directory)Status:NewNewly created issue, nobody has looked at it yet.Newly created issue, nobody has looked at it yet.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3399 In openhwgroup/cva6;[BUG] access to a VS CSR under V=1 raises a virtual-instruction exception but still commits the CSR write
Component:RTLFor issues in the RTL (e.g. for files in the rtl directory)For issues in the RTL (e.g. for files in the rtl directory)Status:NewNewly created issue, nobody has looked at it yet.Newly created issue, nobody has looked at it yet.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3398 In openhwgroup/cva6;[BUG] cv64a60ax config broken — doesn't even boot for a basic test
Component:APURTL and TB code for the corev_apuRTL and TB code for the corev_apunotCV32A65XIt is not an CV32A65X issueIt is not an CV32A65X issueStatus:NewNewly created issue, nobody has looked at it yet.Newly created issue, nobody has looked at it yet.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3397 In openhwgroup/cva6;[BUG] CVA6 reports Store/AMO page fault for LR.W instead of Load page fault
Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3394 In openhwgroup/cva6;[BUG] VCU118 constraint file, TX and RX reversed for UART
Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3392 In openhwgroup/cva6;[BUG] AMO to invalid physical address retires without raising Store/AMO access fault
Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3390 In openhwgroup/cva6;[BUG] HLV load misses a preceding store and reads stale data after a TLB-miss retry
Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3389 In openhwgroup/cva6;[BUG] csr_regfile: dcsr.prv is not WARL-legalized on write; dret can set priv_lvl to an unimplemented encoding (2'b10)
Component:RTLFor issues in the RTL (e.g. for files in the rtl directory)For issues in the RTL (e.g. for files in the rtl directory)Status:In ProgressWork on this issue has started, but is not complete.Work on this issue has started, but is not complete.Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemStatus: Open.#3383 In openhwgroup/cva6;