Popular repositories Loading

1. Surelog Surelog Public

   Forked from chipsalliance/Surelog

   SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

   C++ 26 3

2. UHDM UHDM Public

   Forked from chipsalliance/UHDM

   Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format …

   C++ 19 2

3. uhdm2rtlil uhdm2rtlil Public

   Yosys SystemVerilog Parser - UHDM 2 RTLIL Yosys Pass. Highest ranking complex SystemVerilog 2 functional gate-level netlist flow for Yosys compilation

   IL Assembly 6 1

4. Help_Wanted Help_Wanted Public

   Ideas that need engineering-power from the community for UHDM/Surelog/Related topics

   2

5. yosys-uhdm-plugin-integration yosys-uhdm-plugin-integration Public

   Forked from chipsalliance/synlig

   Python 2

6. verilator verilator Public

   Forked from antmicro/verilator-old-archived

   C++