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written in VHDL
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Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.
ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.
Super Resolution Convolutional Neural Network (SRCNN) for Python/Torch, Numpy and Avnet's ZedBoard
Benchmarking execution time of AlexNet CNN on FPGA and GPU. Developed AlexNet in opencl.