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Terminal file manager

Go 9,171 363 Updated Mar 24, 2026

PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 4,052 916 Updated Jun 27, 2024

List of awesome open source hardware tools, generators, and reusable designs

Python 2,290 221 Updated Mar 2, 2026

A modern hardware definition language and toolchain based on Python

Python 1,957 195 Updated Mar 16, 2026

HDL libraries and projects

Verilog 1,882 1,637 Updated Mar 24, 2026

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Python 1,726 419 Updated Sep 15, 2025

Official git repository of Elmer FEM software

Fortran 1,526 371 Updated Mar 24, 2026

100kHz to 6GHz 2 port USB based VNA

C++ 1,488 259 Updated Mar 6, 2026

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

Python 1,140 237 Updated Feb 26, 2026

KLayout Main Sources

C++ 1,069 266 Updated Mar 23, 2026

A Python library for designing chips (Photonics, Analog, Quantum, MEMS), PCBs, and 3D-printable objects. We aim to make hardware design accessible, intuitive, and fun—empowering everyone to build t…

Python 883 369 Updated Mar 24, 2026

IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

Shell 802 125 Updated Mar 24, 2026

Project F brings FPGAs to life with exciting open-source designs you can build on.

SystemVerilog 756 71 Updated Jan 28, 2026

130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:

HTML 697 137 Updated Mar 24, 2026

BaseJump STL: A Standard Template Library for SystemVerilog

SystemVerilog 654 113 Updated Jan 19, 2026

PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).

Makefile 475 64 Updated May 31, 2023

3D finite element solver for computational electromagnetics

C++ 473 95 Updated Mar 25, 2026

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

C 451 40 Updated Mar 25, 2026

GDS3D is an application that can interpret so called IC layouts and render them in 3D. The program accepts standard GDSII files as input data. Along with the layout file, it requires a so called pr…

C++ 247 40 Updated Aug 20, 2024

Python interface to OpenEMS, for PCB trace simulation. Accepts Gerber files as input. Features automatic grid generation and postprocessing.

Python 215 29 Updated Feb 11, 2026

A simple RISC V core for teaching

SystemVerilog 202 24 Updated Dec 30, 2021

An innovative Verilog-A compiler

Rust 183 35 Updated Aug 20, 2024

The Xyce™ Parallel Electronic Simulator

C 121 16 Updated Feb 23, 2026

Verilog-A simulation models

Pascal 94 19 Updated Feb 24, 2026

Hardware Design Tool - Mixed Signal Simulation with Verilog

Python 90 7 Updated Dec 18, 2024

Blender GDSII Importer with PDK Support

Python 85 9 Updated Feb 22, 2026

Development repository for electromagnetics tutorial and verification cases

Python 70 25 Updated Apr 10, 2025

Raw data collected about the SKY130 process technology.

Jupyter Notebook 63 18 Updated May 7, 2023
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