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A collection of my XR prototypes as apk files for Meta Quest devices.

253 24 Updated Nov 13, 2025

A GPU with transformation & lighting, rasterization, texture mapping, flat shading, double buffer, z-buffer

Verilog 48 8 Updated Dec 25, 2025

Parsing gigabytes of JSON per second : used by Facebook/Meta Velox, the Node.js runtime, ClickHouse, WatermelonDB, Apache Doris, Milvus, StarRocks

C++ 23,004 1,195 Updated Dec 23, 2025
JavaScript 1 Updated Sep 15, 2025

New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi standard. Supports DDR and SRD tranfser!

F# 104 13 Updated Aug 28, 2025

ngscopeclient and other client applications for libscopehal.

C++ 797 140 Updated Dec 14, 2025

Towards an Automated Triple Modular Redundancy (TMR) EDA flow for Yosys.

C++ 8 Updated Aug 9, 2025

An open source GPU based off of the AMD Southern Islands ISA.

Verilog 1,269 260 Updated Aug 18, 2025
JavaScript 15 2 Updated Jun 30, 2025

A Risc-V SoC for Tiny Tapeout

Python 43 9 Updated Dec 2, 2025

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

Python 3,356 435 Updated Oct 28, 2024
Python 8 2 Updated Jan 12, 2025

Python to Verilog compiler

Python 6 2 Updated Dec 21, 2025

An ECP5 FPGA Dev Board in a Pi Zero form

HTML 715 25 Updated Dec 1, 2025

Build your hardware, easily!

C 3,651 674 Updated Dec 20, 2025

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our d…

Verilog 1,292 32 Updated Dec 24, 2025

The complete codebase for Frame

C 1 Updated May 1, 2025

RISC-V XV6/Linux SoC, marchID: 0x2b

Verilog 1,005 70 Updated Nov 28, 2025

Open Logic FPGA Standard Library

VHDL 836 90 Updated Dec 21, 2025

Vitis HLS LLVM source code and examples

403 58 Updated Sep 30, 2025

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

SystemVerilog 1,150 130 Updated Nov 22, 2024

A minimal GPU design in Verilog to learn how GPUs work from the ground up

SystemVerilog 9,002 704 Updated Aug 18, 2024

👾 Complete Quartus Project for FPGA-based-3D-renderer

Verilog 16 1 Updated Jul 13, 2021

Machine learning on FPGAs using HLS

Python 1,745 504 Updated Dec 22, 2025

Вектор-06ц в ПЛИС / Vector-06c in FPGA

Verilog 43 8 Updated Oct 22, 2024

Open source machine learning accelerators

Scala 393 32 Updated Mar 24, 2024

Project F brings FPGAs to life with exciting open-source designs you can build on.

SystemVerilog 737 68 Updated Jan 22, 2025

Scan QR-codes with your Monocle!

Python 7 1 Updated Jan 13, 2024
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