Skip to content
View dpavlin's full-sized avatar

Organizations

@koreader

Block or report dpavlin

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
31 results for source starred repositories written in VHDL
Clear filter

VHDL 2008/93/87 simulator

VHDL 2,673 396 Updated Nov 5, 2025

GPL v3 2D/3D graphics engine in verilog

VHDL 681 145 Updated Aug 31, 2014

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

VHDL 402 109 Updated Nov 14, 2018

An implementation of DisplayPort protocol for FPGAs

VHDL 299 50 Updated May 19, 2016

Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.

VHDL 274 41 Updated Apr 6, 2025

The Zylin ZPU

VHDL 244 32 Updated Apr 21, 2015

VHDL library 4 FPGAs

VHDL 181 24 Updated Nov 4, 2025

Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC

VHDL 110 14 Updated Oct 18, 2016

implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture

VHDL 107 19 Updated Jun 23, 2018

Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project

VHDL 106 26 Updated Jan 10, 2016

A repository of IPs for hardware computer vision (FPGA)

VHDL 97 40 Updated Oct 21, 2015

ZPUino HDL implementation

VHDL 90 54 Updated Aug 6, 2018

Verilog library for developing robotics applications using FPGAs

VHDL 72 13 Updated Jul 14, 2024

A simple I2C minion in VHDL

VHDL 61 31 Updated Nov 2, 2019

A highly-configurable and compact variant of the ZPU processor core

VHDL 36 11 Updated Sep 12, 2015

Library of reusable VHDL components

VHDL 28 5 Updated Mar 7, 2024

RGB video input for Altera DE1 board + PAL Modulator

VHDL 27 5 Updated May 15, 2023

Connecting FPGA and MCU using Ethernet RMII

VHDL 23 16 Updated Jan 23, 2016

J-core SOC for ice40 FPGA

VHDL 20 3 Updated Dec 8, 2019

Hardware RNG for Papilio One based on the original Whirlygig

VHDL 20 3 Updated Apr 6, 2018

VHDL simulation model for PADAUK PDK microcontrollers

VHDL 19 2 Updated May 20, 2020

K1208 A1200 fastmem board CPLD logic

VHDL 16 Updated May 5, 2018

VHDL Code for infrastructural blocks (designed for FPGA)

VHDL 15 2 Updated Oct 26, 2022

FPGA digital camera controller and frame capture device in VHDL

VHDL 15 12 Updated Feb 11, 2013

Interfacing OV7670 Camera module to miniSpartan6+

VHDL 12 8 Updated Feb 11, 2015

HDMI capture

VHDL 5 2 Updated Jul 8, 2013

Attempt porting parts of mister C64 to ULX3S

VHDL 5 1 Updated Apr 4, 2024

Somewhere to place some test / demo projects as I explore the use of Yosys / Trellis / NextPnR with IceSugar-Pro

VHDL 5 1 Updated May 31, 2022

VHDL examples for the Ulx3s ECP5 FPGA

VHDL 3 1 Updated May 7, 2022
Next