SERV - The SErial RISC-V CPU

A small, light weight, RISC CPU soft core

A minimal tensor processing unit (TPU), inspired by Google's TPU V2 and V1

An open source SPI flash emulator and monitor

FPGA-based Nintendo Entertainment System Emulator

Compact FPGA game console

Spatial: "Specify Parameterized Accelerators Through Inordinately Abstract Language"

XCrypto: a cryptographic ISE for RISC-V

A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems