ADC Improvements - #6360
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bjoernQ wants to merge 2 commits into
Open
ADC Improvements#6360bjoernQ wants to merge 2 commits into
bjoernQ wants to merge 2 commits into
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bjoernQ
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bugadani
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| // The diff is signed and subtracted from the attenuation-0 reference point, so a negative | ||
| // diff raises the code. | ||
| let code11 = if diff_code11 & (1 << 5) != 0 { | ||
| code0 + (diff_code11 & 0x1f) | ||
| } else { | ||
| code0 + diff_code11 | ||
| code0 - diff_code11 | ||
| } - 123; |
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This should probably be extracted into an n-bit signed subtraction, I think this isn't the only place we use something similar?
bugadani
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Sep 22, 2026
| // This chip does not follow the ESP32-C6 layout: there are no reference-connect | ||
| // bits, and the ground-connect bits live in register 8. | ||
| // | ||
| // See <https://github.com/espressif/esp-idf/blob/v6.1/components/soc/esp32c5/include/soc/regi2c_saradc.h> |
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Keep the link, drop the comment. The chip also doesn't follow a bunch of other things, calling out C6 is a sort of "why I'm changing this" comment, not something that needs to be kept. LLMs do this way too much.
bjoernQ
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September 22, 2026 15:54
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Tester: https://github.com/bjoernQ/adc-foo
This aligns the ADC implementation with what is found in ESP-IDF (6.1)
The tester now shows numbers very close between ESP-IDF and this branch. (i.e. deviations in the same range as multiple runs of the IDF tester, with the exception of S31: Rust reads about 0.35% higher than IDF
, lets dig into that in a follow up given the current support status of S31). The same raw values result in the same calibrated reads.
Changelog
esp-hal
adc::AdcCalSourceandAdcCalScheme::adc_cal.