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snitch_cluster Public
Forked from pulp-platform/snitch_clusterAn energy-efficient RISC-V floating-point compute cluster.
C Apache License 2.0 UpdatedJul 8, 2026 -
bender Public
Forked from pulp-platform/benderA dependency management tool for hardware projects.
Rust Apache License 2.0 UpdatedJun 5, 2026 -
FlooNoC Public
Forked from pulp-platform/FlooNoCA Fast, Low-Overhead On-chip Network
SystemVerilog Apache License 2.0 UpdatedJun 5, 2026 -
PeakRDL Public
Forked from SystemRDL/PeakRDLControl and status register code generator toolchain
Python GNU Lesser General Public License v3.0 UpdatedApr 16, 2026 -
cheshire Public
Forked from pulp-platform/cheshireA minimal Linux-capable 64-bit RISC-V SoC built around CVA6
Verilog Other UpdatedApr 8, 2026 -
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typst-packages Public
Forked from typst/packagesPackages for Typst.
Rust Apache License 2.0 UpdatedMar 30, 2026 -
cva6-sdk Public
Forked from pulp-platform/cva6-sdkCVA6 SDK containing RISC-V tools and Buildroot
Makefile UpdatedJan 14, 2026 -
barchitecture Public
Hierarchical break down plots for architectures
Python Apache License 2.0 UpdatedNov 26, 2025 -
DRAMSys Public
Forked from tukl-msd/DRAMSysDRAMSys a SystemC TLM-2.0 based DRAM simulator.
C++ Other UpdatedMar 19, 2024 -
occamy Public
Forked from pulp-platform/occamyA high-efficiency system-on-chip for floating-point compute workloads.
Python Apache License 2.0 UpdatedMar 6, 2024 -
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snitch Public
Forked from pulp-platform/snitchLean but mean RISC-V system!
SystemVerilog Apache License 2.0 UpdatedMar 22, 2023 -
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dummy_vip Public
Forked from pulp-training/dummy_vipFiles for the IP Integration Exercise
SystemVerilog UpdatedDec 17, 2020 -
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