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3 stars written in SystemVerilog
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AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

SystemVerilog 1,704 374 Updated Sep 17, 2026

Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous platforms.

SystemVerilog 452 125 Updated Sep 18, 2026

Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs

SystemVerilog 104 34 Updated Jan 28, 2025