-
07:16
(UTC -07:00) - https://itsruthwik.github.io/
- in/itsruthwik
-
WDSFPGA-benchmark-template Public
Forked from WDSFPGA/WDSFPGA-benchmark-templateVerilog UpdatedDec 13, 2025 -
OpenFPGA Public
Forked from lnis-uofu/OpenFPGAAn Open-source FPGA IP Generator
Verilog MIT License UpdatedDec 3, 2025 -
PandA-bambu-V Public
Forked from ferrandi/PandA-bambuPandA-bambu public repository
C++ GNU General Public License v3.0 UpdatedNov 29, 2025 -
caravel_user_project Public template
Forked from chipfoundry/caravel_user_projectVerilog Apache License 2.0 UpdatedNov 29, 2025 -
openframe_user_project Public template
Forked from chipfoundry/openframe_user_projectVerilog Apache License 2.0 UpdatedNov 28, 2025 -
-
-
-
vtr-verilog-to-routing Public
Forked from verilog-to-routing/vtr-verilog-to-routingVerilog to Routing -- Open Source CAD Flow for FPGA Research
C++ Other UpdatedApr 18, 2025 -
-
-
mflowgen Public
Forked from mflowgen/mflowgenmflowgen -- A Modular ASIC/FPGA Flow Generator
Python BSD 3-Clause "New" or "Revised" License UpdatedJan 23, 2025 -
skywater-pdk-libs-sky130_fd_sc_hd Public
Forked from efabless/skywater-pdk-libs-sky130_fd_sc_hdVerilog Apache License 2.0 UpdatedDec 11, 2024 -
-
noc Public
Forked from shashankov/nocSimple Intel FPGA Optimized NoC
SystemVerilog MIT License UpdatedJun 12, 2024 -
-
fpga-tool-perf Public
Forked from chipsalliance/fpga-tool-perfFPGA tool performance profiling
Python Apache License 2.0 UpdatedFeb 24, 2024 -
-
-
-
SOFA Public
Forked from lnis-uofu/SOFASOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA
Verilog MIT License UpdatedMar 17, 2023 -