docs: document AMDGPU LDS transposing read instructions - #24911
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Document the ds_read_b{N}_tr_b{M} (ds_read_tr) LDS transpose read family
and how IREE generates them: the amdgpu.transpose_load MLIR op, the
iree-rocdl-load-to-transpose-load pass, the lane_constant/lane_increment
index hints it relies on, the requirements a transfer_read must satisfy,
the index remapping performed by the rewrite, chipset support, and the
related global_load_tr (amdgpu.global_transpose_load) path on RDNA4.
Fixes iree-org#22537
Signed-off-by: linsen <251731047+linsen458-spec@users.noreply.github.com>
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Gentle ping — this docs PR (Fixes #22537) has been sitting with four requested reviewers for about two weeks. Is there a better person to route it to? |
While digging into how IREE lowers shared memory copies on AMDGPU I noticed the
ds_read_trfamily (ds_read_b{N}_tr_b{M}) is used in the codebase but never explained anywhere in the docs, so I wrote up what I could piece together.This adds a section to the AMDGPU doc covering: what the transposing LDS reads do and which chipsets have them; how IREE ends up generating them (the
amdgpu.transpose_loadMLIR op and theiree-rocdl-load-to-transpose-loadpass); thelane_constant/lane_incrementindex hints the rewrite relies on; what atransfer_readhas to look like for the pass to kick in; the index remapping the rewrite performs; and the relatedglobal_load_trpath (amdgpu.global_transpose_load) on RDNA4.Everything is based on the actual pass implementation and the LLVM AMDGPU definitions, not just vendor docs.
Fixes #22537