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MAPLE: resolving tissue microenvironments through spatial multi-modal integration via dual-level graph modeling
Chinese Translation on <PCI Express Technology Comprehensive Guide to Generations 1.x, 2.x and 3.0> by Mindshare Mindshare
This project shows the design and comparison of various 16-bit parallel prefix adders.
VHDL Bypass descriptor controller for Xilinx DMA IP for PCIe
gnark-crypto provides elliptic curve and pairing-based cryptography on BN, BLS12, BLS24 and BW6 curves. It also provides various algorithms (algebra, crypto) of particular interest to zero knowledg…
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clash for windows汉化版. 提供clash for windows的汉化版, 汉化补丁及汉化版安装程序
Apache Spark - A unified analytics engine for large-scale data processing
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…
cloc counts blank lines, comment lines, and physical lines of source code in many programming languages.
RSA attack tool (mainly for ctf) - retrieve private key from weak public key and/or uncipher data
A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction
Deep FeedForward Neural Network based Model Building Attack Tool on PUF
《动手学深度学习》：面向中文读者、能运行、可讨论。中英文版被70多个国家的500多所大学用于教学。
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA