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Functional verification project for the CORE-V family of RISC-V cores.

Assembly 723 324 Updated Sep 14, 2026

Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

Batchfile 855 167 Updated Sep 14, 2023

Open-source high-performance RISC-V processor

Scala 7,275 948 Updated Sep 24, 2026

Programmer's guide about how to cook at home.

102,332 11,100 Updated Sep 23, 2026
SystemVerilog 24 8 Updated Jun 17, 2014

CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.

Verilog 36 4 Updated Feb 21, 2024

《动手学深度学习》:面向中文读者、能运行、可讨论。中英文版被70多个国家的500多所大学用于教学。

Python 81,085 12,408 Updated Jul 30, 2024
Verilog 318 97 Updated Mar 3, 2024

matlab

MATLAB 16 2 Updated Nov 8, 2018

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

SystemVerilog 1,297 550 Updated Aug 26, 2026

Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database

Verilog 610 114 Updated Feb 19, 2021

A very simple and easy to understand RISC-V core.

C 1,534 243 Updated Nov 9, 2023

开放原子开源基金会孵化的物联网操作系统,捐赠前为腾讯物联网终端操作系统TencentOS Tiny

5,939 1,558 Updated Feb 2, 2024