Tags: plctlab/riscv-operating-system-mooc

Improve memory/page init

Align heap start and caculate number of reserved pages
according to the length of ram available.

See
https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I9LNCF.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

optimize the uart get process

Also remove the while in uart_isr. Generally unlimited loop in interrupt
handler is not recommended.

Signed-off-by: Wang Chen <unicorn_wang@outlook.com>

fixed bug #I85M48

https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I85M48

Signed-off-by:  Wang Chen <wangchen20@iscas.ac.cn>

Don't set MPIE explicitly

Because according to ISA specification: interrupts for M-mode, which
is higher than U-mode, are always globally enabled regardless of the
setting of the global MIE bit.
We don't set mstatus.MPIE to 1 explicitly to avoid misleading people
into thinking it is must-haveto-do.

Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
Co-authored-by: LiuJiLan <ldc31415926@126.com>

improved code comments about restore/save context of task

Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>

optimize page alloc

Signed-off-by: ablechen <17895010372@163.com>
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>

fixed some bugs

- https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I55JRV
- https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I4UUHU
- https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I4D6N9

Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

fixed some minor issues.

- https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I4QLTP
- https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I4PJTQ
- https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I49VW5

Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>

I493SN:fix bugs introduced by I441IC

fixed issues I47WMN, I477IX,I441IC