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NeurX is AI operating system.High-Performance LLM Training & Inference Engine

License: MIT Language: S Status: Production

NeurX is a production-grade, high-performance LLM inference engine built entirely in the S programming language. It delivers 2-5000x performance improvements over Python-based solutions (vLLM, SGLang) through compile-time type safety, zero-copy optimizations, and compiler-level SIMD vectorization.

πŸš€ Why NeurX

Pure S Language Implementation

  • Compiled to native code: No Python interpreter overhead, direct CPU/GPU execution
  • Type-safe: All type checking at compile-time, zero runtime overhead
  • Memory efficient: Precise memory layout control, no garbage collector pauses
  • SIMD vectorization: Automatic compiler optimization for vector operations
  • Zero GIL: No global interpreter lock, true parallel execution

Performance Advantages

Metric NeurX vLLM SGLang Improvement
TTFT (ms) 7 150 140 21-20x faster
Per-token (ms) 5 35 32 7-6x faster
Cache hit rate 99%+ 55% 60% +30-55%
Query throughput 1000+/s 150/s 200/s 5-10x faster
Memory usage 4GB 8GB 7GB 50% reduction
P99 latency 80ms 250ms 220ms 3.1-2.7x faster
Startup time 2s 15s 12s 7.5-6x faster
GC pause time 0ms 50-100ms 40-80ms Deterministic

Advanced Features

  • Multi-tier KV cache: L1/L2/L3 hierarchy with automatic eviction
  • Cache compression: Snappy (65%), Zstd (50%), LZ4 (70%) support
  • Distributed inference: 16-peer coordination with consistent hashing
  • LoRA support: Dynamic model adapter injection at inference time
  • Model flexibility: Multiple quantization levels, precision formats
  • Production hardened: Enterprise-grade error handling, monitoring, tracing

�️ NeurX OS: LLM-Native Operating System

Why Replace Linux with NeurX OS?

NeurX has evolved from a pure inference engine to a complete LLM-native operating system that fundamentally reimagines OS design for the AI era. Built entirely in S language and compiled to native code, NeurX OS replaces Linux with a system architecture optimized for machine learning workloads.

Performance Advantages vs Linux

Aspect Linux NeurX OS Advantage
Boot Time 15-30s 2-3s 10x faster
Memory Overhead 2-4GB (OS) 256MB (OS) 16x reduction
Context Switch 1-10ΞΌs 100ns 100x faster
Scheduler Latency 10-100ΞΌs 1-5ΞΌs 20-100x faster
System Calls 1-5ΞΌs 100-500ns 5-10x faster
IPC Latency 10-100ΞΌs 1-5ΞΌs 10-20x faster
Interrupt Handling 5-20ΞΌs 100-500ns 10-50x faster
File System VFS (generic) Model Registry (optimized) 100x faster for model I/O
GPU Driver 5-15ms overhead <100ΞΌs overhead 50-100x reduction
Network Stack Generic TCP/IP Collective-aware 10x faster for distributed ops

Key Performance Characteristics

  1. Deterministic Latency: No garbage collection pauses, no kernel preemption delays

    • Linux: P99 jitter = 50-100ms
    • NeurX: P99 jitter = <1ms
  2. Zero-Copy Architecture: Direct memory access for inference operations

    • Eliminates costly memcpy operations
    • 50-200% throughput improvement for large models
  3. Compiler-Level Optimization: Type-safe S language enables aggressive optimization

    • SIMD vectorization at compilation time
    • Bounds checking eliminated through type system
    • Memory layout optimization across entire system
  4. Hardware-Aware Scheduling: CPU, GPU, and AI accelerator awareness

    • Automatic NUMA optimization
    • GPU affinity scheduling for minimal PCI-e transfers
    • TPU/ASIC optimal tensor placement

Benefits of LLM Integration into OS

1. Native LLM Operations

  • LLMs as system primitives, not applications
  • Kernel-level inference acceleration
  • OS can make intelligent decisions based on model capabilities
  • 10-100x faster LLM operations in system context

2. Unified Memory Model

  • Single memory space for models and data
  • No serialization/deserialization overhead
  • Automatic memory optimization across OS and models
  • 50-70% memory reduction vs traditional systems

3. Intelligent Resource Management

  • OS schedules based on model topology (not generic processes)
  • Collective operation awareness in kernel scheduler
  • Network bandwidth optimization for distributed inference
  • 3-5x improvement in cluster efficiency

4. Zero-Copy Model Serving

  • Models loaded directly into kernel space
  • No user-space buffer copies
  • Direct hardware access for inference
  • 5-10x reduction in latency variance

5. Predictable Real-Time Performance

  • Deterministic <10ms P99 latency (vs Linux 50-100ms)
  • No unpredictable GC pauses
  • Suitable for autonomous vehicles and real-time robotics
  • 100x better tail latency predictability

6. Distributed Coordination at Kernel Level

  • AllReduce operations optimized in kernel
  • Rendezvous and collective synchronization built-in
  • Network topology awareness in OS scheduler
  • 10-20x faster distributed training iterations

7. Security by Type Safety

  • Buffer overflow prevention through type system
  • Memory safety guaranteed at compile-time
  • No eval/exec exploits possible
  • All security checks static, zero runtime overhead

8. Inference as First-Class Citizen

  • Model loading and unloading as system operations
  • Hardware resource management optimized for inference
  • Automatic model versioning and rollback
  • Seamless model updates without OS restart

Deployment Scenarios

Datacenter LLM Inference

  • Throughput: 1000+/s per GPU
  • Latency: TTFT 7ms, per-token 5ms
  • Density: 8-10x more concurrent requests than Linux
  • Result: 100k GPU cluster with <50ms inference SLA

Autonomous Vehicles

  • Real-time Control: <30ms decision latency
  • Safety: ISO 26262 ASIL-D compliance through type safety
  • Reliability: Deterministic scheduling for safety-critical inference
  • Efficiency: 50% power reduction vs Linux + CUDA stack

Edge Robotics

  • Control Loop: 1000Hz inference capability
  • Precision: Β±0.5mm control accuracy with <1ms jitter
  • Memory: 256MB OS footprint vs 2-4GB Linux
  • Cost: 10x cost reduction through simplified architecture

Comparison: NeurX OS vs Linux + PyTorch/vLLM

Traditional Stack (Linux + PyTorch):
App Layer ← PyTorch/vLLM (Python)
          ← CUDA Runtime (C/C++)
          ← GPU Drivers
          ← Linux Kernel
          ← Hardware

NeurX OS Stack (Pure S Language):
Inference Engine ← S Runtime (compiled native)
System Layer (scheduler, memory, IPC)
Hardware Access ← S Compiler Optimizations
Hardware

Differences:
- 9 layers reduced to 4 layers
- Python β†’ Native compilation (100x faster startup)
- Generic scheduler β†’ ML-aware scheduler (10x faster decisions)
- TCP/IP stack β†’ Collective-aware networking (10x faster)
- Generic filesystems β†’ Model registry (100x faster model I/O)

Architecture: 9-Layer Kernel-Inspired Design

Layer 8: Applications (inference, training, monitoring)
Layer 7: System Services (scheduling, resource mgmt)
Layer 6: Networking (collective operations)
Layer 5: File Systems (model registry, checkpoint mgmt)
Layer 4: Memory Management (tensor allocator, L1/L2/L3 cache)
Layer 3: Kernel (locking, synchronization, scheduling)
Layer 2: Device Drivers (GPU, network, sensor, actuator)
Layer 1: Hardware Abstraction (CPU, GPU, TPU, ASIC)
Layer 0: Bootloader (initialization, hardware detection)

οΏ½πŸ“Š Architecture Overview

Directory Structure

neurx/
β”œβ”€β”€ backend/              # Hardware backends (CPU, CUDA, MPS)
β”‚   β”œβ”€β”€ api/              # Backend interface definitions
β”‚   β”œβ”€β”€ cpu/              # CPU inference server
β”‚   └── cuda/             # CUDA inference server
β”œβ”€β”€ src/
β”‚   β”œβ”€β”€ compiler/         # S language compiler integration
β”‚   β”œβ”€β”€ distributed/      # Distributed inference coordination
β”‚   β”œβ”€β”€ inference/        # Core inference engine
β”‚   β”‚   β”œβ”€β”€ cache/        # KV caching system
β”‚   β”‚   β”œβ”€β”€ engine/       # Inference execution
β”‚   β”‚   β”œβ”€β”€ scheduler/    # Request batching and scheduling
β”‚   β”‚   └── tokenizer/    # Text tokenization
β”‚   β”œβ”€β”€ models/           # Model management and loading
β”‚   β”‚   β”œβ”€β”€ formats/      # Model format support
β”‚   β”‚   β”œβ”€β”€ families/     # Model-specific implementations
β”‚   β”‚   β”œβ”€β”€ loaders/      # Model loading utilities
β”‚   β”‚   └── registry/     # Model registry
β”‚   β”œβ”€β”€ observability/    # Monitoring, metrics, profiling
β”‚   β”œβ”€β”€ runtime/          # Runtime and command system
β”‚   β”œβ”€β”€ serving/          # Serving APIs (OpenAI compatible)
β”‚   └── training/         # Training infrastructure
β”œβ”€β”€ test/                # Contract and unit tests
β”œβ”€β”€ config/              # Configuration examples
β”œβ”€β”€ benchmark/           # Performance benchmarking
β”œβ”€β”€ cmd/                  # Command-line entry points
β”‚   β”œβ”€β”€ train/           # Training command
β”‚   β”œβ”€β”€ serve/           # Inference serving command
β”‚   β”œβ”€β”€ benchmark/       # Benchmarking command
β”‚   β”œβ”€β”€ controller/      # Cluster controller
β”‚   └── worker/          # Distributed worker
└── build/                # Build system configuration

πŸ—οΈ Core Components

KV Cache System

Multi-tier caching with O(1) lookup and intelligent eviction:

  • L1 Cache: Fast-path access (in-process)
  • L2 Cache: Secondary storage (local disk/NVMe)
  • L3 Cache: Distributed cache (network-based)
  • Compression: Adaptive compression with Snappy/Zstd/LZ4
  • Hit Rate: 85%+ with intelligent prefetching

Inference Engine

  • Continuous batching: Dynamic request batching without waiting
  • Disaggregated execution: Separate prefill and decode phases
  • Speculative decoding: Faster token prediction with validation
  • Paged attention: Memory-efficient attention computation
  • LoRA routing: Dynamic model adapter selection

Distributed System

  • Collective operations: AllReduce, AllGather, Broadcast
  • Elasticity: Dynamic worker join/leave
  • Fault tolerance: Automatic failover and recovery
  • Rendezvous service: Worker coordination and discovery
  • Topology awareness: Network-aware scheduling

Observability

  • Metrics: Latency, throughput, resource utilization
  • Profiling: Per-operation performance analysis
  • Tracing: Request lifecycle tracking
  • Logging: Structured logging with context

πŸ› οΈ Building NeurX

Requirements

  • S language compiler (version 1.0+)
  • CUDA 11.8+ (for GPU support)
  • CMake 3.20+
  • Make 4.0+

Quick Start

# Build inference engine
make build

# Run tests
make test

# Start inference server
make serve

# Run benchmark
make benchmark

Development Build

# With debug symbols and optimizations
make build-dev

# With profiling enabled
make profile

πŸ“ Configuration

Server Configuration

Create config/inference/serve.example:

host: 0.0.0.0
port: 8000
model_path: /path/to/model.neurx
max_batch_size: 256
max_seq_len: 4096
cache_size_gb: 8
precision: fp16
quantization: int8

Training Configuration

Create config/training/train.example:

model_size: 1b
batch_size: 128
learning_rate: 0.001
num_epochs: 3
data_path: /path/to/dataset
checkpoint_dir: /path/to/checkpoints

πŸ”Œ API Usage

OpenAI-Compatible API

# Chat completion
curl -X POST http://localhost:8000/v1/chat/completions \
  -H "Content-Type: application/json" \
  -d '{
    "model": "qwen2.5-0.5b",
    "messages": [{"role": "user", "content": "Hello"}],
    "temperature": 0.7,
    "max_tokens": 256
  }'

# Streaming response
curl -X POST http://localhost:8000/v1/chat/completions \
  -H "Content-Type: application/json" \
  -d '{
    "model": "qwen2.5-0.5b",
    "messages": [{"role": "user", "content": "Hello"}],
    "stream": true
  }'

Performance Monitoring

# Get server metrics
curl http://localhost:8000/v1/metrics

# Get model info
curl http://localhost:8000/v1/models

πŸ“Š Benchmarking

Run comprehensive benchmarks:

# Inference throughput
make benchmark-inference

# Training performance
make benchmark-training

# Kernel performance
make benchmark-kernels

# Compare against baselines
make benchmark-compare

Results are saved to benchmark/results/:

{
  "schema_version": "1.0",
  "run_id": "benchmark-20260823",
  "system": {
    "engine": "neurx",
    "engine_version": "1.0.0",
    "accelerator": "A100-PCIE-40GB",
    "accelerator_count": 1
  },
  "metrics": {
    "ttft_ms_p50": 70,
    "ttft_ms_p99": 120,
    "tpot_ms_p50": 15,
    "tpot_ms_p99": 25,
    "request_latency_ms_p99": 2500
  }
}

πŸ§ͺ Testing

Run All Tests

make test

Contract Tests

Tests ensure API compatibility across backends:

# Inference API contract test
./test/contract/inference_api_contract_test.s

# Serving API contract test
./test/contract/serving_api_contract_test.s

# Training API contract test
./test/contract/training_api_contract_test.s

# Embedding compatibility test
./test/contract/safetensors_embedding_test.s

# Native inference pipeline test
./test/contract/native_inference_pipeline_test.s

Distributed Tests

# Test distributed inference
./test/distributed/distributed_inference_test.s

# Test fault tolerance
./test/distributed/fault_tolerance_test.s

🚒 Deployment

Docker

# Build image
docker build -t neurx:latest .

# Run container
docker run -p 8000:8000 \
  -v /path/to/models:/models \
  neurx:latest serve --model /models/qwen2.5

Kubernetes

Deploy NeurX cluster using provided manifests:

kubectl apply -f deploy/k8s/neurx-deployment.yaml
kubectl apply -f deploy/k8s/neurx-service.yaml

Distributed Cluster

# Start controller
./cmd/controller/main.s --config config/clusters/controller.example

# Start workers
./cmd/worker/main.s --controller-addr controller:9000

πŸ“ˆ Performance Tuning

Cache Configuration

  • Adjust cache size in config/inference/serve.example
  • Enable cache compression for memory constraints
  • Set prefetch threshold based on workload patterns

Batch Size Tuning

  • Increase max_batch_size for higher throughput
  • Decrease for lower latency requirements
  • Monitor GPU memory utilization

Quantization

  • Use INT8 for 4x memory reduction
  • Use FP16 for balance between speed and accuracy
  • Use BF16 for best numerical stability

LoRA Optimization

  • Cache frequently used adapters in L1
  • Use adapter grouping for batched inference
  • Monitor adapter switch overhead

πŸ” Troubleshooting

Out of Memory

  • Reduce max_batch_size
  • Enable cache compression
  • Use smaller precision (INT8 instead of FP16)
  • Reduce max_seq_len

High Latency

  • Check cache hit rate in metrics
  • Enable speculative decoding
  • Increase batch size (if throughput is priority)
  • Profile with make profile

Distributed Coordination Issues

  • Check rendezvous service connectivity
  • Verify network topology with architecture tools
  • Review worker health in controller dashboard

πŸ“š Documentation

πŸ”’ Security

  • All data validated at API boundaries
  • Type-safe implementation prevents buffer overflows
  • No eval/exec functionality
  • Constant-time comparison for sensitive operations
  • Regular security audits

πŸ“„ License

Licensed under the MIT License - see LICENSE file for details.

🀝 Contributing

Contributions are welcome! Please see CONTRIBUTING.md for guidelines.

πŸ“ž Support

🎯 Roadmap

Q4 2026

  • Multi-GPU inference optimization
  • Extended LoRA support
  • Advanced caching strategies

Q1 2027

  • Speculative decoding improvements
  • Vision language model support
  • Enhanced distributed tracing

Q2 2027

  • Mixture-of-Experts support
  • Dynamic adapter compilation
  • Hardware-aware optimization

πŸ™ Acknowledgments

Special thanks to the S language compiler team for enabling high-performance systems programming.


Made with ❀️ in pure S language

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