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Hi, I'm Ilias πŸ‘‹

I'm an Electrical & Computer Engineering student at Aristotle University of Thessaloniki (AUTH), interested in digital & analog hardware design & embedded systems.


πŸ”§ Skills & Tools

C Verilog SystemVerilog Cadence Virtuoso STM32 Git Linux


πŸ“Œ Featured Projects

Project Description Stack
⚑ Verilog NN Accelerator 3-neuron neural network AI accelerator with ALU, register file & FSM Verilog
πŸ”Œ Two-Stage Op-Amp Miller-compensated nMOS op-amp with PVT & Monte Carlo analysis Cadence Virtuoso
🐚 TinyShell Unix shell with pipelines, redirections & job control C

πŸ“« Contact

Feel free to reach out via GitHub!

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