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written in SystemVerilog
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A Verilog synthesis flow for Minecraft redstone circuits
RSD: RISC-V Out-of-Order Superscalar Processor
Common SystemVerilog components
NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.
MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support