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Here are 15 public repositories matching this topic...

RomeoMe5 / DDLM

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Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)

Updated Sep 15, 2023
Verilog

electro-logic / CameraVision2

Sponsor

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Connect a modern, high-resolution camera to an FPGA and easily develop your applications

Updated Apr 10, 2026
C

amaranth-farm / fpga-mandelbrot

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FPGA mandelbrot accelerator via high speed/super speed USB

fpga usb fractal mandelbrot xilinx altera hdl fractal-images usb3 fractal-algorithms fractals fractal-rendering terasic usb2 kintex

Updated Apr 6, 2023
Python

RomeoMe5 / De10-Lite_HDL_GPS

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Simple verilog project with ability to connect to GPS module using UART and parse NMEA coordinates using finite state machine

gps ubx uart hse nmea quartus miem de10-lite terasic-de10-lite nmea-0183 rtcm terasic neo-6

Updated Mar 21, 2019
Verilog

ThePituLegend / RISC-V_DE10-Nano

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This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.

fpga riscv altera ucberkeley risc-v altera-fpga riscv-asm de10-nano riscv64 terasic rocketchip riscv-assembly chipyard

Updated Feb 7, 2022
Verilog

LispEngineer / systemverilog-hdmi

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Implement HDMI output using only SystemVerilog and an Analog Devices ADV7513

fpga rtl verilog hdmi systemverilog hdl cyclone-v terasic terasic-c5g

Updated Feb 20, 2022
SystemVerilog

RomeoMe5 / Terasic-SMK-driver-use-cases

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Terasic Servo Motor Kit (SMK) usage examples

gpio fpga hse pwm quartus smk miem de10-lite terasic servo-motor-kit

Updated Mar 21, 2020

Insper / DE10-Standard-v.1.3.0-SystemCD

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Copy of: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=1081

terasic de10-standard

Updated Aug 6, 2025
Verilog

RomeoMe5 / A-Cute-CAR_Bluetooth

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Управление двуколесным роботом из набора A-Cute Car с помощью Bluetooth

gpio fpga bluetooth uart hse pwm miem de0-nano terasic a-cute-car bluetooth-hc-06

Updated Jan 5, 2021
Verilog

jimfangx / DE2-70-Bringup

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Assorted Verilog that brings up different elements (VGA, Ethernet, Switches, LED, LCD, etc.) of the terasIC DE2-70 Development Board.

fpga verilog ethernet altera modelsim vga nios2 vga-controller quartus2 terasic de2-70

Updated Jun 26, 2024
C

RomeoMe5 / Hummingbird-FPGA-De1-SoC

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FPGA Cripto Algorithm Hummingbird

cryptography hummingbird de1-soc quartus-prime quartus terasic hummingbird-algorithm ultra-lightweight-cryptography

Updated May 30, 2020
HTML

Thejayman77 / retroDE_splash

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Platform chassis for retroDE — board RTL, OSD, HPS bridge, and the retrodesd supervisor for the Terasic DE25-Nano (Agilex 5).

fpga verilog systemverilog retro-gaming terasic agilex de25-nano

Updated Apr 16, 2026
SystemVerilog

vvyroubal / de1-soc

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Modern Debian 12 + Linux 6.12 SD-card image, FPGA designs, and setup manual for the Terasic DE1-SoC (Intel Cyclone V SoC)

arm fpga debian linux-kernel de1-soc u-boot embedded-linux cyclone-v quartus sd-card-image socfpga intel-fpga hps terasic

Updated Sep 16, 2026
Tcl

Botxan / DCSD

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Repositorio dedicado a la asignatura DCSD

hardware vhdl altera digital-circuits terasic

Updated Jan 10, 2023
VHDL

Tiloup9291 / NES_DE2_70

Sponsor

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NES For FPGA Terasic Altera DE2-70 Cyclone 2 EP2C70F896C6

fpga altera fpga-board altera-fpga fpga-programming altera-de2 terasic altera-quartus

Updated Sep 25, 2025
Verilog

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