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vhdl-code

Here are 236 public repositories matching this topic...

b57zheng / FPGA_Traffic_Control

Traffic light control program with pedestrian cross button

fpga traffic-control transportation-simulation vhdl-code

Updated Apr 15, 2023
VHDL

Holandsoest / FPGA_I2C

WIP: An I2C-master AXI-slave, and I2C-Slave. So I can practice myself a bit, and build my own libraries.

fpga i2c vhdl i2c-bus vhdl-code fpga-programming

Updated Aug 28, 2025
VHDL

CTipton27 / FPGA_Pong

learning vhdl learning-by-doing vhdl-code vhdl-coursework

Updated Jul 27, 2025
VHDL

pedruino / playground-vhdl

Learning VHDL

serial vhdl bcd multiplex vhdl-code

Updated Apr 26, 2019
VHDL

GraceSevillano / RTIC-project-Antoine-s-army

This project not only provides hands-on experience with VHDL but also offers insight into the fundamental concepts of CPU architecture and design. It bridges the gap between theoretical knowledge and practical application, using the Nexys4 DDR board as a testbed

vhdl-code nexys4ddr fpga-programming

Updated Jan 2, 2024
VHDL

CodiieSB / VHDL-4Bit_UpCounter

A 4-bit up counter is a digital circuit that increments its output by one with each clock pulse, counting from 0000 to 1111 in binary, and resetting back to 0000 after reaching 1111.

vhdl xilinx-vivado vhdl-code upcounter

Updated Feb 29, 2024
VHDL

melanie-t27 / Logic-Design-Project

Project for the Reti Logiche Course at @POLIMI, instructed by Prof. Gianluca Palermo during the academic year 2022/23

vhdl polimi logic-design vhdl-code reti-logiche polimi-projects

Updated Mar 10, 2024
VHDL

Elem404 / Designing-and-Testing-Asynchronous-FIFO-Queues

Design and simulation for Asynchronous FIFO Queues in VHDL (with bacher's odd-even sort)

vhdl vhdl-code

Updated May 1, 2024
VHDL

Korobonshi / VHDL_ROMLESS_DDFS

This repository contains the VHDL implementation of a ROM-less Direct Digital Frequency Synthesizer (DDFS) designed for high-speed calculation of the arctan function. This project was developed as a final assignment to fulfill the requirements for a bachelor's degree in my Electrical Engineering.

fpga vhdl vector-control vhdl-code ddfs fpga-programming artix-7

Updated Sep 11, 2025
VHDL

CodeNKoffee / clock-simulation

VHDL simulation of a digital clock for the CSEN605 course at the German University in Cairo. Includes clock generation and stimulus processes.

vhdl-code

Updated Nov 17, 2024
VHDL

vladbarto / MIPS16_single_cycle

VHDL-described MIPS processor

mips-architecture vhdl-code

Updated Mar 9, 2024
VHDL

Yaniv23 / 4BitCounter

vhdl-code

Updated Nov 11, 2024
VHDL

Nyfeu / VHDL

This repository contains VHDL code and testbenches using GHDL, GTKWave, and Makefile.

vhdl vhdl-code

Updated Mar 3, 2025
VHDL

medamine101 / VHDL_Bowling

Bowling Game in VHDL, the ._files are due to working on this project in both Windows and Linux systems

embedded vhdl vhdl-code

Updated May 29, 2023
VHDL

mariateodorapopescu / vhdl_fsm

A team-project about a fem vending-machine I had in 2nd year of uni

fsm university vhdl project teamwork uni vendingmachine vending-machine team-project vhdl-code

Updated Feb 12, 2024
VHDL

rgeleon / VHDL_samples

Vhdl coursework

vhdl-code vhdl-examples vhdl-coursework

Updated Jul 15, 2024
VHDL

ElecGeek / PulsesGene

Fun project to produce (only) pulses as the MultiSignalGene do, with analogue circuits and FPGA or 74HC logic circuits.

hardware electronics vhdl spice ghdl yosys logic-circuit vhdl-code fpga-programming pcb-design

Updated Oct 19, 2025
VHDL

asazeez / COE608

COE608 Computer Organization and Architecture labs.

computer-architecture risc vhdl-code

Updated Jun 5, 2025
VHDL

DigitalDesignDen / open-scope-vhdl

Official repo of the open scope (a digital oscilloscope) developed by Digital Design Den

fpga oscilloscope vhdl08 vhdl-code dpo

Updated Mar 25, 2025
VHDL

valeriot90 / ECS

Project for Electronic and Communication Systems course

vhdl vhdl-code

Updated Dec 1, 2021
VHDL

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