#
altera
Here are 8 public repositories matching this topic...
Implementation of ChaCha20 for Cyclone V FPGA (DE10-nano) easily connectable to HPS (ARM processor)
arm cryptography encryption fpga verilog altera systemverilog hdl soc chacha20 dma cyclone-v ip-core hps rfc7539 platform-designer rfc8439
-
Updated
Jul 29, 2020 - C++
Stereo digital 2-way crossover filters processing I2S audio (16bit or 24bit) streams
primer fpga esp32 altera iir i2s tang anlogic sipeed crossover-filter biquad-filter cyclone4 linkwitz-riley
-
Updated
May 13, 2024 - C++
Source Code of Yocto Layer for accessing FPGA Manager of the Intel (ALTERA) Arria 10 SX SoCFPGA
-
Updated
Jun 27, 2021 - C++
usb-jtag - Altera USB Blaster Emulation with a FX2
fpga xilinx altera usb-devices openocd jtag numato-opsis digilent-atlys cypress-fx2 ezusb digilent opsis numato urjtag
-
Updated
Nov 2, 2025 - C++
Improve this page
Add a description, image, and links to the altera topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the altera topic, visit your repo's landing page and select "manage topics."