Image Processing Toolbox in Verilog using Basys3 FPGA

Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)

DSSS Wireless transmit-receive system in VHDL

Academic project for the course of Digital Systems Design. The aim of the project was to design and implement an IIR audio filter on FPGA

A collection of useful material and personal projects from the Computer and Informatics Engineering Bachelor's degree program at the University of Aveiro.

Neander++ (Neander extended) implementation and testing in VHDL for Digital Systems' 2nd assignment.

Coffee vending machine implementation designed for FPGAs (DE2-115 kit)

Design a digital circuit that encodes and decodes strings with CRC-8 algorithm with an optimal delay and number of components

Project done for the course of "Specification and simulation of digital systems" at Politecnico di Torino, academic year 2015/2016.

INE5406 - Digital Systems

💻 Digital Systems Design project [051228]

Program the FPGA with mastermind game

Practices using VHDL languaje

Computer Architecture Project using VHDL

Code dump for Digital systems lab

COE328 - This course focuses on the fundamentals of digital logic circuits and the principles of designing modern digital systems, offered at TMU, formerly known as Ryerson.

Washing machine program using VHDL

Repositório com os projetos elaborados durante a disciplina de Sistemas Digitais I (PCS3115)

A high-performance VHDL coprocessor for 3×3 matrix multiplication with FSM control unit and optimized processing pipeline

O objetivo do deste projeto foi modelar, programar e testar uma Unidade Lógica e Aritmética, de quatro operações, usando os conhecimentos adquiridos em Circuitos Lógicos e aplicados nas aulas práticas no laboratório de Sistemas Digitais.