flip-flop

Discover and create logic circuits

Flip flop setup, hold & metastability explorer tool

Materials for the Computer Science course, Digital Design (Logic Circuits)

FuzzyNSGA-II-Algorithm (Fuzzy adaptive optimisation method)

An eurorack logic module with several logic functions and a clock divider mode. Build around an arduino nano. So could be reprogrammed.

💻 Repositório para Disciplina EEL5105 - Circuitos e Técnicas Digitais - UFSC

Implementaciones para diseño de sistemas digitales, comenzando por Flip Flops, registros, autómatas (Máquinas de Moore y Máquinas de Mealy), memorias ROM y sensores de presencia, utilizando para cada uno de estos, distintos contadores (anillo, década, etc).

A 12-hour digital clock with AM/PM indicator built using fundamental digital logic. Implemented in both Proteus (D flip-flops) and on a physical breadboard (7490 counters), featuring a 1Hz 555 timer, 7-segment displays, and custom reset logic.

this source is Commercial bcd counter that built with Jk flip-flop in verilog

Latch and Flip Flop Analysis Using Hspice

Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/

Gate-level and behavioral SystemVerilog models of latches, flip-flops and an 8-bit multi-mode shift and rotate register.

4-player digital quiz buzzer built in Logisim Evolution — first-press priority lockout using AND gates + SR latches, plus a countdown answer timer with auto-reset.

Flip-Flop solutions written in Go

Transistor based flip-flop Circuit designed in KiCad.

NYCU 2024 Fall Physical Design Automation(PDA) 陽明交大 陳宏明 實體設計自動化

Sequential circuits in Verilog — Flip-Flops, Registers, Counters, Shift Registers and Synchronous SRAM. Step 3 of 8 in a VLSI portfolio roadmap building to a 16-bit pipelined RISC processor.

This GitHub repository contains coursework projects related to computer systems design. It includes various assignments and projects that cover topics such as digital logic design, computer architecture, and hardware description languages.

This MPLAB X Melody code example shows how to make an LED blink using the Configurable Custom Logic (CCL) found in the AVR® DB. The CCL is configured as a toggling J-K flip-flop. The toggling is a result of a timer event.