Enable fast GPU inference of large language models that exceed GPU memory by managing memory dynamically.

64-bit RISC CPU Architecture

RISC-V CPU emulator developed in C++. Supports instruction decoding, disassembly, and execution with a simple memory model. Includes test binaries (CRC32, MD5, hello world) to validate behavior and explore low-level computer architecture concepts.

Kite: Architecture Simulator for RISC-V Instruction Set

Built custom assembly language and Assembler for my custom-built Computing Machinery project as its software extension. Mapped machine-functionality to assembly capable of data-control, machine-control and temporal-control operations and Implemented an assembler with syntax and semantic analysis 💻.

Air.rs 70B+ inference on consumer GPU, LLM inference in Rust

CPU INFOrmation library (x86/x86-64/ARM/ARM64, Linux/Windows/Android/macOS/iOS)

AirLLM 70B inference with single 4GB GPU

CPU design - part of new 72-series

Stack Based Virtual Machine in Golang

Derin öğrenme konularını işleyeceğiz.

🚀 Optimize memory for large language models, enabling 70B models on a 4GB GPU and 405B Llama3.1 on 8GB VRAM without compression techniques.

📚 Access comprehensive materials for the NYU Computing Systems Architecture course, including lectures, assignments, and exams from Fall 2025.

This repository contains all the lecture slides, homeworks, Mid Terms, and the final project of the Computing Systems Architectures course by Prof. Azeez Bhavnagarwala, in Fall 2025 at NYU.

A small CLI tool to detect CPU flags (instruction sets) of X86 binaries.

💻 An assembler for custom, user-defined instruction sets! https://hlorenzi.github.io/customasm/web/

X86 Opcode and Instruction Reference

Makine Öğrenmesi Kod Kütüphanesi

fasm68k - Motorola 68000 instruction set for fasmg (flat assembler g)

An x86/x64 instruction disassembler written in C