HDL libraries and projects
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Sep 21, 2026 - Tcl
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jesd204b
Here are 10 public repositories matching this topic...
ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
ddr dsp vhdl xilinx adc ddc altera dds digital-signal-processing fir jesd204b analog-signals serial-interface cic dac adc-configurator serdes-mode
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Aug 29, 2018 - VHDL
Python interface and configurator for the ADI JESD204 Interface Framework
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Sep 16, 2026 - Python
JESD204B ADC and DAC SYZYGY Pod.
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May 21, 2022
HDL libraries and projects
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Oct 6, 2022 - Verilog
fpga verilog adc systemverilog hdl jedec open-source-hardware jesd204b dac data-converter rtl-design ai-generated claude-code
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Aug 13, 2026 - SystemVerilog
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