JinBean / 16bitALU Star 4 Code Issues Pull requests Building a 16 bit Arithmetic Logic Unit using the Mojo v3 FPGA and Lucid fpga mojo lucid arithmetic-logic-unit Updated Dec 6, 2018 Verilog
JinBean / ColourRunner Star 3 Code Issues Pull requests Mini game built using the Mojo v3 FPGA and an Arithmetic Logic Unit game lucid ws2812b mojo-fpga Updated Feb 11, 2020 Verilog
shohamc1 / 50002-1D Star 2 Code Issues Pull requests ISTD 50.002 Computation Structures Beta CPU [SUTD] lucid hdl Updated Dec 9, 2020 Verilog
xingxuanli / Piano_Bit_by_Bit Star 2 Code Issues Pull requests Computation Struncture (1D game) fpga mojo verilog lucid Updated Nov 12, 2018 Verilog
xingxuanli / ISTD_Term4_50.002 Star 1 Code Issues Pull requests Computation Structure (Jsim, 2D) fpga mojo lucid Updated Dec 8, 2017 Verilog
shohamc1 / alchitry-RAM Star 0 Code Issues Pull requests ISTD 50.002 Computation Structures 1D Project [SUTD] fpga lucid alu hdl Updated Dec 9, 2020 Verilog
cc01x / toying_with_fpga Star 0 Code Issues Pull requests Projects involving FPGA fpga lucid alu alchitry Updated Apr 18, 2022 Verilog
lyqht / -Eternite- Sponsor Star 0 Code Issues Pull requests Game made with Mojo & Lucid (50.002 1D Project) game mojo visual-novel lucid Updated Dec 16, 2018 Verilog