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@educ8s
Nick Koumaris educ8s

educ8s.com Sparta, Greece

@hoglet67
David Banks hoglet67
@ZenSemiconductorSearch
Zen Semiconductor Search ZenSemiconductorSearch
Your European semiconductor recruitment partner - Digital, Analog, Mixed Signal, IC, ASIC, FPGA, RTL, Architect, Design, Hardware, Software, AI, IoT and more!

Zen Semiconductor Search United Kingdom

@yasir-javed
yasir-javed
@chili-chips-ba
Chili.CHIPS chili-chips-ba
Making math audible, visible, tangible in a number of big.LITTLE ways, we're engineers, entrepreneurs, creatives who love 2 think up & fire up FPGA, CPU, NPU...

Chili.CHIPS*ba Bosnia-Herzegovina

@gatecat
myrtle gatecat
FPGA tool dev • kbitycat • blåhaj fan • she/they • 🏳️‍🌈🏳️‍⚧️🐱🦈🦈🦈

nya~! DE

@ilyarepko
Ilya Repko ilyarepko
@jakergrossman
Jake Grossman jakergrossman
i like embedded computing

Dallas, TX

@RCoeurjoly
Roland Coeurjoly RCoeurjoly
@robinsonb5
Alastair M. Robinson robinsonb5

UK

@hansemro
Hansem Ro hansemro
@regymm
regymm regymm
Post-undergrad amateur programmer

Univ. of Sci. & Tech. of China Forever

@suarezvictor
Victor Suarez Rovere suarezvictor
Software and hardware developer

Argentina

@diamond2nv
diamond2nv
Note：NOT Checking Public Email Regularly " redmine8515@163.com "

China

@hansfbaier
Hans Baier hansfbaier
@0BAB1
BRH 0BAB1
Involved in Low Level Technologies, Finance, Manufacturing & Education.

⚜️

@openhwgroup
OpenHW Group openhwgroup

Ottawa, Ontario, Canada

@virajitgp
ryu virajitgp
@Eicar
Eicar
@oscherler
Olivier Scherler oscherler

Switzerland

@Poofjunior
Sonya Vasquez Poofjunior

engineer @allenneuraldynamics formerly @machineagency Seattle, WA

@jvierine
Juha Vierinen jvierine
Professor of radars, radio, space, astro, meteors, space debris, ionospheric plasma, GNSS, and inverse problems. Jack of all trades, master of none.
@vipinkmenon
Vipin K vipinkmenon

Birla Institute of Technology and Schience Goa, India

@samsoniuk
Marcelo Samsoniuk samsoniuk
Ancient wizard from the 68000-era and maintainer of old open source projects

Darklife Research Irvine, CA

@ATaylorCEngFIET
Adam Taylor ATaylorCEngFIET
Adam Taylor is an expert in design and development of embedded systems and FPGA's for several end applications.

http://adiuvoengineering.com/ United Kingdom

@openXC7
openXC7 openXC7
Free and open source FPGA toolchain for AMD/Xilinx Series 7 chips, including Kintex-7. Supports Kintex7 (including 325/420/480t), Artix7, Spartan7 and Zynq7.
@rexim
Alexey Kutepov rexim
Recreational Programming

@tsoding

@BrunoLevy
Bruno Levy BrunoLevy
Researcher in computational physics, Scientific director of Inria Quadrant Program, 2018-2022 director of centre Inria Nancy Grand-Est, ERC GOODSHAPE

@inria Saclay, France

@REevee0
Yusuf Coşgun REevee0
I am listening to my cat
@eugene-tarassov
eugene-tarassov
Principal Member of Technical Staff - AMD/Xilinx. Project Lead - Eclipse/TCF.

AMD Danville, CA

@ept221
Ezra Thomas ept221
Electrical and Systems Engineering PhD Student at UPenn

Philadelphia, PA

@KennethWilke
Kenneth Wilke KennethWilke

Cisco Meraki San Antonio, Texas

@Bucknalla
Alex Bucknall Bucknalla
Developer Experience Engineer. Edge Computing, FPGA SoCs, Zephyr RTOS.

Blues Exeter, UK

@timvideos
TimVideos.us Conference Recording Systems timvideos
Projects for doing both recording / streaming for conferences, meetings, user groups and other presentations.

Sydney, Australia

@freecores
FreeCores freecores
A home for open source hardware cores
@fossi-foundation
FOSSi Foundation fossi-foundation
The FOSSi Foundation exists to promote and protect the open source silicon chip movement.
@subins2000
Subin Siby subins2000
Curious generalist dev who works mostly on web. 10+ years of dev experience. ........ ........ 206 Partial Content : https://gitlab.com/subins2000

Remote from Thrissur, Kerala, India

@ika-musume
Raki ika-musume
a verilog shitcode expert democratizing silicon

IKA Microelectronics Inc. Magnetic Bubble Domain

@controlpaths
Pablo controlpaths
FPGA designer

controlpaths.

@Esteves4
Lucas Esteves Rocha Esteves4
Computer engineering student at Federal University of Ceará (UFC, 2017 - present)

INSA Rennes Rennes

@wuhanstudio
Han Wu wuhanstudio
Research Associate in Embedded Machine Learning at Newcastle University in the U.K. Prior research experience at RT-Thread, LAIX, Xilinx.

University of Southampton

@enjoy-digital
enjoy-digital

EnjoyDigital France

@litex-hub
LiteX-Hub litex-hub
LiteX Hub - Collaborative FPGA projects around LiteX
@AllAboutFPGA
AllAboutFPGA

Chennai, India

@AhmedOsama2000
‪Ahmed Osama‬‏ AhmedOsama2000
FPGA, Digital Design and Verification Engineer

Mixel, Inc. Cairo

@lefticus
Jason Turner lefticus
Host of C++ Weekly YouTube series Curator of @cpp-best-practices

Denver, CO

@darklife
Darklife darklife
Research Foundation
@SreehariJayaraj
Sreehari Jayaraj SreehariJayaraj
Engineering @CredHive

credhive delhi,india

@nandland
nandland
FPGA, VHDL, Verilog
@noemiabril
Noemí Abril noemiabril
Porting MiSTer FPGA Cores to Arrow SoCKit, DE10-Standard and DE1-SoC

Sabadell/BCN (Catalunya), ES