S7-200 STL Simulation Skill

A PLC-engineering workflow skill for Siemens S7-200 STL/AWL conversion, Micro/WIN compatibility, and old S7_200 simulator verification.

S7-200 coursework and legacy PLC projects often fail in the boring, expensive places:

• Ladder diagrams from PDF do not translate cleanly to STL/AWL.
• Micro/WIN can compile logic that the old S7_200 simulator imports badly.
• Chinese paths, ANSI/GBK encoding, clipboard format, and simulator CPU choices produce misleading errors.
• A program can "load" and "RUN" while the observed I/O behavior is still wrong.

This skill turns that messy path into a closed-loop engineering workflow: understand the control intent, produce versioned STL/AWL artifacts, import them with the right route, configure CPU/modules, run representative scenarios, and record what was actually observed.

• Convert ladder/PDF/screenshot requirements into S7-200 STL/AWL.
• Keep separate versions for PDF-original, Micro/WIN LAD-compatible, and simulator-ready programs.
• Repair invalid Micro/WIN ladder networks by splitting fragile STL structures.
• Prefer Paste Program Block (OB1) for old Chinese S7_200 Simulation workflows.
• Infer CPU and expansion modules from project evidence, or from address usage when documents are missing.
• Check common simulator hazards such as Instruction : LL, wrong CPU model, fragile AW>=, stack instructions, or missing expansion modules.
• Audit behavior through I/O lamps and memory monitor values, not just successful import.

Clone this repository into your Codex skills directory:

git clone https://github.com/wzyn20051216/s7-200-stl-simulation.git "$env:USERPROFILE\.codex\skills\s7-200-stl-simulation"

If your CODEX_HOME is customized, clone into:

git clone https://github.com/wzyn20051216/s7-200-stl-simulation.git "$env:CODEX_HOME\skills\s7-200-stl-simulation"

Restart Codex or reload skills after installation.

This repository does not bundle Siemens Step 7 Micro/WIN, S7_200 Simulation, or third-party simulator executables.

Reasons:

• The simulator and vendor tools may be proprietary or redistributed under unclear terms.
• Uploading unknown-license .exe, .dll, or .zip files can put the project and users at risk.
• A clean open-source repository should keep code, workflow, checks, and documentation separate from software whose redistribution rights are unknown.

Bring your own legally obtained simulator, then record the local path in your project notes. For old Chinese S7_200 Simulation workflows, this skill is designed to work best with:

S7_200 Simulation / S7_200 Chinese localized simulator
Step 7 Micro/WIN V4.0 STL view

If you maintain a classroom/internal fork and you have confirmed redistribution rights, publish simulator binaries through GitHub Releases instead of committing them into git history. Include:

• original source/vendor page
• license or redistribution permission
• version
• SHA256 checksum
• a short note explaining whether the binary is official, localized, mirrored, or modified

Suggested local project note format:

Simulator: S7_200 Simulation Chinese localized build
Path: <local path only, do not commit personal paths>
SHA256: <hash>
Redistribution: not included in this repository; user-provided tool

1. Read source truth first: PDF, Word, screenshots, I/O table, old AWL, or simulator errors.
2. Decide the target environment: CPU, expansion modules, Micro/WIN version, simulator route, encoding.
3. Produce clearly labelled artifacts:
   • PDF-original
   • MicroWIN-LAD-compatible
   • S7-200-Simulation
   • optional OB1 paste-body
4. Static-check network structure and instruction hazards.
5. Configure simulator hardware before running.
6. Prefer Program -> Paste Program Block (OB1) with text from NETWORK 1 to the final OB1 instruction.
7. Run representative flows and compare real observations with expected behavior.
8. Write down assumptions, import route, CPU/modules, result, and remaining risks.

• Web/file loading is not the only route: OB1 clipboard paste is often more reliable for old Chinese S7_200 Simulation.
• Clipboard text must start at NETWORK 1 and must not include ORGANIZATION_BLOCK, BEGIN, or END_ORGANIZATION_BLOCK.
• The upper row on the CPU graphic is Q; the lower green switch row is I.
• Edge-triggered inputs must transition OFF -> ON after RUN.
• Memory monitor may show only five rows, so split checks into operation and refund groups.
• Mapped outputs such as Q1.0 -> Q2.0 should be interpreted as original logic plus observation output.

The repository includes a lightweight checker:

python .\scripts\check_s7_awl.py .\examples\minimal_vending.awl

It reports:

• network count and range
• EU / ED count
• compare instruction count
• stack instruction count
• arithmetic instruction count
• missing or duplicate networks

This is not a PLC compiler. It is a fast preflight tool to catch common coursework/simulator mistakes before importing into Micro/WIN or S7_200 Simulation.

.
├── SKILL.md                         # Main skill instructions
├── agents/openai.yaml               # Skill metadata for Codex/OpenAI-style skill lists
├── scripts/check_s7_awl.py          # Static AWL/STL checker
├── examples/minimal_vending.awl     # Small validation fixture
├── .github/workflows/validate.yml   # CI validation
├── CONTRIBUTING.md
├── CHANGELOG.md
├── SECURITY.md
├── docs/simulator-software.md        # Binary distribution and setup policy
└── LICENSE

This project is built from real S7-200 simulation repair work and is meant to grow through more field cases. Contributions are welcome, especially:

• simulator screenshots and error patterns
• Micro/WIN import edge cases
• CPU/module compatibility notes
• additional static checks
• bilingual usage examples

MIT. See LICENSE.