DATA SHEET

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Single Supply Quad

14
Operational Amplifiers 14
1
1
LM324, LM324A, SOIC−14 TSSOP−14

LM324E, LM224,
D SUFFIX DTB SUFFIX
CASE 751A CASE 948G

LM2902, LM2902E,
LM2902V, NCV2902
The LM324 series are low−cost, quad operational amplifiers with
true differential inputs. They have several distinct advantages over PIN CONNECTIONS
standard operational amplifier types in single supply applications.
The Out 1 1 14 Out 4
quad amplifier can operate at supply voltages as low as 3.0 V or as 2
Inputs Inputs 4
high as 32 V with quiescent currents about one−fifth of those 1 3+1 4
−
13
+ 12
associated with the MC1741 (on a per amplifier basis). The common 4
VCC VEE, GND
mode input range includes the negative supply, thereby eliminating 11

the necessity for external biasing components in many applications. 5

+ + 10
The

Inputs 2 2 3 Inputs 3
output voltage range also includes the negative power supply voltage. 6 − − 9

Features Out 2 7 8 Out 3

 Short Circuited Protected Outputs (Top View)
 True Differential Input Stage
 Single Supply Operation: 3.0 V to 32 V
 Low Input Bias Currents: 100 nA Maximum (LM324A) ORDERING INFORMATION
 Four Amplifiers Per Package
See detailed ordering and shipping information in the
package dimensions section on page 10 of this data sheet.
 Internally Compensated
 Common Mode Range Extends to Negative Supply DEVICE MARKING INFORMATION
 Industry Standard Pinouts See general marking information in the device marking
 ESD Clamps on the Inputs Increase Ruggedness without section on page 11 of this data sheet.

Affecting Device Operation

 NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements;
AEC−Q100 Qualified and PPAP Capable
 These Devices are Pb−Free, Halogen Free/BFR Free and are
RoHS Compliant

October, 2021 − Rev. 31 LM324/D

 Semiconductor Components Industries, LLC, 2016
1 Publication Order Number:

October, 2021 − Rev. 31 LM324/D

 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
MAXIMUM RATINGS (TA = + 25C, unless otherwise noted.)
Rating Symbol Value Unit
Power Supply Voltages Vdc
Single Supply VCC 32
Split Supplies VCC, VEE 16
Input Differential Voltage Range (Note 1) VIDR 32 Vdc
Input Common Mode Voltage Range VICR −0.3 to 32 Vdc
Output Short Circuit Duration tSC Continuous
Junction Temperature TJ 150 C
Thermal Resistance, Junction−to−Air (Note 2) Case RθJA 118 C/W
646 Case 156
751A Case 190
948G
Storage Temperature Range Tstg −65 to +150 C
Operating Ambient Temperature Range TA C
LM224 −25 to +85
LM324, LM324A, 0 to +70
LM324E LM2902, −40 to +105
LM2902E −40 to +125
LM2902V, NCV2902 (Note 3)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Split Power Supplies.
2. All RθJA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active.
3. NCV2902 is qualified for automitive use.

ESD RATINGS
Rating HBM MM Unit
ESD Protection at any Pin (Human Body Model − HBM, Machine Model − MM)
NCV2902 (Note 3) 2000 200 V
LM324E, LM2902E 2000 200 V
LM324DG/DR2G, LM2902DG/DR2G 200 100 V
All Other Devices 2000 200 V
LM224 LM324A LM324, LM324E LM2902, LM2902E LM2902V/NCV2902

Characteristics Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VIO mV
VCC = 5.0 V to 30 V
VICR = 0 V to
VCC −1.7 V,
VO = 1.4 V, RS = 0 Ω
TA = 25C – 2.0 5.0 – 2.0 3.0 – 2.0 7.0 – 2.0 7.0 – 2.0 7.0
TA = Thigh (Note 4) – – 7.0 – – 5.0 – – 9.0 – – 10 – – 13
TA = Tlow (Note 4) – – 7.0 – – 5.0 – – 9.0 – – 10 – – 10

Average Temperature ΔVIO/ΔT – 7.0 – – 7.0 30 – 7.0 – – 7.0 – – 7.0 – µV/C

Coefficient of Input
Offset Voltage
TA = Thigh to Tlow
(Notes 4 and 6)
Input Offset Current IIO – 3.0 30 – 5.0 30 – 5.0 50 – 5.0 50 – 5.0 50 nA
TA = Thigh to Tlow – – 100 – – 75 – – 150 – – 200 – – 200
(Note 4)
Average Temperature ΔIIO/ΔT – 10 – – 10 300 – 10 – – 10 – – 10 – pA/C
Coefficient of Input
Offset Current
TA = Thigh to Tlow
(Notes 4 and 6)
Input Bias Current IIB – −90 −150 – −45 −100 – −90 −250 – −90 −250 – −90 −250 nA
TA = Thigh to Tlow – – −300 – – −200 – – −500 – – −500 – – −500
(Note 4)
Input Common Mode VICR V
Voltage Range
(Note 5)
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 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
VCC = 30 V NCV2902
TA = +25C 0 – 28.3 0 – 28.3 0 – 28.3 0 – 28.3 0 – 28.3
TA = Thigh to Tlow 0 – 28 0 – 28 0 – 28 0 – 28 0 – 28
(Note 4)
Differential Input VIDR – – VCC – – VCC – – VCC – – VCC – – VCC V
Voltage Range
Large Signal Open AVOL V/mV
Loop Voltage Gain
RL = 2.0 kΩ, 50 100 – 25 100 – 25 100 – 25 100 – 25 100 –
VCC = 15 V,
for Large VO Swing
TA = Thigh to Tlow 25 – – 15 – – 15 – – 15 – – 15 – –
(Note 4)
Channel Separation CS – −120 – – −120 – – −120 – – −120 – – −120 – dB
10 kHz  f  20 kHz,
Input Referenced
Common Mode CMR 70 85 – 65 70 – 65 70 – 50 70 – 50 70 – dB
Rejection,
RS  10 kΩ
Power Supply PSR 65 100 – 65 100 – 65 100 – 50 100 – 50 100 – dB
Rejection

4. LM224: Tlow = −25C, Thigh = +85C

LM324/LM324A/LM324E: Tlow = 0C, Thigh = +70C
LM2902/LM2902E: Tlow = −40C, Thigh = +105C
LM2902V & NCV2902: Tlow = −40C, Thigh = +125C
NCV2902 is qualified for automotive use.
5. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end
of the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the
magnitude of VCC.
6. Guaranteed by design.

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2
 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25C, unless otherwise noted.)
LM224 LM324A LM324, LM324E LM2902, LM2902E LM2902V/NCV2902

Characteristics Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
Output Voltage − VOH V
High Limit
VCC = 5.0 V, RL = 3.3 3.5 – 3.3 3.5 – 3.3 3.5 – 3.3 3.5 – 3.3 3.5 –
2.0 kΩ, TA = 25C
VCC = 30 V 26 – – 26 – – 26 – – 26 – – 26 – –
RL = 2.0 kΩ
(TA = Thigh to Tlow)
(Note 7)
VCC = 30 V 27 28 – 27 28 – 27 28 – 27 28 – 27 28 –
RL = 10 kΩ
(TA = Thigh to Tlow)
(Note 7)
Output Voltage − VOL – 5.0 20 – 5.0 20 – 5.0 20 – 5.0 100 – 5.0 100 mV
Low Limit,
VCC = 5.0 V,
RL = 10 kΩ,
TA = Thigh to Tlow
(Note 7)
Output Source IO + mA
Current (VID = +1.0 V,
VCC = 15 V)
TA = 25C 20 40 – 20 40 – 20 40 – 20 40 – 20 40 –
TA = Thigh to Tlow 10 20 – 10 20 – 10 20 – 10 20 – 10 20 –
(Note 7)
Output Sink IO − mA
Current (VID = 10 20 – 10 20 – 10 20 – 10 20 – 10 20 –
−1.0 V,
VCC = 15 V)
TA = 25C
TA = Thigh to Tlow 5.0 8.0 – 5.0 8.0 – 5.0 8.0 – 5.0 8.0 – 5.0 8.0 –
(Note 7)
(VID = −1.0 V, 12 50 – 12 50 – 12 50 – – – – – – – µA
VO = 200 mV,
TA = 25C)
Output Short ISC – 40 60 – 40 60 – 40 60 – 40 60 – 40 60 mA
Circuit to Ground
(Note 8)
Power Supply ICC mA
Current (TA = Thigh to
Tlow) (Note 7)
VCC = 30 V – – 3.0 – 1.4 3.0 – – 3.0 – – 3.0 – – 3.0
VO = 0 V, RL = 
VCC = 5.0 V, – – 1.2 – 0.7 1.2 – – 1.2 – – 1.2 – – 1.2
VO = 0 V, RL = 

7. LM224: Tlow = −25C, Thigh = +85C

LM324/LM324A/LM324E: Tlow = 0C, Thigh = +70C
LM2902/LM2902E: Tlow = −40C, Thigh = +105C
LM2902V & NCV2902: Tlow = −40C, Thigh = +125C
NCV2902 is qualified for automotive use.
8. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end
of the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the
magnitude of VCC.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

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 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
Bias Circuitry
Common to Four
Output Amplifiers

VCC
Q15
Q16 Q14 Q22
Q13
40 k
Q19

5.0 pF Q12 Q24

25 Q23
+

Q18 Q20
Inputs
Q11
Q9
- Q17 Q21
Q6 Q7 Q25
Q2 Q5 Q1 2.4 k
Q8 Q10
Q3 Q4 Q26
2.0 k
VEE/GND
Figure 1. Representative Circuit Diagram
(One−Fourth of Circuit Shown)

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 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
CIRCUIT DESCRIPTION

The LM324 series is made using four internally VCC = 15 Vdc RL = 2.0 kΩ TA = 25C
compensated, two−stage operational amplifiers. The first
stage of each consists of differential input devices Q20
and Q18 with input buffer transistors Q21 and Q17 and
the differential to single ended converter Q3 and Q4. The

V/DIV
first stage performs not only the first stage gain function
but also performs the level shifting and transconductance

1.0
reduction functions. By reducing the transconductance, a
smaller compensation capacitor (only 5.0 pF) can be
employed, thus saving chip area. The transconductance
reduction is accomplished by splitting the collectors of
5.0 µs/DIV
Q20 and Q18.
Another feature of this input stage is that the input
Figure 2. Large Signal Voltage Follower Response
common mode range can include the negative supply or
ground, in single supply operation, without saturating Each amplifier is biased from an internal−voltage
either the input devices or the differential to single−ended regulator which has a low temperature coefficient thus
converter. The second stage consists of a standard current giving each amplifier good temperature characteristics as
source load amplifier stage. well as excellent power supply rejection.

VCC
3.0 V to VCC(max) VCC
1 1.5 V to VCC(max)
1
2
2
3
3
4 1.5 V to VEE(max)
4
VEE
VEE/GND Split Supplies
Single Supply
Figure 3.

70 70

60 60
Phase Margin
( )
PHASE MARGIN

50 50 
GAIN MARGIN (dB)

40 40

30 30

Gain Margin
20 20

10 10

0 0
1.0 10 100 1000 10000
LOAD CAPACITANCE (pF)

Figure 4. Gain and Phase Margin

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5
VCC = 15 V VEE = GND TA = 25C
LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
20
120
18
1.0 10 100 1.0 k 10 k 100 k 1.0

OPEN LOOP VOLTAGE GAIN (dB)

A VOL, LARGE-SIGNAL
100
 VI , INPUT VOLTAGE (V)

16
M f, FREQUENCY (Hz)
14
80
12
60
10
Negative
8.0 40
Positive
6.0
20
4.0
2.0 0
0 -20
0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
 VCC/VEE, POWER SUPPLY VOLTAGES (V)

Figure 5. Input Voltage Range Figure 6. Open Loop Frequency

14
550
VOR, OUTPUT VOLTAGE RANGE (Vpp )

12 RL = 2.0 kΩ VCC = 15 V VEE = GND 500

VO, OUTPUT VOLTAGE (mV) Input
Gain = -100
10 450
RI = 1.0 kΩ RF = 100 kΩ
8.0 400
350
6.0
300
4.0
250 VCC = 30 V
2.0 VEE =
200 GND TA =
0 25C
1.0 10 100 1000 0 C = 50 pF
0 1.0 2.0 3.0 4.0 5.0 L 6.0 7.0 8.0
f, FREQUENCY (kHz)
t, TIME (µs)

Figure 7. Large−Signal Frequency Response Figure 8. Small−Signal Voltage Follower

Pulse Response (Noninverting)

2.4

2.1 TA = 25C RL = ∞
ICC , POWER SUPPLY CURRENT (mA)

90
I IB, INPUT BIAS CURRENT (nA)

1.8

1.5
1.2

0.9 80

0.6

0.3
0 70
0 5.0 10 15 20 25 30 35 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
VCC, POWER SUPPLY VOLTAGE (V) VCC, POWER SUPPLY VOLTAGE (V)

Figure 9. Power Supply Current versus

Figure 10. Input Bias Current versus
Power Supply Voltage
Power Supply Voltage

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 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
50 k

R1
5.0 k
VCC 10 k VCC
VCC R2 Vref -
- 1/4 VO
1/4 VO LM324
LM324
MC1403 + + 1
2.5 V 1 fo = 2 u
Vref = VCC RC
2
R1 R For: fo = 1.0 kHz
V = 2.5 V 1+ R R = 16 kΩ
O
R2 C C = 0.01
C
µF

Figure 11. Voltage Reference Figure 12. Wien Bridge Oscillator

1 R2
e1 +
1/4 CR R Hysteresis
LM324
- VOH
R1 VO
Vref +
- 1/4
a R1 1/4 LM324
R1 LM324 eo VO
Vin -
+ VOL
b R1
1 R1
- VinL = (VOL - Vref) + Vref
1/4
LM324 CR Vref
R1 +
+ R2
R VinL VinH
e2 R1
VinH = (VOH - Vref) + Vref
R1 +
R2

eo = C (1 + a + b) (e2 - e1) R1
H = R1 + R2 (VOH - VOL)

Figure 13. High Impedance Differential Amplifier Figure 14. Comparator with Hysteresis

R
1
fo =
2 u RC
R 100 k
R1 = QR
C1 1
Vref
Vin R2 C C R1
R2 = TBP 2 VCC
- =
R
1/4
LM324 -
1/4 100 k R3 = TN R2
+ LM324 - 1/4
C1 = 10C
+ LM324
Vref + For: fo = 1.0 kHz
Bandpass Vref Q = 10
Vref Output R3 TBP = 1
R1 TN = 1
R2 - C1
1/4 Notch Output R = 160 kΩ
LM324
+ C = 0.001 µF
R1 = 1.6 MΩ
Vref Where: TBP = Center Frequency Gain R2 = 1.6 MΩ
TN = Passband Notch Gain R3 = 1.6 MΩ

Figure 15. Bi−Quad Filter

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 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
1
Vref = V Triangle Wave R2
2 CC Output
Vref 300 k
+
1/4 R3 VCC
LM324 +
75 k 1/4 C
- LM324 R1
R1 Square
- Vin R3 - CO
100 k Wave Output 1/4
C V
Vref
C LM324 O
+ CO = 10 C
Rf R2

R1 + RC R2 R1 Vref 1
f = if R3 =
4 CRf R1 R2 + R1 Vref = 2
VCC

Figure 16. Function Generator Figure 17. Multiple Feedback Bandpass Filter

Given: fo = center frequency

A(fo) = gain at center frequency

Choose value fo, C

Q
Then: R3 =
u fo C
R3
R1 =
2
A(fo)
R1 R3
R2 =
4Q2 R1 - R3
Qo
For less than 10% error from operational amplifier, f < 0.1
o
where fo and BW are expressed in Hz. BW
If source impedance varies, filter may be preceded with
voltage follower buffer to stabilize filter parameters.

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 LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
ORDERING INFORMATION

Device Operating Temperature Range Package Shipping†

LM224DR2G SOIC−14 (Pb−Free) 2500/Tape & Reel
−25C to +85C
LM224DTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel
LM324DR2G SOIC−14 (Pb−Free) 2500/Tape & Reel
LM324EDR2G SOIC−14 (Pb−Free) 2500/Tape & Reel
LM324DTBR2G 0C to +70C TSSOP−14 (Pb−Free) 2500/Tape & Reel
LM324ADR2G SOIC−14 (Pb−Free) 2500/Tape & Reel
LM324ADTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel
LM2902DR2G SOIC−14 (Pb−Free) 2500/Tape & Reel
LM2902EDR2G −40C to +105C SOIC−14 (Pb−Free) 2500/Tape & Reel
LM2902DTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel
LM2902VDR2G SOIC−14 (Pb−Free) 2500/Tape & Reel
LM2902VDTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel
−40C to +125C
NCV2902DR2G* SOIC−14 (Pb−Free)
2500/Tape & Reel
NCV2902DTBR2G* TSSOP−14 (Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.

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9
2902
x24
324A
2902
VALYW▪
ALYW▪
▪▪ LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V,
NCV2902
MARKING DIAGRAMS

SOIC−14
D SUFFIX
CASE 751A

14 14 14 14
LM324ADG AWLYWW LMx24DG LM2902DG LM2902VDG *
AWLYWW AWLYWW AWLYWW

1
1 1 1

14 14
LMx24EG LM2902EG
AWLYWW AWLYWW

1 1

TSSOP−14
DTB SUFFIX
CASE 948G
14 14 14 14

1 1 1 1
x = 2 or 3
A = Assembly
Location WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or ▪ = Pb−Free Package
(Note: Microdot may be in either
location)
*This marking diagram also applies to NCV2902.

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10
H

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

PDIP−14
CASE 646−06
ISSUE S
DATE 22 APR 2015

1 NOTES:
SCALE 1:1
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
D A 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
14 8 E OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
E1 TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
1 TOP VIEW 7
c 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
NOTE 8 b2 B END VIEW CORNERS).
WITH LEADS CONSTRAINED INCHES MILLIMETERS
NOTE 5 DIM MIN MAX MIN MAX
A2 A −−−− 0.210 −−− 5.33
A A1 0.015 −−−− 0.38 −−−
NOTE 3 A2 0.115 0.195 2.92 4.95
b 0.014 0.022 0.35 0.56
L b2 0.060 TYP 1.52 TYP
A1 C 0.008 0.014 0.20 0.36
D 0.735 0.775 18.67 19.69
SEATING
PLANE D1 0.005 −−−− 0.13 −−−
E 0.300 0.325 7.62 8.26
C M E1 0.240 0.280 6.10 7.11
D1 e 0.100 BSC 2.54 BSC
e eB eB −−−− 0.430 −−− 10.92
L 0.115 0.150 2.92 3.81
M −−−− 10  −−− 10 
14X b END VIEW
SIDE VIEW NOTE 6
0.010 M C M B M

GENERIC
MARKING DIAGRAM*
14

XXXXXXXXXXXX
XXXXXXXXXXXX
AWLYYWWG
1
STYLES ON PAGE 2
XXXXX = Specific Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ ▪”,
may or may not be present.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
98ASB42428B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DOCUMENT NUMBER:

 Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 DESCRIPTION: PDIP−14 PAGE 1 OF 2

ON Semiconductor and are tradem

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purp

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 PDIP−14
CASE 646−06
ISSUE S
DATE 22 APR 2015

STYLE 1:
PIN 1. COLLECTOR STYLE 2: STYLE 3: STYLE 4:
2. BASE CANCELLED CANCELLED PIN 1. DRAIN
3. EMITTER 2. SOURCE
4. NO 3. GATE
CONNECTION 4. NO
5. EMITTER CONNECTION
6. BASE 5. GATE
7. COLLECTOR 6. SOURCE
8. COLLECTOR 7. DRAIN
9. BASE 8. DRAIN
10. EMITTER 9. SOURCE
11. NO 10. GATE
CONNECTION 11. NO
12. EMITTER CONNECTION
13. BASE 12. GATE
14. COLLECTOR 13. SOURCE
14. DRAIN
STYLE 5:
PIN 1. GATE STYLE 6: STYLE 7: STYLE 8:
2. DRAIN PIN 1. COMMON CATHODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION
3. SOURCE 2. ANODE/CATHODE 2. ANODE 2. CATHODE
4. NO CONNECTION 3. ANODE/CATHODE 3. ANODE 3. CATHODE
5. SOURCE 4. NO CONNECTION 4. NO CONNECTION 4. NO CONNECTION
6. DRAIN 5. ANODE/CATHODE 5. ANODE 5. CATHODE
7. GATE 6. NO CONNECTION 6. NO CONNECTION 6. NO CONNECTION
8. GATE 7. ANODE/CATHODE 7. ANODE 7. CATHODE
9. DRAIN 8. ANODE/CATHODE 8. ANODE 8. CATHODE
10. SOURCE 9. ANODE/CATHODE 9. ANODE 9. CATHODE
11. NO CONNECTION 10. NO CONNECTION10. NO CONNECTION 10. NO CONNECTION
12. SOURCE 11. ANODE/CATHODE 11. ANODE 11. CATHODE
13. DRAIN 12. ANODE/CATHODE12. ANODE 12. CATHODE
14. GATE 13. NO CONNECTION13. NO CONNECTION 13. NO CONNECTION
14. COMMON ANODE 14. COMMON 14. COMMON ANODE
CATHODE

STYLE 9:
PIN 1. COMMON CATHODE STYLE 10: STYLE 11: STYLE 12:
2. ANODE/CATHODE PIN 1. COMMON PIN 1. CATHODE PIN 1. COMMON CATHODE
3. ANODE/CATHODE CATHODE 2. CATHODE 2. COMMON ANODE
4. NO CONNECTION 2. ANODE/CATHODE 3. CATHODE 3. ANODE/CATHODE
5. ANODE/CATHODE 3. ANODE/CATHODE 4. CATHODE 4. ANODE/CATHODE
6. ANODE/CATHODE 4. ANODE/CATHODE 5. CATHODE 5. ANODE/CATHODE
7. COMMON ANODE 5. ANODE/CATHODE 6. CATHODE 6. COMMON ANODE
8. COMMON ANODE 6. NO CONNECTION 7. CATHODE 7. COMMON CATHODE
9. ANODE/CATHODE 7. COMMON ANODE 8. ANODE 8. ANODE/CATHODE
10. ANODE/CATHODE 8. COMMON 9. ANODE 9. ANODE/CATHODE
11. NO CONNECTION CATHODE 10. ANODE 10. ANODE/CATHODE
12. ANODE/CATHODE 9. ANODE/CATHODE 11. ANODE 11. ANODE/CATHODE
13. ANODE/CATHODE 10. ANODE/CATHODE12. ANODE 12. ANODE/CATHODE
14. COMMON CATHODE 11. ANODE/CATHODE13. ANODE 13. ANODE/CATHODE
12. ANODE/CATHODE14. ANODE 14. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42428B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: PDIP−14 PAGE 2 OF 2

ON Semiconductor and are tradem

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SOIC−14 NB
14 CASE 751A−03
ISSUE L
1
SCALE 1:1 DATE 03 FEB 2016

NOTES:
1. DIMENSIONING AND TOLERANCING PER
D AB ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
14 PROTRUSION. ALLOWABLE PROTRUSION
8
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
A3 4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
H E 5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
MILLIMETERS INCHES
1 7 L DIM MIN MAX MIN MAX
13X b DETAIL A A 1.35 1.75 0.054 0.068
A1 0.10 0.25 0.004 0.010
A3 0.19 0.25 0.008 0.010
0.25 M B M
b 0.35 0.49 0.014 0.019
0.25 M C A S B S D 8.55 8.75 0.337 0.344
E 3.80 4.00 0.150 0.157
e 1.27 BSC 0.050 BSC
H 5.80 6.20 0.228 0.244
DETAIL A h 0.25 0.50 0.010 0.019
h L 0.40 1.25 0.016 0.049
A M 0° 7° 0° 7°
X 45 °

0.10
e M
A1
SEATING
C PLANE

GENERIC
SOLDERING FOOTPRINT* MARKING DIAGRAM*
14
6.50 14X
1.18 XXXXXXXXXG

1 AWLYWW
1

XXXXX = Specific Device Code

1.27 A = Assembly Location
WL = Wafer Lot
PITCH Y = Year
WW = Work Week
G = Pb−Free Package
14X
*This information is generic. Please refer to
0.58
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “▪”, may
or may not be present. Some products
may not follow the Generic Marking.

DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and
soldering details, please download the ON Semiconductor
Soldering and Mounting Techniques Reference Manual,
SOLDERRM/D.

STYLES ON PAGE 2

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42565B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOIC−14 NB PAGE 1 OF 2

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 onsemi and are trademarks of Semiconductor Components Industr
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out

 Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 SOIC−14
CASE 751A−03
ISSUE L
DATE 03 FEB 2016

STYLE 1:
PIN 1. COMMON CATHODE STYLE 2: STYLE 3: STYLE 4:
2. ANODE/CATHODE CANCELLED PIN 1. NO CONNECTION PIN 1. NO CONNECTION
3. ANODE/CATHODE 2. ANODE 2. CATHODE
4. NO CONNECTION 3. ANODE 3. CATHODE
5. ANODE/CATHODE 4. NO CONNECTION 4. NO CONNECTION
6. NO CONNECTION 5. ANODE 5. CATHODE
7. ANODE/CATHODE 6. NO CONNECTION 6. NO CONNECTION
8. ANODE/CATHODE 7. ANODE 7. CATHODE
9. ANODE/CATHODE 8. ANODE 8. CATHODE
10. NO CONNECTION 9. ANODE 9. CATHODE
11. ANODE/CATHODE 10. NO CONNECTION 10. NO CONNECTION
12. ANODE/CATHODE 11. ANODE 11. CATHODE
13. NO CONNECTION 12. ANODE 12. CATHODE
14. COMMON ANODE 13. NO CONNECTION 13. NO CONNECTION
14. COMMON CATHODE 14. COMMON ANODE

STYLE 5: STYLE 6: STYLE 7: STYLE 8:

PIN 1. COMMON CATHODE PIN 1. CATHODE PIN 1. ANODE/CATHODE PIN 1. COMMON CATHODE
2. ANODE/CATHODE 2. CATHODE 2. COMMON ANODE 2. ANODE/CATHODE
3. ANODE/CATHODE 3. CATHODE 3. COMMON CATHODE 3. ANODE/CATHODE
4. ANODE/CATHODE 4. CATHODE 4. ANODE/CATHODE 4. NO CONNECTION
5. ANODE/CATHODE 5. CATHODE 5. ANODE/CATHODE 5. ANODE/CATHODE
6. NO CONNECTION 6. CATHODE 6. ANODE/CATHODE 6. ANODE/CATHODE
7. COMMON ANODE 7. CATHODE 7. ANODE/CATHODE 7. COMMON ANODE
8. COMMON CATHODE 8. ANODE 8. ANODE/CATHODE 8. COMMON ANODE
9. ANODE/CATHODE 9. ANODE 9. ANODE/CATHODE 9. ANODE/CATHODE
10. ANODE/CATHODE 10. ANODE 10. ANODE/CATHODE 10. ANODE/CATHODE
11. ANODE/CATHODE 11. ANODE 11. COMMON CATHODE 11. NO CONNECTION
12. ANODE/CATHODE 12. ANODE 12. COMMON ANODE 12. ANODE/CATHODE
13. NO CONNECTION 13. ANODE 13. ANODE/CATHODE 13. ANODE/CATHODE
14. COMMON ANODE 14. ANODE 14. ANODE/CATHODE 14. COMMON CATHODE

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42565B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOIC−14 NB PAGE 2 OF 2

onsemi and are trademarks of Semiconductor Components Industr

the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out

 Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TSSOP−14
WB CASE
14 948G ISSUE C
DATE 17 FEB 2016
1
SCALE 2:1 14X K REF NOTES:

1. DIMENSIONING AND TOLERANCING PER

0.10 (0.004) M T U S V S ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
0.15 (0.006) T U S 3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
N 0.25 (0.010) EXCEED 0.15 (0.006) PER SIDE.
14 8 4. DIMENSION B DOES NOT INCLUDE
2X L/2 INTERLEAD FLASH OR PROTRUSION.
M INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
L B 5. DIMENSION K DOES NOT INCLUDE DAMBAR
N PROTRUSION. ALLOWABLE DAMBAR
PIN 1 IDENT.
−U− PROTRUSION SHALL BE 0.08 (0.003) TOTAL
F IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
7
DETAIL E 6. TERMINAL NUMBERS ARE SHOWN FOR
1
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
0.15 (0.006) T U S K
A MILLIMETERS INCHES
K1 DIM MIN MAX MIN MAX
−V− A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
J J1 D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
SECTION N−N H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
C −W−
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0° 8° 0° 8°
0.10 (0.004)
−T−
SEATING PLANE
D G GENERIC
H DETAIL E MARKING DIAGRAM*

SOLDERING FOOTPRINT 14

XXXX
XXXX
7.06
ALYW▪
▪
1
1

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
0.65
▪ = Pb−Free Package
PITCH
(Note: Microdot may be in either location)
*This information is generic. Please refer to
14X
14X
device data sheet for actual part marking.
0.36 Pb−Free indicator, “G” or microdot “▪”, may
1.26
DIMENSIONS: MILLIMETERS or may not be present. Some products
may not follow the Generic Marking.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASH70246A Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TSSOP−14 WB PAGE 1 OF 1

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 Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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