S E M I C O N D U C T O R ICL8038

Precision Waveform Generator/

November 1996 Voltage Controlled Oscillator

Features Description
• Low Frequency Drift with Temperature . . . 250ppm/oC The ICL8038 waveform generator is a monolithic integrated
circuit capable of producing high accuracy sine, square, tri-
• Low Distortion . . . . . . . . . . . . . 1% (Sine Wave Output)
angular, sawtooth and pulse waveforms with a minimum of
• High Linearity . . . . . . . . . 0.1% (Triangle Wave Output) external components. The frequency (or repetition rate) can
be selected externally from 0.001Hz to more than 300kHz
• Wide Frequency Range . . . . . . . . . . 0.001Hz to 300kHz using either resistors or capacitors, and frequency modula-
• Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . 2% to 98% tion and sweeping can be accomplished with an external
voltage. The ICL8038 is fabricated with advanced monolithic
• High Level Outputs . . . . . . . . . . . . . . . . . . . . TTL to 28V technology, using Schottky barrier diodes and thin film resis-
• Simultaneous Sine, Square, and Triangle Wave tors, and the output is stable over a wide range of tempera-
Outputs ture and supply variations. These devices may be interfaced
with phase locked loop circuitry to reduce temperature drift
• Easy to Use - Just a Handful of External Components to less than 250ppm/oC.
Required

Ordering Information
PART NUMBER STABILITY TEMP. RANGE (oC) PACKAGE PKG. NO.
ICL8038CCPD 250ppm/oC (Typ) 0 to 70 14 Ld PDIP E14.3
ICL8038CCJD 250ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3
ICL8038BCJD 180ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3
ICL8038ACJD 120ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3
ICL8038BMJD (Note) 350ppm/oC (Max) -55 to 125 14 Ld CERDIP F14.3
ICL8038AMJD (Note) 250ppm/oC (Max) -55 to 125 14 Ld CERDIP F14.3
NOTE: Add /883B to part number if 883 processing is required.

Pinout Functional Diagram

ICL8038
(PDIP, CERDIP) V+
6
TOP VIEW CURRENT
SOURCE
#1 COMPARATOR
I #1
SINE WAVE 1 10
14 NC
ADJUST
2I
SINE COMPARATOR
2 13 NC C
WAVE OUT #2
TRIANGLE
3 12 SINE WAVE
OUT ADJUST

DUTY CYCLE 4 11 V- OR GND

FREQUENCY
ADJUST 5 10 TIMING CURRENT
CAPACITOR SOURCE FLIP-FLOP
SQUARE #2
V+ 6 9
WAVE OUT V- OR GND
11
FM BIAS 7 8 FM SWEEP
INPUT
SINE
BUFFER BUFFER CONVERTER

9 3 2

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. File Number 2864.2
Copyright © Harris Corporation 1996
8-153
 ICL8038

Absolute Maximum Ratings Thermal Information

Supply Voltage (V- to V+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
Input Voltage (Any Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+ CERDIP Package . . . . . . . . . . . . . . . . 75 20
Input Current (Pins 4 and 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA PDIP Package . . . . . . . . . . . . . . . . . . . 115 N/A
Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA Maximum Junction Temperature (Ceramic Package) . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Operating Conditions Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Temperature Range
ICL8038AM, ICL8038BM . . . . . . . . . . . . . . . . . . . -55oC to 125oC
ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . .0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10kΩ, Test Circuit Unless Otherwise Specified

ICL8038CC ICL8038BC(BM) ICL8038AC(AM)

TEST
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS

Supply Voltage Operating Range VSUPPLY

V+ Single Supply +10 - +30 +10 - +30 +10 - +30 V

V+, V- Dual Supplies ±5 - ±15 ±5 - ±15 ±5 - ±5 V

Supply Current ISUPPLY VSUPPLY = ±10V

(Note 2)
8038AM 8038BM - - - 12 15 - 12 15 mA

8038AC, 8038BC, 8038CC 12 20 - 12 20 - 12 20 mA

FREQUENCY CHARACTERISTICS (All Waveforms)

Max. Frequency of Oscillation fMAX 100 - - 100 - - 100 - - kHz

Sweep Frequency of FM Input fSWEEP - 10 - - 10 - - 10 - kHz

Sweep FM Range (Note 3) - 35:1 - - 35:1 - - 35:1 -

FM Linearity 10:1 Ratio - 0.5 - - 0.2 - - 0.2 - %

Frequency Drift with ∆f/∆T

Temperature (Note 5)
8038AC, 8038BC, 8038CC 0oC to 70oC - 250 - - 180 - - 120 ppm/oC
8038AM, 8038BM -55oC to 125oC - - - - 350 - - 250 ppm/oC

Frequency Drift with Supply Volt- ∆f/∆V Over Supply - 0.05 - - 0.05 - 0.05 - %/V
age Voltage Range

OUTPUT CHARACTERISTICS

Square Wave -

Leakage Current IOLK V9 = 30V - - 1 - - 1 - - 1 µA

Saturation Voltage VSAT ISINK = 2mA - 0.2 0.5 - 0.2 0.4 - 0.2 0.4 V

Rise Time tR RL = 4.7kΩ - 180 - - 180 - - 180 - ns

Fall Time tF RL = 4.7kΩ - 40 - - 40 - - 40 - ns

Typical Duty Cycle Adjust ∆D 2 98 2 - 98 2 - 98 %

(Note 6)
Triangle/Sawtooth/Ramp -

Amplitude VTRIAN- RTRI = 100kΩ 0.30 0.33 - 0.30 0.33 - 0.30 0.33 - xVSUPPLY
GLE
Linearity - 0.1 - - 0.05 - - 0.05 - %

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 ICL8038

Electrical Specifications VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10kΩ, Test Circuit Unless Otherwise Specified (Continued)

ICL8038CC ICL8038BC(BM) ICL8038AC(AM)

TEST
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS

Output Impedance ZOUT IOUT = 5mA - 200 - - 200 - - 200 - Ω

Sine Wave
Amplitude VSINE RSINE = 100kΩ 0.2 0.22 - 0.2 0.22 - 0.2 0.22 - xVSUPPLY

THD THD RS = 1MΩ - 2.0 5 - 1.5 3 - 1.0 1.5 %

(Note 4)

THD Adjusted THD Use Figure 4 - 1.5 - - 1.0 - - 0.8 - %

NOTES:
2. RA and RB currents not included.
3. VSUPPLY = 20V; RA and RB = 10kΩ, f ≅ 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B.
4. 82kΩ connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use RA and RB.)
5. Figure 1, pins 7 and 8 connected, VSUPPLY = ±10V. See Typical Curves for T.C. vs VSUPPLY.
6. Not tested, typical value for design purposes only.

Test Conditions

PARAMETER RA RB RL C SW1 MEASURE

Supply Current 10kΩ 10kΩ 10kΩ 3.3nF Closed Current Into Pin 6

Sweep FM Range (Note 7) 10kΩ 10kΩ 10kΩ 3.3nF Open Frequency at Pin 9

Frequency Drift with Temperature 10kΩ 10kΩ 10kΩ 3.3nF Closed Frequency at Pin 3

Frequency Drift with Supply Voltage (Note 8) 10kΩ 10kΩ 10kΩ 3.3nF Closed Frequency at Pin 9

Output Amplitude (Note 10)

Sine 10kΩ 10kΩ 10kΩ 3.3nF Closed Pk-Pk Output at Pin 2

Triangle 10kΩ 10kΩ 10kΩ 3.3nF Closed Pk-Pk Output at Pin 3

Leakage Current (Off) (Note 9) 10kΩ 10kΩ 3.3nF Closed Current into Pin 9

Saturation Voltage (On) (Note 9) 10kΩ 10kΩ 3.3nF Closed Output (Low) at Pin 9

Rise and Fall Times (Note 11) 10kΩ 10kΩ 4.7kΩ 3.3nF Closed Waveform at Pin 9

Duty Cycle Adjust (Note 11)

Max 50kΩ ~1.6kΩ 10kΩ 3.3nF Closed Waveform at Pin 9

Min ~25kΩ 50kΩ 10kΩ 3.3nF Closed Waveform at Pin 9

Triangle Waveform Linearity 10kΩ 10kΩ 10kΩ 3.3nF Closed Waveform at Pin 3

Total Harmonic Distortion 10kΩ 10kΩ 10kΩ 3.3nF Closed Waveform at Pin 2

NOTES:
7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (fHI) and then connecting pin 8 to pin 6 (fLO). Otherwise apply
Sweep Voltage at pin 8 (2/3 VSUPPLY +2V) ≤ VSWEEP ≤ VSUPPLY where VSUPPLY is the total supply voltage. In Figure 5B, pin 8 should
vary between 5.3V and 10V with respect to ground.
8. 10V ≤ V+ ≤ 30V, or ±5V ≤ VSUPPLY ≤ ±15V.
9. Oscillation can be halted by forcing pin 10 to +5V or -5V.
10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V.
11. Not tested; for design purposes only.

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 ICL8038

Test Circuit
+10V
RA RB RL
10K 10K 10K

7 4 5 6 9
SW1
N.C.

8 ICL8038 3
RTRI

10 11 12 2

C RSINE
82K
3300pF
-10V
FIGURE 1. TEST CIRCUIT

Detailed Schematic
CURRENT SOURCES 6
V+
R41 R32
REXT B REXT A
R1 4K 5.2K
8 Q1 5
11K 4 Q14
Q2 Q48 1
7 R8
Q3 Q47 R33
R2 5K
Q R19 200
39K 6 Q4 Q5 Q46

COMPARATOR 800 Q45 R34

Q7 R20 375
Q8 Q9 Q44
10
Q15 Q18 2.7K
R46 Q43 R35
R21
40K
CEXT Q16Q17 330
R9 Q42
5K 10K
R7B R7A Q41
Q10
R3 R25 R26 R27 R45
Q11 15K 10K
30K 33K 33K 33K 33K
Q12 R36
Q30
Q13 Q20 Q21 1600
Q31 Q19 Q22
R4 R5 R6 R28 R29 R30 R31
Q32 100 100 100 R10 33K 33K 33K 33K
5K Q49
Q33 R22
Q50
Q34
R13 R16 R43 10K Q51 R37
620 1.8K 27K R23 330
Q24 Q52
9 R14 Q37 2.7K Q53 R38
Q35 Q39
27K R24 375
R11 Q36 Q Q54
270 38 Q40
R41 3 R44 800 R39
Q23 Q26 Q28 Q55
Q27 200
27K 1K 12
R12 R15 R17 Q56
2.7K 470 4.7K R40
R42 REXTC
Q25 Q29 BUFFER AMPLIFIER 2 5.6K
27K 11 82K
R18
4.7K SINE CONVERTER
FLIP-FLOP

Application Information (See Functional Diagram)

An external capacitor C is charged and discharged by two cur- across it drops linearly with time. When it has reached the level
rent sources. Current source #2 is switched on and off by a flip- of comparator #2 (set at 1/3 of the supply voltage), the flip-flop
flop, while current source #1 is on continuously. Assuming that is triggered into its original state and the cycle starts again.
the flip-flop is in a state such that current source #2 is off, and Four waveforms are readily obtainable from this basic gener-
the capacitor is charged with a current I, the voltage across the ator circuit. With the current sources set at I and 2I respec-
capacitor rises linearly with time. When this voltage reaches the tively, the charge and discharge times are equal. Thus a
level of comparator #1 (set at 2/3 of the supply voltage), the flip- triangle waveform is created across the capacitor and the
flop is triggered, changes states, and releases current source flip-flop produces a square wave. Both waveforms are fed to
#2. This current source normally carries a current 2I, thus the buffer stages and are available at pins 3 and 9.
capacitor is discharged with a net-current I and the voltage

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 ICL8038

The levels of the current sources can, however, be selected The falling portion of the triangle and sine wave and the 0
over a wide range with two external resistors. Therefore, with state of the square wave is:
the two currents set at values different from I and 2I, an
C×V C × 1/3V SUPPLY R R C
asymmetrical sawtooth appears at Terminal 3 and pulses t
A B
= ------------- = ----------------------------------------------------------------------------------- = --------------------------------------
with a duty cycle from less than 1% to greater than 99% are 2 1 V
SUPPLY
V
SUPPLY 0.66 ( 2R A – R B )
2 ( 0.22 ) ------------------------ – 0.22 ------------------------
available at Terminal 9. R R
B A
Thus a 50% duty cycle is achieved when RA = RB.
The sine wave is created by feeding the triangle wave into a
nonlinear network (sine converter). This network provides a If the duty cycle is to be varied over a small range about 50%
decreasing shunt impedance as the potential of the triangle only, the connection shown in Figure 3B is slightly more con-
moves toward the two extremes. venient. A 1kΩ potentiometer may not allow the duty cycle to
be adjusted through 50% on all devices. If a 50% duty cycle
Waveform Timing
is required, a 2kΩ or 5kΩ potentiometer should be used.
The symmetry of all waveforms can be adjusted with the
With two separate timing resistors, the frequency is given by:
external timing resistors. Two possible ways to accomplish
this are shown in Figure 3. Best results are obtained by 1 1
f = ---------------- = ------------------------------------------------------
t1 + t2 RAC  RB 
keeping the timing resistors RA and RB separate (A). RA ------------ 1 + -------------------------
controls the rising portion of the triangle and sine wave and 0.66  2R A – R B 
the 1 state of the square wave.
or, if RA = RB = R
The magnitude of the triangle waveform is set at 1/3
0.33
VSUPPLY; therefore the rising portion of the triangle is, f = ----------- (for Figure 3A)
RC
C × 1/3 × V SUPPLY × R A RA × C Neither time nor frequency are dependent on supply voltage,
C×V
t 1 = -------------- = ------------------------------------------------------------------- = ------------------ even though none of the voltages are regulated inside the
I 0.22 × V SUPPLY 0.66
integrated circuit. This is due to the fact that both currents
and thresholds are direct, linear functions of the supply volt-
age and thus their effects cancel.

FIGURE 2A. SQUARE WAVE DUTY CYCLE - 50% FIGURE 2B. SQUARE WAVE DUTY CYCLE - 80%
FIGURE 2. PHASE RELATIONSHIP OF WAVEFORMS

V+
V+
RA RB RL 1kΩ RL
RA RB

7 4 5 6 9
7 4 5 6 9

8 ICL8038 3
8 ICL8038 3

10 11 12 2
10 11 12 2
C 82K
C 100K
V- OR GND
V- OR GND
FIGURE 3A. FIGURE 3B.
FIGURE 3. POSSIBLE CONNECTIONS FOR THE EXTERNAL TIMING RESISTORS

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 ICL8038

Reducing Distortion output can be made TTL compatible (load resistor con-
To minimize sine wave distortion the 82kΩ resistor between nected to +5V) while the waveform generator itself is pow-
pins 11 and 12 is best made variable. With this arrangement ered from a much higher voltage.
distortion of less than 1% is achievable. To reduce this even
Frequency Modulation and Sweeping
further, two potentiometers can be connected as shown in
Figure 4; this configuration allows a typical reduction of sine The frequency of the waveform generator is a direct function
wave distortion close to 0.5%. of the DC voltage at Terminal 8 (measured from V+). By
altering this voltage, frequency modulation is performed. For
V+ small deviations (e.g. ±10%) the modulating signal can be
1kΩ RL applied directly to pin 8, merely providing DC decoupling
RA RB
with a capacitor as shown in Figure 5A. An external resistor
between pins 7 and 8 is not necessary, but it can be used to
7 4 5 6 9
increase input impedance from about 8kΩ (pins 7 and 8 con-
nected together), to about (R + 8kΩ).
8 ICL8038 3 For larger FM deviations or for frequency sweeping, the
modulating signal is applied between the positive supply
voltage and pin 8 (Figure 5B). In this way the entire bias for
10 11 12 1 2
the current sources is created by the modulating signal, and
100kΩ 10kΩ
a very large (e.g. 1000:1) sweep range is created (f = 0 at
C
100kΩ
VSWEEP = 0). Care must be taken, however, to regulate the
supply voltage; in this configuration the charge current is no
10kΩ
longer a function of the supply voltage (yet the trigger thresh-
V- OR GND olds still are) and thus the frequency becomes dependent on
the supply voltage. The potential on Pin 8 may be swept
FIGURE 4. CONNECTION TO ACHIEVE MINIMUM SINE WAVE down from V+ by (1/3 VSUPPLY - 2V).
DISTORTION
V+
Selecting RA, RB and C
RA RB RL
For any given output frequency, there is a wide range of RC
combinations that will work, however certain constraints are
7 4 5 6 9
placed upon the magnitude of the charging current for opti-
mum performance. At the low end, currents of less than 1µA R
are undesirable because circuit leakages will contribute sig- 8 ICL8038 3
nificant errors at high temperatures. At higher currents
(I > 5mA), transistor betas and saturation voltages will con-
tribute increasingly larger errors. Optimum performance will, FM
10 11 12 2
therefore, be obtained with charging currents of 10µA to
1mA. If pins 7 and 8 are shorted together, the magnitude of C 81K
the charging current due to RA can be calculated from:
V- OR GND
R 1 × ( V+ – V- ) 1 0.22 ( V+ – V- )
I = ---------------------------------------- × -------- = ------------------------------------ FIGURE 5A. CONNECTIONS FOR FREQUENCY MODULATION
( R1 + R2 ) RA RA

R1 and R2 are shown in the Detailed Schematic.

V+
A similar calculation holds for RB.
SWEEP RA RB RL
The capacitor value should be chosen at the upper end of its VOLTAGE
possible range. 4 5 6 9
Waveform Out Level Control and Power Supplies
The waveform generator can be operated either from a sin- 8 ICL8038 3
gle power supply (10V to 30V) or a dual power supply (±5V
to ±15V). With a single power supply the average levels of
the triangle and sine wave are at exactly one-half of the sup-
10 11 12 2
ply voltage, while the square wave alternates between V+
and ground. A split power supply has the advantage that all
C 81K
waveforms move symmetrically about ground.
V- OR GND
The square wave output is not committed. A load resistor
can be connected to a different power supply, as long as the FIGURE 5B. CONNECTIONS FOR FREQUENCY SWEEP
applied voltage remains within the breakdown capability of FIGURE 5.
the waveform generator (30V). In this way, the square wave

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 ICL8038

Typical Applications
The sine wave output has a relatively high output impedance
+10V
(1kΩ Typ). The circuit of Figure 6 provides buffering, gain
1N457
and amplitude adjustment. A simple op amp follower could
also be used. DUTY CYCLE

0.1µF 15K
1K
V+ 4.7K 4.7K

RA RB

AMPLITUDE 5 4 6 9
7 4 5 6 2

+
100K 741 10K
FREQ. 8 ICL8038 3
8 ICL8038 -
20K

4.7K 10 11 12 2
10 11

C
20K ≈15M 0.0047µF DISTORTION
100K
-10V
V-

IGURE 8. VARIABLE AUDIO OSCILLATOR, 20Hz TO 20kHzY

FIGURE 6. SINE WAVE OUTPUT BUFFER AMPLIFIERS

With a dual supply voltage the external capacitor on Pin 10 can

be shorted to ground to halt the ICL8038 oscillation. Figure 7
shows a FET switch, diode ANDed with an input strobe signal
to allow the output to always start on the same slope.

V+

RA RB 15K

7 4 5 9

8 ICL8038
1N914

2
11 10

1N914
C 2N4392 STROBE
100K
-15V
OFF
+15V (+10V)
-15V (-10V)
ON

FIGURE 7. STROBE TONE BURST GENERATOR

To obtain a 1000:1 Sweep Range on the ICL8038 the volt-

age across external resistors RA and RB must decrease to
nearly zero. This requires that the highest voltage on control
Pin 8 exceed the voltage at the top of RA and RB by a few
hundred mV. The Circuit of Figure 8 achieves this by using a
diode to lower the effective supply voltage on the ICL8038.
The large resistor on pin 5 helps reduce duty cycle variations
with sweep.
The linearity of input sweep voltage versus output frequency
can be significantly improved by using an op amp as shown
in Figure 9.

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 ICL8038

V2+
DUTY
CYCLE
R1
FREQUENCY TRIANGLE
ADJUST OUT
FM BIAS
V1+ 6
7 4 5 3
SQUARE SINE WAVE
WAVE OUT
OUT
9 ICL8038 2

VCO DEMODULATED
IN SINE WAVE
INPUT PHASE AMPLIFIER FM 1
8 10 11 12 ADJ.
DETECTOR R2

TIMING SINE WAVE

CAP. ADJ.
LOW PASS
FILTER
V-/GND

FIGURE 9. WAVEFORM GENERATOR USED AS STABLE VCO IN A PHASE-LOCKED LOOP

HIGH FREQUENCY
SYMMETRY
10kΩ 100kΩ
500Ω
1N753A
4.7kΩ 4.7kΩ
(6.2V) 1MΩ
1kΩ 100kΩ
1,000pF LOW FREQUENCY
4 5 6 9 SYMMETRY
+15V

- 1kΩ SINE WAVE

ICL8038 +15V OUTPUT
741 8 3
FUNCTION GENERATOR
+ -
-VIN P4 741
+ +
10 11 12 2
10kΩ 50µF
OFFSET 100kΩ 15V
3,900pF SINE WAVE
DISTORTION

-15V

FIGURE 10. LINEAR VOLTAGE CONTROLLED OSCILLATOR

Use in Phase Locked Loops

Its high frequency stability makes the ICL8038 an ideal Second, the DC output level of the amplifier must be made
building block for a phase locked loop as shown in Figure 10. compatible to the DC level required at the FM input of the
In this application the remaining functional blocks, the phase waveform generator (pin 8, 0.8V+). The simplest solution here
detector and the amplifier, can be formed by a number of is to provide a voltage divider to V+ (R1, R2 as shown) if the
available ICs (e.g., MC4344, NE562, HA2800, HA2820). amplifier has a lower output level, or to ground if its level is
higher. The divider can be made part of the low-pass filter.
In order to match these building blocks to each other, two
steps must be taken. First, two different supply voltages are This application not only provides for a free-running fre-
used and the square wave output is returned to the supply of quency with very low temperature drift, but is also has the
the phase detector. This assures that the VCO input voltage unique feature of producing a large reconstituted sinewave
will not exceed the capabilities of the phase detector. If a signal with a frequency identical to that at the input.
smaller VCO signal is required, a simple resistive voltage
For further information, see Harris Application Note AN013,
divider is connected between pin 9 of the waveform genera-
“Everything You Always Wanted to Know About the
tor and the VCO input of the phase detector.
ICL8038”.

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 ICL8038

Definition of Terms
Supply Voltage (VSUPPLY). The total supply voltage from Output Amplitude. The peak-to-peak signal amplitude
V+ to V-. appearing at the outputs.
Supply Current. The supply current required from the Saturation Voltage. The output voltage at the collector of
power supply to operate the device, excluding load currents Q23 when this transistor is turned on. It is measured for a
and the currents through RA and RB. sink current of 2mA.
Frequency Range. The frequency range at the square wave Rise and Fall Times. The time required for the square wave
output through which circuit operation is guaranteed. output to change from 10% to 90%, or 90% to 10%, of its
Sweep FM Range. The ratio of maximum frequency to mini- final value.
mum frequency which can be obtained by applying a sweep Triangle Waveform Linearity. The percentage deviation
voltage to pin 8. For correct operation, the sweep voltage from the best fit straight line on the rising and falling triangle
should be within the range: waveform.
(2/3 VSUPPLY + 2V) < VSWEEP < VSUPPLY Total Harmonic Distortion. The total harmonic distortion at
FM Linearity. The percentage deviation from the best fit the sine wave output.
straight line on the control voltage versus output frequency
curve.

Typical Performance Curves

20 1.03

1.02
NORMALIZED FREQUENCY
SUPPLY CURRENT (mA)

-55oC
15 1.01

125oC 1.00

10 25oC 0.99

0.98

5
5 10 15 20 25 30 5 10 15 20 25 30
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)

FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 12. FREQUENCY vs SUPPLY VOLTAGE

1.03 200

1.02
NORMALIZED FREQUENCY

RISE TIME
10 150 125oC
1.01 25oC
20
TIME (ns)

30 -55oC
1.00
20
100 125oC
10 30 25oC
0.99 FALL TIME
-55oC
50
0.98

0
-50 -25 0 25 75 125 0 2 4 6 8 10
TEMPERATURE (oC) LOAD RESISTANCE (kΩ)

FIGURE 13. FREQUENCY vs TEMPERATURE FIGURE 14. SQUARE WAVE OUTPUT RISE/FALL TIME vs
LOAD RESISTANCE

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 ICL8038

Typical Performance Curves (Continued)

2 1.0

NORMALIZED PEAK OUTPUT VOLTAGE

LOAD CURRENT 125oC
TO V -
25oC
SATURATION VOLTAGE

1.5
0.9
-55oC
125oC
1.0
25oC
-55oC
0.8
LOAD CURRENT TO V+
0.5

0
0 2 4 6 8 10 0 2 4 6 8 10 12 14 16 18 20
LOAD CURRENT (mA) LOAD CURRENT (mA)

FIGURE 15. SQUARE WAVE SATURATION VOLTAGE vs LOAD FIGURE 16. TRIANGLE WAVE OUTPUT VOLTAGE vs LOAD
CURRENT CURRENT

1.2 10.0
NORMALIZED OUTPUT VOLTAGE

1.1

1.0 1.0
LINEARITY (%)

0.9

0.8 0.1

0.7

0.6 0.01
10 100 1K 10K 100K 1M 10 100 1K 10K 100K 1M

FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 17. TRIANGLE WAVE OUTPUT VOLTAGE vs FIGURE 18. TRIANGLE WAVE LINEARITY vs FREQUENCY
FREQUENCY

1.1 12
NORMALIZED OUTPUT VOLTAGE

10
DISTORTION (%)

1.0 8

0.9 4
UNADJUSTED ADJUSTED

0
10 100 1K 10K 100K 1M 10 100 1K 10K 100K 1M
FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 19. SINE WAVE OUTPUT VOLTAGE vs FREQUENCY FIGURE 20. SINE WAVE DISTORTION vs FREQUENCY

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