CD4511BMS
CD4511BMS
CMOS BCD-to-7-Segment
December 1992
                                                                                                                    Latch Decoder Drivers
   Features                                                                        Pinout
   • High Voltage Type (20V Rating)                                                                                    CD4511BMS
                                                                                                                        TOP VIEW
   • High Output Sourcing Capability up to 25mA
   • Input Latches for BCD Code Storage
                                                                                                             B    1                16 VDD
   • Lamp Test and Blanking Capability
                                                                                                             C    2                15 f
   • 7 Segment Outputs Blanked for BCD Input Codes
                                                                                                             LT   3                14 g
     > 1001
                                                                                                             BL   4                13 a
   • 100% Tested for Quiescent Current at 20V
                                                                                                 LE/STROBE 5                       12 b
   • 5V, 10V and 15V Parametric Ratings
                                                                                                             D    6                11 c
   • Maximum Input Current of 1µA at 18V Over Full Pack-                                                     A    7                10 d
     age Temperature Range; 100nA at 18V and +25oC
                                                                                                         VSS      8                9 e
   Applications
   • Driving Common Cathode LED Displays
   • Multiplexing with Common Cathode LED Displays
   • Driving Incandescent Displays                                                 Functional Diagram
   • Driving Low Voltage Fluorescent Displays
                                                                                                                      LT
                                                                                                                           3
   Description                                                                                                                              13
                                                                                                                                                 a
                                                                                                     7
                                                                                                 A                                          12
   CD4511BMS is a BCD-to-7-Segment latch decoder drivers                                                                                         b
   constructed with CMOS logic and n-p-n bipolar transistor                                          1
                                                                                                                               D    D       11
                                                                                                 B           L                 E                 c
   output devices on a single monolithic structure. These                                                                           R                7
                                                                                      BCD                    A                 C            10
                                                                                                                                    I            d   SEGMENT
   devices combine the low quiescent power dissipation and                                                   T                 O
                                                                                   INPUTS                                           V                OUTPUTS
                                                                                                     2       C                 D             9
   high noise immunity features of Intersil CMOS with n-p-n                                      C                                  E
                                                                                                             H                 E                 e
                                                                                                                                    R
   bipolar output transistors capable of sourcing up to 25mA.                                                                  R
                                                                                                                                            15
                                                                                                     6                                           f
   This capability allows the CD4511BMS types to drive LED’s                                     D                                          14
   and other displays directly.                                                                                                                  g
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.                                    File Number    3339
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
                                                                             7-1169
                                                           Specifications CD4511BMS
                                                                                                                                                      LIMITS
                                                                                            GROUP A
      PARAMETER                 SYMBOL               CONDITIONS (NOTE 1)                   SUBGROUPS               TEMPERATURE                  MIN       MAX       UNITS
Supply Current                      IDD       VDD = 20V, VIN = VDD or GND                           1                     +25oC                   -         10        µA
                                                                                                    2                    +125oC                   -       1000        µA
                                              VDD = 18V, VIN = VDD or GND                           3                     -55oC                   -         10        µA
Input Leakage Current               IIL       VIN = VDD or GND             VDD = 20                 1                     +25oC                 -100           -       nA
                                                                                                    2                    +125oC                -1000           -       nA
                                                                           VDD = 18V                3                     -55oC                 -100           -       nA
Input Leakage Current               IIH       VIN = VDD or GND             VDD = 20                 1                     +25oC                   -        100         nA
                                                                                                    2                    +125oC                   -       1000         nA
                                                                           VDD = 18V                3                     -55oC                   -        100         nA
Output Voltage                    VOL15       VDD = 15V, No Load                                 1, 2, 3        +25oC,   +125oC,     -55oC        -         50        mV
Output Voltage                   VOH15        VDD = 15V, No Load (Note 3)                           1                     +25oC                 14.1           -       V
                                                                                                    2                    +125oC                 14.2                   V
                                                                                                    3                     -55oC                 14.0                   V
Output Current (Sink)              IOL5       VDD = 5V, VOUT = 0.4V                                 1                     +25oC                   1            -      mA
Output Current (Sink)             IOL10       VDD = 10V, VOUT = 0.5V                                1                     +25oC                  2.6           -      mA
Output Current (Sink)             IOL15       VDD = 15V, VOUT = 1.5V                                1                     +25oC                  6.8           -      mA
Output Drive Voltage             LVOH5        VDD = 5V, IOH = -20mA                                 1                     +25oC                  3.4           -       V
Output Drive Voltage             LVOH10 VDD = 10V, IOH = -20mA                                      1                     +25oC                  8.6           -       V
Output Drive Voltage             LVOH15 VDD = 15V, IOH = -20mA                                      1                     +25oC                 13.7           -       V
N Threshold Voltage               VNTH        VDD = 10V, ISS = -10µA                                1                     +25oC                 -2.8       -0.7        V
P Threshold Voltage               VPTH        VSS = 0V, IDD = 10µA                                  1                     +25oC                  0.7        2.8        V
Functional                           F        VDD = 2.8V, VIN = VDD or GND                          7                     +25oC               VOH > VOL <              V
                                                                                                                                              VDD/2 VDD/2
                                              VDD = 20V, VIN = VDD or GND                           7                     +25oC
                                              VDD = 18V, VIN = VDD or GND                          8A                    +125oC
                                              VDD = 3V, VIN = VDD or GND                           8B                     -55oC
Input Voltage Low                   VIL       VDD = 5V, VOH > 3.6V, VOL < 0.5V                   1, 2, 3        +25oC,   +125oC, -55oC            -         1.5        V
(Note 2)
Input Voltage High                  VIH       VDD = 5V, VOH > 3.6V, VOL < 0.5V                   1, 2, 3        +25oC, +125oC, -55oC             3.5           -       V
(Note 2)
Input Voltage Low                   VIL       VDD = 15V, VOH > 12.6V,                            1, 2, 3        +25oC, +125oC, -55oC              -          4         V
(Note 2)                                      VOL < 1.5V
Input Voltage High                  VIH       VDD = 15V, VOH > 12.6V,                            1, 2, 3        +25oC, +125oC, -55oC             11            -       V
(Note 2)                                      VOL < 1.5V
NOTES: 1. All voltages referenced to device GND, 100% testing being                          3. For accuracy, voltage is measured differentially to VDD
          implemented.
       2. Go/No Go test with limits applied to inputs.
                                                                                 7-1170
                                            Specifications CD4511BMS
                                                                                                          LIMITS
                                                                       GROUP A
     PARAMETER           SYMBOL        CONDITIONS (NOTE 1, 2)         SUBGROUPS TEMPERATURE          MIN       MAX      UNITS
Propagation Delay          TPHL      VDD = 5V, VIN = VDD or GND            9           +25oC          -        1040      ns
Data to Output
                                                                         10, 11    +125oC,   -55oC    -        1404      ns
Propagation Delay          TPLH      VDD = 5V, VIN = VDD or GND            9           +25oC          -        1320      ns
Data to Output
                                                                         10, 11    +125oC,   -55oC    -        1782      ns
Transition Time            TTHL      VDD = 5V, VIN = VDD or GND            9           +25oC          -        310       ns
                                                                         10, 11    +125oC,   -55oC    -        419       ns
Transition Time            TTLH      VDD = 5V, VIN = VDD or GND            9           +25oC          -            80    ns
                                                                         10, 11    +125oC,   -55oC    -        108       ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
                                                             7-1171
                                        Specifications CD4511BMS
                                                          7-1172
                                                  Specifications CD4511BMS
                                                                                                                          LIMITS
      PARAMETER                SYMBOL              CONDITIONS                  NOTES         TEMPERATURE            MIN         MAX     UNITS
Supply Current                    IDD      VDD = 20V, VIN = VDD or GND           1, 4             +25oC               -            25    µA
N Threshold Voltage             VNTH       VDD = 10V, ISS = -10µA                1, 4             +25oC              -2.8       -0.2     V
N Threshold Voltage              ∆VTN      VDD = 10V, ISS = -10µA                1, 4             +25oC               -            ±1    V
Delta
P Threshold Voltage              VTP       VSS = 0V, IDD = 10µA                  1, 4             +25oC              0.2        2.8      V
P Threshold Voltage              ∆VTP      VSS = 0V, IDD = 10µA                  1, 4             +25oC               -            ±1    V
Delta
Functional                         F       VDD = 18V, VIN = VDD or GND            1               +25oC            VOH >      VOL <      V
                                                                                                                   VDD/2      VDD/2
                                           VDD = 3V, VIN = VDD or GND
Propagation Delay Time           TPHL      VDD = 5V                           1, 2, 3, 4          +25oC               -       1.35 x     ns
                                 TPLH                                                                                         +25oC
                                                                                                                               Limit
NOTES: 1. All voltages referenced to device GND.                             3. See Table 2 for +25oC limit.
           2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.                     4. Read and Record
                                           MIL-STD-883
    CONFORMANCE GROUP                       METHOD                  GROUP A SUBGROUPS                             READ AND RECORD
Initial Test (Pre Burn-In)                  100% 5004                         1, 7, 9                        IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)               100% 5004                         1, 7, 9                        IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)               100% 5004                         1, 7, 9                        IDD, IOL5, IOH5A
                                                                    7-1173
                                               Specifications CD4511BMS
                                        MIL-STD-883
    CONFORMANCE GROUP                    METHOD                   GROUP A SUBGROUPS                          READ AND RECORD
  PDA (Note 1)                           100% 5004                         1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)            100% 5004                             1, 7, 9                IDD, IOL5, IOH5A
  PDA (Note 1)                           100% 5004                         1, 7, 9, Deltas
Final Test                               100% 5004                     2, 3, 8A, 8B, 10, 11
Group A                                 Sample 5005               1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B            Subgroup B-5         Sample 5005           1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas   Subgroups 1, 2, 3, 9, 10, 11
                   Subgroup B-6         Sample 5005                            1, 7, 9
Group D                                 Sample 5005                       1, 2, 3, 8A, 8B, 9          Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
                                                                                                                 OSCILLATOR
  FUNCTION              OPEN              GROUND                 VDD                     9V ± -0.5V      50kHz               25kHz
Static Burn-In 1         9-15                1-8                  16
(Note 1)
Static Burn-In 2         9-15                 8                 1-7, 16
(Note 1)
Dynamic Burn-            9-15                5, 8               3, 4, 16                     -           1, 2, 7                6
In (Note 1)
Irradiation              9-15                 8                 1-7, 16
(Note 2)
NOTES:
 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
    VDD = 10V ± 0.5V
                                                                 7-1174
                                            CD4511BMS
Logic Diagram
                                                                                                    VDD
                                                                                     DRIVER
                                                           (BL)                      LOGIC
                                                                                                          IOH
                                                            *                                                   +
                                    P
                                   TG
                                    N                                                                   VOH
                                                                                                           -
                                                                                              VSS
                                                                                                     OUTPUT
                       P                                                                             DRIVERS
        A
            *         TG                                                                                            a
                       N
                                    P
                                   TG                                                                               b
                                    N
                       P
        B
            *         TG
                       N                                                                                            c
                                    P
                                   TG
                                    N                                                                               d
                       P
        C
            *         TG
                       N                                                                                            e
                                    P
                                   TG
                                    N                                                                               f
                       P
        D
            *         TG
                       N
                                                                                                                    g
LE/STROBE
            *
                                                                                                                             VDD
                                                                                 *
                                                                                 LT
TRUTH TABLE
LE BI LT D C B A a b c d e f g DISPLAY
X X 0 X X X X 1 1 1 1 1 1 1
X 0 1 X X X X 0 0 0 0 0 0 0 Blank
0 1 1 0 0 0 0 1 1 1 1 1 1 0
0 1 1 0 0 0 1 0 1 1 0 0 0 0
0 1 1 0 0 1 0 1 1 0 1 1 0 1
0 1 1 0 0 1 1 1 1 1 1 0 0 1
0 1 1 0 1 0 0 0 1 1 0 0 1 1
0 1 1 0 1 0 1 1 0 1 1 0 1 1
                                              7-1175
                                                                                                   CD4511BMS
LE BI LT D C B A a b c d e f g DISPLAY
0 1 1 0 1 1 0 0 0 1 1 1 1 1
0 1 1 0 1 1 1 1 1 1 0 0 0 0
0 1 1 1 0 0 0 1 1 1 1 1 1 1
0 1 1 1 0 0 1 1 1 1 0 0 1 1
0 1 1 1 0 1 0 0 0 0 0 0 0 0 Blank
0 1 1 1 0 1 1 0 0 0 0 0 0 0 Blank
0 1 1 1 1 0 0 0 0 0 0 0 0 0 Blank
0 1 1 1 1 0 1 0 0 0 0 0 0 0 Blank
0 1 1 1 1 1 0 0 0 0 0 0 0 0 Blank
0 1 1 1 1 1 1 0 0 0 0 0 0 0 Blank
1 1 1 X X X X * *
X = Don’t Care
* Depends on BCD code previously applied when LE = 0
NOTE: Display is blank for all illegal input codes (BCD > 1001).
                                                                                                                                                   100
                                          5
                                                             5V
                                                                                                                                                             AMBIENT TEMPERATURE (TA) = +25oC
                                               0            5        10       15                                                                         0       25        50           75        100
                                                           DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
                                                                                                                                                                  LOAD CAPACITANCE (CL) (pF)
 FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT                                                              FIGURE 3. TYPICAL DATA-TO-OUTPUT, LOW-TO-HIGH-LEVEL
            CHARACTERISTICS                                                                                         PROPAGATION DELAY TIME AS A FUNCTION OF
                                                                                                                    LOAD CAPACITANCE
                                                                                                     7-1176
                                                                                                                                                      CD4511BMS
600 60
400 40 10V
                                                                                                                                                                                                                                                                                  15V
                                        300                                                                                                                                                                       30
                                                                                                                                               10V
                                        200                                                                                                                                                                       20
                                                                                                                                           15V
                                        100                                                                                                                                                                       10
                                              0                 25           50                                               75                 100                                                                   0                25              50         75           100
                                                                 LOAD CAPACITANCE (CL) (pF)                                                                                                                                                 LOAD CAPACITANCE (CL) (pF)
                                         500
                                                                              SUPPLY VOLTAGE (VDD) = 5V
          TRANSITION TIME (tTHL) (ns)
                                                                                                                                                                                                                                                             10V
                                                                                                                                                                                                                 25    SUPPLY VOLTAGE (VDD) = 15V
                                                                                                                                                                                                                                                                   5V
                                         400
                                                                                                                                                                                                                 20
                                         300
                                                                                                                                     10V                                                                         15
                                                                                                                                         15V
                                         200                                                                                                                                                                     10
                                                                                                                                                                                                                 5
                                         100
                                                                                                                                                                                                                       0        0.5         1         1.5
                                                  0       100         200   300    400   500
                                                                                                                                                                                                                      SUPPLY VOLTAGE - OUTPUT DRIVE VOLTAGE (VDD - VOH) (V)
                                                                     LOAD CAPACITANCE (CL) (pF)
 FIGURE 6. TYPICAL HIGH-TO-LOW TRANSITION TIME AS A                                                                                                                           FIGURE 7. TYPICAL VOLTAGE DROP (VDD TO OUTPUT) vs OUT-
           FUNCTION OF LOAD CAPACITANCE                                                                                                                                                 PUT SOURCE CURRENT AS A FUNCTION OF SUPPLY
                                                                                                                        105 8
                                                                                                                            6 AMBIENT TEMPERATURE (T ) = +25oC
                                                                                  DYNAMIC POWER DISSIPATION (PD) (µW)
                                                                                                                            4                         A
                                                                                                                            2
                                                                                                                        104 8
                                                                                                                            6
                                                                                                                            4
                                                                                                                            2  SUPPLY VOLTS (VDD) = 15V
                                                                                                                        103 8
                                                                                                                            6
                                                                                                                            4
                                                                                                                                                                                                                                  10V
                                                                                                                            2
                                                                                                                        102 8                                                                                               10V
                                                                                                                            6                                                                                          5V
                                                                                                                            4
                                                                                                                            2
                                                                                                                        101 8
                                                                                                                              6                                                                                         CL = 50pF
                                                                                                                              4
                                                                                                                              2                                                                                         CL = 15pF
                                                                                                                        100
                                                                                                                                     2    4 68         2   4 68   2             4 68                                   2     4 68       2    4 68
                                                                                                                              10-2             10-1          100       101                                                        102           103
                                                                                                                                                           FREQUENCY (f) (kHz)
                                                                                                                                                             7-1177
                                                                             CD4511BMS
                                                             VDD
                                                        LT                     VDD
                                        A
                          BCD           B         LATCH
                       INPUTS           C           8                                               ISEG
                                        D        DECODER                                        a          R
                                       LE                                             +         b          R
                                         BL                                           VOH
                                                                                      -         c          R
                         TO VDD                                        VSS
                                                                                                d          R
                                                                                   VDD
                                                                                                e          R
f R
                                                                                                g          R
                                                                                                                                   VDF
                                                                                                                                    +
                                                 CD4511BMS
                                                                                                                                       -
FIGURE 9. DRIVING COMMON CATHODE 7-SEGMENT LED DISPLAYS (EXAMPLE HEWLET-PACKARD 5082-7740)
                    LT                 VDD                                                                     LT                  VDD = 5V
                                             a                                                                                     a
              A                                                                                            A
                                             b                                                                                     b
              B                                                                                            B
                                             c                                                                                     c
              C                                                                                            C
                                                                                                                     CD4511BMS
                           CD4511BMS
                                             d                                                                                     d
              D                                                                                            D                               VDD       VDD
                                             e                                                                                     e
                                                                                                          LE
                                             f                                                                                         f      R≈
             LE                                                                                     VDD                                                  R ≈ 400Ω
                                             g                                                                                     g          400Ω
                                                                                                          BL
                                                                   1.6V
             BL
                                                                   AC OR DC
       VDD
VSS VSS
FIGURE 10. DRIVING LOW VOLTAGE FLOURESCENT DISPLAYS                                         FIGURE 11. DRIVING INCANDESCENT DISPLAYS (RCA NU-
                                                                                                       MITRON DR2000 SERIES DISPLAYS)
 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
                                       For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
                                                                                      1178
                                                                               CD4511BMS
                                                                   CD4511BMS
                                                          C
TRANSISTORS T1 - T4 (2N3053 OR 2N2102)                                              d
HAVE IC MAX. RATING > 7 x ISEG                            D
                                                                                    e
DUTY CYCLE = 25%                                         LE
                                                                                    f
                                                   VDD                                       R
ISEG = (IDIODEAVG) x 4                                                              g
     (VOH - VDF-VCE)                                      BL                        +              +
R=
          ISEG                                              VSS                     - VOH              VDF
                                                                                                   -
                                                                                                               +
                                                                                                               VCE
                                      VO1     12     2                         Q0        4               T1    -
                                                                                                         VSS
                            1          V02    11     3           Q1                      5                                   T2
                                CD4024BMS                 CD4555BMS
                                                                                                                             VSS
                            2         VO3     9      1           Q2                      6                                                           T3
                                                                                                                                                     VSS
                                                                               Q3        7                                                                             T4
                                                   VSS
                                                                                                                                                                       VSS
FIGURE 12. MULTIPLEXING WITH COMMON CATHODE 7-SEGMENT LED DISPLAYS (EXAMPLE HEWLET-PACKARD 5082-7404
           4 CHARACTER DISPLAY OR 4 DISCRETE MONOSANTO MAN 3 DISPLAYS)
Waveforms
                                                                                                                      20ns
                       tr             tf                                                                                                                       VDD
                                                                                    VDD                                                  90%
                                                                                                                          10%          50%
                                                               90%                                       LE                                                    0
           DATA                                                                                                             tSU                 tHOLD
                                                               50%                                                                                             VDD
          INPUT                                                                                                              90%
                                                               10%                                   DATA          50%
                                                                                     0                                                           50%
                                                                                                   INPUTS        10%
                                                                                                                                                                0
                            tTHL           tTLH                                                               20ns                                        FOR SETUP
                                                                                    VDD                                                        VDD
                                                               90%                                                                                          FOR HOLD
                                                                                                  OUTPUT                                                               0
                                                               50%
        OUTPUT                                                                                                 20ns                                  20ns
                                                               10%                                STROBE
                                                                                     0                            90%
                tPHL                               tPLH                                                            50%
tr, tf = 20ns                                                                                                       10%
                                                                                                   tr, tf = 20ns
                                                                                                                                  tW
7-1179