September 1995

Edition 4.0a
DATA SHEET

MB1507
SERIAL INPUT PLL FREQUENCY SYNTHESIZER

SERIAL INPUT PLL FREQUENCY SYNTHESIZER

WITH 2.0GHZ PRESCALER

The Fujitsu MB1507 is a single chip serial input PLL frequency synthesizer designed for
Broadcast Satelite tuner and cellular telephone applications.
It contains a 2.0 GHZ dual modulus prescaler which enables pulse swallow function, and an
analog switch to speed up lock up time.
It operates supply voltage of 5.0V typ. and dissipates 18mA typ. of current realized through the
use of Fujitsu’s unique U-ESBIC Bi-CMOS technology.

• High operating frequency: fIN MAX=2.0GHZ (PIN MIN=–4dBm)

• Pulse swallow function: 128/129 or 256/257
• Low supply current: ICC=18mA typ.
• Serial input 19-bit programmable divider consisting of:
Binary 8-bit swallow counter: 0 to 255
Binary 11-bit programmable counter: 16 to 2047
• Serial input 15-bit programmable reference divider consisting of: PLASTIC PACKAGE
Binary 14-bit programmable reference counter: 8 to 16383 FPT-16P-M06
1-bit switch counter (SW) Sets divide ratio of prescaler
• On-chip analog switch achieves fast lock up time
• 2types of phase detector output
On-chip charge pump (Bipolar type) PIN ASSIGNMENT
Output for external charge pump
• Wide operating temperature: –40°C to +85°C
• 16-pin Plastic Flat Package (Suffix: –PF)

OSCIN 1 16 ØR

OSCOUT 2 15 ØP

VP 3 14 fOUT

VCC 4 13 BISW
TOP VIEW
ABSOLUTE MAXIMUM RATINGS (see NOTE) DO 5 12 FC

Rating Symbol Value Unit GND 6 11 LE

VCC –0.5 to +7.0 V LD 7 10 Data

Power Supply Voltage
VP VCC to 10.0 V fIN 8 9 Clock

Output Voltage VOUT –0.5 to VCC +0.5 V

Open-drain Voltage VOOP –0.5 to 8.0 V
Output Current IOUT +10 mA
Storage Temperature TSTG –55 to +125 °C
NOTE: Permanent device damage may occur if the above Absolute Maximum Ratings This device contains circuitry to protect the inputs against
are exceeded. Functional operation should be restricted to the conditions as damage due to high static voltages or electric fields. How-
detailed in the operational sections of this data sheet. Exposure to absolute ever, it is advised that normal precautions be taken to avoid
maximum rating conditions for extended periods may affect device reliability. application of any voltage higher than maximum rated volt-
ages to this high impedance circuit.

Copyright  1995 FUJITSU LIMITED and FUJITJU MICROELECTRONICS, INC.

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MB1507

MB1507 BLOCK DIAGRAM

PHASE 16
R
OSCIN 1 16-BIT SHIFT REGISTER COMPARATOR
CRYSTAL 16-BIT SHIFT REGISTER
OSCILLATOR
15
P
OSCOUT 2
15-BIT LATCH MONITOR
FREQUENCY
CHANGING
15-BIT LATCH CIRCUIT 14 fOUT
VP 3
ANALOG
SWITCH
PROGRAMMABLE REFERENCE CHARGE
DIVIDER PUMP 13 BISW
VCC 4 fr
BINARY 14-BIT S DO LE
REFERENCE COUNTER W
12 FC

DO 5

GND 6 11 LE

20-BIT SHIFT REGISTER CONTROL

LD 7 1-BIT 10 Data
LATCH
20-BIT SHIFT REGISTER

9 Clock
19-BIT LATCH

8-BIT LATCH 11-BIT LATCH

PROGRAMMABLE DIVIDER
fIN 8 PRESCALER

BINARY 8-BIT BINARY 11-BIT

SWALLOW PROGRAMMABLE
COUNTER COUNTER fp

CONTROL CIRCUIT

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 MB1507

PIN DESCRIPTION
Pin No. Pin Name I/O Description

1 OSCIN I Oscillator input.

2 OSCOUT O Oscillator output.
A crystal is placed between OSCIN and OSCOUT.

3 VP – Power supply input for charge pump and analog switch.

4 VCC – Power supply voltage input.

Charge pump output.

5 DO O
The characteristics of charge pump is reversed depending upon FC input.

6 GND – Ground.

Phase comparator output.

7 LD O Normally the output level is high level. While the phase difference of fr and fp exists, the output be-
comes low level.

Prescaler input.
8 fIN I
The connection with VCO should be AC connection.

Clock input for 20-bit shift register and 16-bit shift register.
9 Clock I
On rising edge of the clock shifts one bit of data into the shift registers.

Binary serial data input.

The last bit of the data is a control bit which specified destination of shift registers. When this bit is
10 Data I high level and LE is high level, the data stored in shift register is transferred to 15-bit latch. When
this bit is low level and LE is high level, the data is transferred to 19-bit latch.

Load enable input (with pull up resistor).

11 LE I When LE is high or open, the data stored in shift register is transferred into latch depending upon the
control bit. At the time, internal charge pump output to be connected to BISW pin because internal
analog switch becomes ON state.

Phase select input of phase comparator (with pull up resistor).

12 FC I When FC is low level, the characteristics of charge pump, phase comparator is reversed.
FC pin input signal controls fout pin (test pin) output level, fr or fp.

Analog switch output.

13 BISW O Usually BISW pin is set high-impedance state. When internal analog switch is ON (LE pin is high
level), this pin outputs internal charge pump output.

Monitor pin of phase comparator input.

fout pin outputs programmable reference divider output (fr) or programmable divider output (fp) de-
14 fOUT O pending upon FC pin input level.
FC=H: It is the same as fr output level.
FC=L: It is the same as fp output level.

15 ØP O Outputs for external charge pump.

16 ØR O The characteristics are reversed according to FC input.
∅P pin is N-channel open drain output.

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MB1507

FUNCTIONAL DESCRIPTIONS
SERIAL DATA INPUT

Serial data input is achieved by three inputs, such as Data pin, Clock pin and LE pin. Serial data input controls 15–bit programmable reference divider
and 19–bit programmable divider, respectively.
Binary serial data is input to Data pin.
On rising edge of clock shifts one bit of serial data into the internal shift registers and when load enable pin is high level or open, stored data is
transferred into latch depending upon the control bit.
Control data ”H” data is transferred into 15–bit latch.
Control data ”L” data is transferred into 19–bit latch.

THE DIVIDE RATIO SETTING

fVCO=[(MxN)+A]xfOSC÷R
fVCO: Output frequency of external voltage controlled oscillator (VCO)
M: Preset modulus of external dual modulus prescaler (128 or 256)
N: Preset divide ratio of binary 11-bit programmable counter (16 to 2047)
A: Preset divide ratio of binary 8-bit swallow counter (0≤A≤255, A<N)
fOSC: Output frequency of the external reference frequency oscillator
R: Preset divide ratio of binary 14-bit programmable reference counter (8 to 16383)

PROGRAMMABLE REFERENCE DIVIDER

Programmable reference divider consists of 16-bit shift register, 15-bit latch and 14-bit reference counter. Serial 16-bit data format is shown below.

Control bit Divide ratio of prescaler setting bit

LSB MSB

C S S S S S S S S S S S S S S S
1 2 3 4 5 6 7 8 9 10 11 12 13 14 W

Divide ratio of programmable reference counter setting bit

14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RATIO

Divide S S S S S S S S S S S S S S
Ratio
R 14 13 12 11 10 9 8 7 6 5 4 3 2 1

8 0 0 0 0 0 0 0 0 0 0 1 0 0 0

9 0 0 0 0 0 0 0 0 0 0 1 0 0 1

• • • • • • • • • • • • • • •

16383 1 1 1 1 1 1 1 1 1 1 1 1 1 1

NOTES: Divide ratio less than 8 is prohibited.

Divide ratio: 8 to 16383
SW: This bit selects divide ratio of prescaler.
SW=H : 128/129
SW=L : 256/257
S1 to S14: These bits select divide ratio of programmable reference divider.
C: Control bit (sets as high level).
Data is input from MSB side.

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 MB1507

PROGRAMMABLE DIVIDER

Programmable divider consists of 20-bit shift register, 19-bit latch, 8-bit swallow counter and 11-bit programmable counter.
Serial 20-bit data format is shown below.

Control bit
LSB MSB

C S S S S S S S S S S S S S S S S S S S
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Divide ratio of swallow counter Divide ratio of programmable counter

setting bit setting bit

8-BIT SWALLOW COUNTER DIVIDE RATIO

Divide S S S S S S S S
Ratio
A 8 7 6 5 4 3 2 1

0 0 0 0 0 0 0 0 0

1 0 0 0 0 0 0 0 1

• • • • • • • • •

255 1 1 1 1 1 1 1 1

NOTE: Divide ratio: 0 to 255

11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO

Divide S S S S S S S S S S S
Ratio
N 19 18 17 16 15 14 13 12 11 10 9

16 0 0 0 0 0 0 1 0 0 0 0

17 0 0 0 0 0 0 1 0 0 0 1

• • • • • • • • • • • •

2047 1 1 1 1 1 1 1 1 1 1 1

NOTES: Divide ratio less than 16 is prohibited.

Divide ratio: 16 to 2047
S1 to S8: Swallow counter divide ratio setting bit. (0 to 255)
S9 to S19: Programmable counter divide ratio setting bit. (16 to 2047)
C: Control bit (sets to low level).
Data is input from MSB side.

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MB1507

SERIAL DATA INPUT TIMING

t1, t2, t3, t4, t5≥1µs

Data S19=MSB S18 S11 S10 S1=LSB C: CONTROL BIT

*(SW) (S14) (S7) (S6) (S1) (C: CONTROL BIT)

Clock

LE

t3
t1 t2 t4
t5

NOTES: Parenthesis data is used for setting divide ratio of programmable reference divider.
On rising edge of clock shifts one bit of data into the shift register.

PHASE CHARACTERISTICS
VCO POLARITY
FC pin is provided to change phase polarity of phase comparator. Characteris-
tics of internal charge pump output level (DO), phase comparator output level
(ØR, ØP) are reversed depending upon FC pin input level. Also, monitor pin
1
(fout) output level of phase comparator is controlled by FC pin input level.
VCO OUTPUT FREQUENCY

FC=H or open FC=L

DO ØR ØP fout DO ØR ØP fout

fr>fp H L L (fr) L H Z (fp)

fr=fp Z L Z (fr) Z L Z (fp)

2
fr<fp L H Z (fr) H L L (fp)
VCO INPUT VOLTAGE

Note: Z=(High impedance)

Depending upon VCO polarity, FC pin should be set accordingly:

When VCO polarity are like 1 , FC should be set High or open circuit;
When VCO polarity are like 2 , FC should be set Low.

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 MB1507

PHASE DETECTOR OUTPUT WAVEFORM (FC=High)

fr

fP

LD

H
DO Z
L
fr>fp fr=fp fr<fp fr<fp fr<fp

NOTES: Phase difference detection range: –2π to +2π

Spike appearance depends on charge pump characteristics. Also, the spike is output in order to diminish dead band.
When fr>fp or fr<fp, spike might not appear depending upon charge pump characteristics.

ANALOG SWITCH

ON/OFF of analog switch is controlled by LE input signal. When the analog switch is ON, internal charge pump output (DO) is connected to BISW pin.
When the analog switch is OFF, BI-SW pin is set to high-impedance state.

LE Analog Switch

H(Changing the divide ratio of internal prescaler) ON

L(Normal operating mode) OFF

When an analog switch is inserted between LP1 and LP2, faster lock up time is achieved to reduce LPF time constant during PLL channel switching.

DO

CHARGE PUMP LPF-1 LPF-2 VCO

BISW
ANALOG SW

(CONTROL SIGNAL LE)

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MB1507

RECOMMENDED OPERATING CONDITIONS

Value
Parameter Symbol Unit
Min Typ Max

VCC 4.5 5.0 5.5 V

Power Supply Voltage
VP VCC — 8.0 V

Input Voltage VI GND — VCC V

Operating Temperature TA –40 — 85 °C

HANDLING PRECAUTIONS
• This device should be transported and stored in anti-static containers.
• This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded. Cover
workbenches with grounded conductive mats.
• Always turn the power supply off before inserting or removing the device from its socket.
• Protect leads with a conductive sheet when handling or transporting PC boards with devices.

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 MB1507

ELECTRICAL CHARACTERISTICS
Value
Parameter Symbol Condition Unit
Min Typ Max

Power Supply Current ICC Note 1 — 18.0 — mA

fin fin Note 2 10 — 2000 MHz

Operating Frequency
OSCIN fOSC — — 12 20 MHz

fin Pfin 50Ω –4 — 6 dBm

Input Sensitivity
OSCIN VOSC — 0.5 — — VPP

High-level Input Voltage VIH — VCCx0.7 — — V

Except fin
and OSCIN
Low-level Input Voltage VIL — — — VCCx0.3 V

High-level Input Current IIH — — 1.0 — µA

Data
Clock
Low-level Input Current IIL
— — –1.0 — µA

OSCIN IOSC — — "50 — µA

Input Current
LE, FC ILE — — –60 — µA

High-level Output Current VOH 4.4 — — V

Except DO
VCC=5V
and OSCOUT
Low-level Output Current VOL — — 0.4 V

High Impedance VP=VCC to 8V

Cutoff Current
DO, ØP IOFF
VOOP=GND to 8V
— — 1.1 µA

IOH — –1.0 — — mA
Output Current Except DO
and OSCOUT
IOL — 1.0 — — mA

Analog Switch On Resistance RON — — 25 — Ω

NOTE 1: fin=2.0GHz, fOSC =12MHz X’tal VCC=5V. Inputs are grounded and outputs are open.
NOTE 2: AC coupling. Minimum operating frequency is measured with a capacitor 1000PF.

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 MB1507

TEST CIRCUIT (Prescaler Input Sensitivity)

VCC=5V Vp=6V

0.1µF X’tal

1000pF
P•G

50Ω
8 7 6 5 4 3 2 1

MB1507

9 10 11 12 13 14 15 16

Oscilloscope

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 MB1507

TYPICAL APPLICATION EXAMPLE

VPX(6V)
OUTPUT
LPF VCO
10k
Charge Pump
Selection
12k (Internal or
external)

FROM
CONTROLLER
12k
10k

ØR ØP fOUT BISW FC LE Data Clock 47k 47k

16 15 14 13 12 11 10 9

MB1507

1 2 3 4 5 6 7 8

OSCIN OSCOUT Vp VCC DO GND LD fin

X’tal 1000p VCC(5V)

6V 5V 100k

C1 C2
33k
0.1µ LOCK
DETECTOR
0.01µ 10k

Vp, VPX : 8V max.

C1, C2 : Depends on crystal oscillator
LE,FC : With pull up resistor
ØP : Open drain output

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 MB1507

PACKAGE DIMENSIONS
16-LEAD PLASTIC FLAT PACKAGE
(Case No. : FPT-16P-M06)
.089(2.25)MAX
(MOUNTING HEIGHT)
.400 +.010 (10.15+0.25 ) .002(0.05)MIN
–.008 –0.20
(STAND OFF HEIGHT)

.307±.016
INDEX (7.80±0.40)
.268+.016(6.80+0.40 )
.209±.012 –.008 –0.20
“B” (5.30±0.30)

.020±.008
(0.50±0.20)
.050(1.27) .018±.004
Ø.005(0.13) M .006+.002(0.15 +0.05 )
TYP (0.45±0.10) –.001 –0.02

“A”
Details of “A” part Details of “B” part
.016(0.40) .006(0.15)

.004(0.10) .008(0.20)
.008(0.20)
.350(8.89) REF .007(0.18) .007(0.18)
MAX MAX
.027(0.68) .027(0.68)
MAX MAX Dimensions in
1991 FUJITSU LIMITED F16015S-2C inches (millimeters)

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 MB1507

All Rights Reserved.

Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical
semiconductor applications. Complete Information sufficient for construction purposes
is not necessarily given.

The information contained in this document has been carefully checked and is believed
to be reliable. However, Fujitsu assumes no responsibility for inaccuracies.

The Information contained in this document does not convey any license under the
copyrights, patent rights or trademarks claimed and owned by Fujitsu.

Fujitsu reserves the right to change products or specifications without notice.

No part of this publication may be copied or reproduced in any form or by any means, or
transferred to any third party without prior written consent of Fujitsu.

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 MB1507

For further information please contact:

Japan
FUJITSU LIMITED
Electronic Devices
International Operations Department
KAWASAKI PLANT, 1015 Kamikodanaka,
Nakahara–ku, Kawasaki–shi,
Kanagawa 211, Japan
Tel: (044) 754–3753
FAX: (044) 754–3332
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922–9000
FAX: (408) 432–9044/9045
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10,
63303 Dreieich-Buchschlag,
Germany
Tel: (06103) 690-0
FAX: (06103) 690-122

Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LIMITED
No.51 Bras Basah Road,
Plaza By The Park,
#06-04 to #06-07
Singapore 0718
Tel: 336-1600
FAX: 336-1609

9501
 FUJITSU LIMITED Printed in Japan

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