LT3976

40V, 5A, 2MHz Step-Down

Switching Regulator with
3.3µA Quiescent Current
Features Description
n Ultralow Quiescent Current: The LT®3976 is an adjustable frequency monolithic buck
3.3µA IQ at 12VIN to 3.3VOUT switching regulator that accepts a wide input voltage range
n Low Ripple Burst Mode® Operation up to 40V. Low quiescent current design consumes only
Output Ripple < 15mVP-P 3.3µA of supply current while regulating with no load. Low
n Wide Input Range: Operation from 4.3V to 40V ripple Burst Mode operation maintains high efficiency at
n 5A Maximum Output Current low output currents while keeping the output ripple below
n Excellent Start-Up and Dropout Performance 15mV in a typical application. The LT3976 can supply up
n Adjustable Switching Frequency: 200kHz to 2MHz to 5A of load current and has current limit foldback to
n Synchronizable Between 250kHz to 2MHz limit power dissipation during short-circuit. A low dropout
n Accurate Programmable Undervoltage Lockout voltage of 500mV is maintained when the input voltage
n Low Shutdown Current: I = 700nA drops below the programmed output voltage, such as
Q
n Power Good Flag during automotive cold crank.
n Soft-Start Capability
n Thermal Shutdown Protection
An internally compensated current mode topology is used
n Current Limit Foldback with Soft-Start Override
for fast transient response and good loop stability. A high
n Saturating Switch Design: 75mΩ On-Resistance
efficiency 75mΩ switch is included on the die along with a
n Small, Thermally Enhanced 16-Lead MSOP and
boost Schottky diode. An accurate 1.02V threshold enable
pin can be driven directly from a microcontroller or used
24-Lead 3mm × 5mm QFN Packages
as a programmable undervoltage lockout. A capacitor on
Applications the SS pin provides a controlled inrush current (soft-start).
A power good flag signals when VOUT reaches 91.6% of
n Automotive Battery Regulation the programmed output voltage. The LT3976 is available
n Portable Products in small 16-lead MSOP and 24-lead 3mm × 5mm QFN
n Industrial Supplies packages with exposed pad for low thermal resistance.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective owners.

Typical Application No-Load Supply Current

3.3V Step-Down Converter 8
IN REGULATION
VIN VOUT = 3.3V
4.3V TO 40V 7

VIN 6
INPUT CURRENT (µA)

OFF ON EN BOOST
0.47µF 3.3µH 5
PG SW
10µF PDS540 2Ω 4
LT3976
470pF 3

SS OUT 2
1M VOUT
RT FB 3.3V 1
SYNC GND 10pF 5A
10nF
47µF 0
130k 576k 0 5 10 15 20 25 30 35 40
1210
×2 INPUT VOLTAGE (V)
3976 TA01a
f = 400kHz 3976 G05

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LT3976
Absolute Maximum Ratings
(Note 1)
VIN, EN Voltage (Note 3)............................................40V Operating Junction Temperature Range (Note 2)
BOOST Pin Voltage....................................................55V LT3976E.............................................. –40°C to 125°C
BOOST Pin Above SW Pin..........................................30V LT3976I.............................................. –40°C to 125°C
FB, RT, SYNC, SS Voltage............................................6V LT3976H............................................. –40°C to 150°C
PG Voltage.................................................................30V Storage Temperature Range................... –65°C to 150°C
OUT Voltage...............................................................16V Lead Temperature (Soldering, 10 sec).................... 300°C

Pin Configuration
TOP VIEW

GND
NC
FB
FB
24 23 22 21

TOP VIEW SS 1 20 SYNC

FB 1 16 SYNC OUT 2 19 PG
SS 2 15 PG NC 3 18 RT
OUT 3 14 RT
BOOST 4 17 13 EN BST 4 17 NC
SW 5 GND 12 VIN 25
NC 5 GND 16 EN
SW 6 11 VIN
SW 7 10 VIN SW 6 15 VIN
NC 8 9 NC
SW 7 14 VIN
MSE PACKAGE
16-LEAD PLASTIC MSOP SW 8 13 VIN
θJA = 40°C/W 9 10 11 12
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB NC
NC
NC
NC
UDD PACKAGE
24-LEAD (3mm × 5mm) PLASTIC QFN
θJA = 46°C/W
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB

Order Information
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3976EMSE#PBF LT3976EMSE#TRPBF 3976 16-Lead Plastic MSOP –40°C to 125°C
LT3976IMSE#PBF LT3976IMSE#TRPBF 3976 16-Lead Plastic MSOP –40°C to 125°C
LT3976HMSE#PBF LT3976HMSE#TRPBF 3976 16-Lead Plastic MSOP –40°C to 150°C
LT3976EUDD#PBF LT3976EUDD#TRPBF LGHV 24-Lead (3mm × 5mm) Plastic QFN –40°C to 125°C
LT3976IUDD#PBF LT3976IUDD#TRPBF LGHV 24-Lead (3mm × 5mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping
container.Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

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 LT3976
Electrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 2)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage (Note 3) l 4 4.3 V
Dropout Comparator Threshold (VIN – OUT) Falling 430 500 570 mV
Dropout Comparator Threshold Hysteresis 25 mV
Quiescent Current from VIN VEN Low 0.7 1.3 µA
VEN High, VSYNC Low 1.6 2.7 µA
VEN High, VSYNC Low l 30 µA
FB Pin Current VFB = 1.5V l 0.1 12 nA
Feedback Voltage 1.183 1.197 1.212 V
l 1.173 1.197 1.222 V
FB Voltage Line Regulation 4.3V < VIN < 40V (Note 3) 0.0003 0.01 %/V
Switching Frequency RT = 11.8k 1.8 2.25 2.7 MHz
RT = 41.2k 0.8 1 1.2 MHz
RT = 294k 160 200 240 kHz
Minimum Switch On-Time 120 ns
Minimum Switch Off-Time (Note 4) 150 200 ns
Switch Current Limit VFB = 1V 7.5 10 12.5 A
Foldback Switch Current Limit VFB = 0V 4.8 A
Switch VCESAT ISW = 1A 80 mV
Switch Leakage Current 0.02 1 μA
Boost Schottky Forward Voltage ISH = 100mA 730 mV
Boost Schottky Reverse Leakage VREVERSE = 12V 0.02 2 μA
Minimum Boost Voltage (Note 5) l 1.3 1.8 V
BOOST Pin Current ISW = 1A, VBOOST – VSW = 3V 20 32 mA
EN Voltage Threshold EN Falling, VIN ≥ 4.3V l 0.92 1.02 1.12 V
EN Voltage Hysteresis 60 mV
EN Pin Current 0.2 20 nA
PG Threshold Offset from VFB VFB Falling 5 8.4 13 %
PG Hysteresis as % of Output Voltage 1.7 %
PG Leakage VPG = 3V 0.02 1 µA
PG Sink Current VPG = 0.4V l 125 480 μA
SYNC Low Threshold 0.6 1.0 V
SYNC High Threshold 1.18 1.5 V
SYNC Pin Current VSYNC = 6V 0.1 nA
SS Source Current VSS = 0.5V 0.9 1.8 2.6 μA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings temperature range. The LT3976H is guaranteed over the full –40°C to
may cause permanent damage to the device. Exposure to any Absolute 150°C operating junction temperature range. High junction temperatures
Maximum Rating condition for extended periods may affect device degrade operating lifetimes. Operating lifetime is derated at junction
reliability and lifetime. temperatures greater than 125°C. The junction temperature (TJ, in °C) is
Note 2: The LT3976E is guaranteed to meet performance specifications calculated from the ambient temperature (TA, in °C) and power dissipation
from 0°C to 125°C junction temperature. Specifications over the –40°C (PD, in Watts) according to the formula:
to 125°C operating junction temperature range are assured by design, TJ = TA + (PD • θJA)
characterization, and correlation with statistical process controls. The where θJA (in °C/W) is the package thermal impedance.
LT3976I is guaranteed over the full –40°C to 125°C operating junction

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LT3976
Electrical Characteristics
Note 3: Minimum input voltage depends on application circuit. Note 6: This IC includes overtemperature protection that is intended
Note 4: The LT3976 contains circuitry that extends the maximum duty to protect the device during momentary overload conditions. Junction
cycle if there is sufficient voltage across the boost capacitor. See the temperature will exceed the maximum operating junction temperature
Application Information section for more details. when overtemperature protection is active. Continuous operation above
Note 5: This is the minimum voltage across the boost capacitor needed to the specified maximum operating junction temperature may impair device
guarantee full saturation of the switch. reliability or permanently damage the device.

Typical Performance Characteristics TA = 25°C, unless otherwise noted.

Efficiency at 5VOUT Efficiency at 3.3VOUT Efficiency at 5VOUT

100 100 100
fSW = 800kHz FRONT PAGE APPLICATION fSW = 800kHz
95 VOUT = 5V 95 VOUT = 3.3V 90 VOUT = 5V
90 90 80
85 85 70
EFFICIENCY (%)

EFFICIENCY (%)

EFFICIENCY (%)
80 80 60
75 75 50
70 70 40
65 65 30
60 12V 60 20 12V
12V
55 24V 55 24V 10 24V
36V 36V 36V
50 50 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0.01 0.1 1 10 100 1000 10000
LOAD CURRENT (A) LOAD CURRENT (A) LOAD CURRENT (mA)
3976 G01 3976 G02 3976 G03

Efficiency at 3.3VOUT No-Load Supply Current No-Load Supply Current

100 8 10000
FRONT PAGE APPLICATION IN REGULATION FRONT PAGE APPLICATION
90 VOUT = 3.3V 7 VOUT = 3.3V VIN = 12V
VOUT = 3.3V
80
6 1000
INPUT CURRENT (µA)

INPUT CURRENT (µA)

70
DUE TO
EFFICIENCY (%)

60 5
CATCH DIODE
50 4 100 LEAKAGE

40 3
30
2 10
20 12V
10 24V 1
36V
0 0 1
0.01 0.1 1 10 100 1000 10000 0 5 10 15 20 25 30 35 40 –55 –25 5 35 65 95 125 155
LOAD CURRENT (mA) INPUT VOLTAGE (V) TEMPERATURE (°C)
3976 G05 3876 G06
3976 G04

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 LT3976
Typical Performance Characteristics TA = 25°C, unless otherwise noted.

Reference Voltage Load Regulation Line Regulation

1.230 0.5 0.05
VIN = 12V VOUT = 5V
1.225 0.4 VOUT = 3.3V 0.04 LOAD = 1A
1.220
0.3 0.03
1.215
REFERENCE VOLTAGE (V)

CHANGE IN OUTPUT (%)

CHANGE IN OUTPUT (%)

0.2 0.02
1.210
1.205 0.1 0.01
1.200 0 0
1.195 –0.1 –0.01
1.190
–0.2 –0.02
1.185
–0.3 –0.03
1.180
1.175 –0.4 –0.04
1.170 –0.5 –0.05
–55 –25 5 35 65 95 125 155 0 1 2 3 4 5 5 10 15 20 25 30 35 40
TEMPERATURE (°C) LOAD CURRENT (A) INPUT VOLTAGE (V)
3976 G07 3976 G08 3976 G09

Thermal Derating Thermal Derating Switch Current Limit

6 6 10.0

5 5 9.5
12V H-GRADE 12V H-GRADE
24V 24V

CURRENT LIMIT (A)

LOAD CURRENT (A)

LOAD CURRENT (A)

4 36V 4 9.0
36V

3 3 8.5
I-GRADE
I-GRADE
2 2 8.0

1 VOUT = 3.3V 1 VOUT = 5V 7.5

fSW = 400kHz fSW = 400kHz
2.5in × 2.5in 4-LAYER BOARD 2.5in × 2.5in 4-LAYER BOARD
0 0 7.0
0 25 50 75 100 125 150 0 25 50 75 100 125 150 0 0.2 0.4 0.6 0.8 1.0
TEMPERATURE (°C) TEMPERATURE (°C) DUTY CYCLE
LIMITED BY MAXIMUM 3976 G10 LIMITED BY MAXIMUM 3976 G11 3976 G12

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

ΘJA = 40°C/W ΘJA = 40°C/W

Switch Current Limit Current Limit Foldback Soft-Start

12 10 10
30% DUTY CYCLE 30% DUTY CYCLE VFB = 1V
10
30% DUTY CYCLE

30% DUTY CYCLE

9 VSS = 3V
8
7
CURRENT LIMIT (A)

6
5
4
3
2
1
0
0 0.2 0.4 0.6 0.8 1.0 1.2
FB PIN VOLTAGE (V)
3976 G14

9 VSS = 3V 9
11 8 VFB = 0V
8
7 7
CURRENT LIMIT (A)
CURRENT LIMIT (A)

CURRENT LIMIT (A)

10
6 6

9 5 5
4 4
8 3
3
2 2
7
1 1
6 0 0
–55 –25 5 35 65 95 125 155 0 0.2 0.4 0.6 0.8 1.0 1.2 0 0.5 1.0 1.5 2.0 2.5
TEMPERATURE (°C) FB PIN VOLTAGE (V) SS PIN VOLTAGE (V)
3976 G13 3976 G14 3976 G15

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LT3976
Typical Performance Characteristics TA = 25°C, unless otherwise noted.

Switch VCESAT BOOST Pin Current Minimum On-Time

350 90 200
VSYNC = 0V
80 fSW = 2MHz
300 180
70

BOOST PIN CURRENT (mA)

MINIMUM ON-TIME (ns)

250 160
60
VCESAT (mV)

200 50 140
LOAD = 1A
150 40 120
30
100 100 LOAD = 2.5A
20
50 80
10
LOAD = 5A
0 0 60
0 1 2 3 4 5 0 1 2 3 4 5 –55 –25 5 35 65 95 125 155
SWITCH CURRENT (A) SWITCH CURRENT (A) TEMPERATURE (°C)
3976 G16 3976 G17 3976 G18

RT Programmed Switching
Minimum Off-Time Switching Frequency Frequency
250 780 350
VSYNC = 0V
fSW = 2MHz
300
225 720
SWITCHING FREQUENCY (kHz)
MINIMUM OFF-TIME (ns)

250

RT RESISTOR (kΩ)
200 660
200
175 LOAD = 5A 600
150
150 LOAD = 2.5A 540
100

125 480 50
LOAD = 1A

100 420 0
–55 –25 5 35 65 95 125 155 –55 –25 5 35 65 95 125 155 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2
TEMPERATURE (°C) TEMPERATURE (°C) SWITCHING FREQUENCY (MHz)
3976 G19 3976 G20 3976 G21

Internal Undervoltage Lockout

Frequency Foldback (UVLO) EN Thresholds
700 6 1.09
EN RISING
600 1.08
5
SWITCHING FREQUENCY (kHz)

1.07
500
INPUT VOLTAGE (V)

EN THRESHOLD (V)

4
1.06
400
3 1.05
300
1.04
2
200
1.03
1 EN FALLING
100 1.02

0 0 1.01
0 0.2 0.4 0.6 0.8 1 1.2 –55 –25 5 35 65 95 125 155 –55 –25 5 35 65 95 125 155
FB PIN VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C)
3976 G22 3976 G23 3976 G24

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 LT3976
Typical Performance Characteristics TA = 25°C, unless otherwise noted.

Minimum Input Voltage, Minimum Input Voltage,

PG Thresholds VOUT = 5V VOUT = 3.3V
1.12 6.5 5.0
VOUT = 5V VOUT = 3.3V
1.11 fSW = 800kHz FRONT PAGE APPLICATION
6.0 4.5
1.10
TO RUN/TO START TO RUN/TO START

INPUT VOLTAGE (V)

INPUT VOLTAGE (V)

PG THRESHOLD (V)

1.09 FB RISING
5.5 4.0
1.08

1.07 FB FALLING 5.0 3.5

1.06
4.5 3.0
1.05

1.04 4.0 2.5

–55 –25 5 35 65 95 125 155 0 1 2 3 4 5 0 1 2 3 4 5
TEMPERATURE (°C) LOAD CURRENT (A) LOAD CURRENT (A)
3976 G25 3976 G26 3976 G27

Burst Frequency SS Pin Current Boost Capacitor Charger

900 2.6 160
VSS = 0.5V VBST = VIN
800 2.4 140
VOUT = 5V
SWITCHING FREQUENCY (kHz)

700 fSW = 800kHz 2.2 120

OUT PIN CURRENT (mA)

SS PIN CURRENT (µA)

600
2.0 100
500
1.8 80
VOUT = 3.3V
400
fSW = 600kHz
1.6 60
300
1.4 40
200

100 1.2 20

0 1.0 0
0 20 40 60 80 100 120 140 160 –55 –25 5 35 65 95 125 155 0 2 4 6 8 10 12 14 16
LOAD CURRENT (mA) TEMPERATURE (°C) OUT PIN VOLTAGE (V)
3976 G28 3976 G29 3976 G30

Boost Diode Forward Voltage Dropout Comparator Thresholds

1.6 600
580
1.4
560
DROPOUT THRESHOLD (mV)
BOOST DIODE VOLTAGE (V)

1.2
540
VOUT RISING
1.0 520
0.8 500
480
0.6 VOUT FALLING
460
0.4
440
0.2 420
0 400
0 0.5 1 1.5 2 –55 –25 5 35 65 95 125 155
BOOST DIODE CURRENT (A) TEMPERATURE (°C)
3976 G31 3976 G32

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LT3976
Typical Performance Characteristics TA = 25°C, unless otherwise noted.

Start-Up/Dropout Performance Start-Up/Dropout Performance Burst Mode Switching Waveforms

VIN VIN VIN VIN

1V/DIV 1V/DIV VSW
VOUT VOUT 5V/DIV

IL
VOUT VOUT
0.5A/DIV
1V/DIV 1V/DIV
VOUT
10mV/DIV
3976 G34 3976 G35
2.5Ω LOAD 100ms/DIV 3976 G33
1kΩ LOAD 100ms/DIV VIN = 12V 5µs/DIV
(2A IN REGULATION) (5mA IN REGULATION) VOUT = 3.3V
ILOAD = 20mA
COUT = 47µF

Full Frequency Switching

Waveforms Dropout Switching Waveforms

VSW VSW
5V/DIV 2V/DIV

IL IL
1A/DIV 1A/DIV

VOUT VOUT
20mV/DIV 50mV/DIV
3976 G36 3976 G37
VIN = 12V 1µs/DIV VIN = 5V 5µs/DIV
VOUT = 3.3V VOUT SET FOR 5V
ILOAD = 1A ILOAD = 0.5A
COUT = 47µF COUT = 47µF

Load Transient: 0.5A to 4.5A Load Transient: 10mA to 4A

IL IL
2A/DIV 2A/DIV

VOUT VOUT
200mV/DIV 500mV/DIV

3976 G39
12VIN 50µs/DIV 3976 G38
12VIN 50µs/DIV
3.3VOUT 3.3VOUT
COUT = 2 × 47µF COUT = 2 × 47µF

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 LT3976
Pin Functions (MSE/UDD)

FB (Pin 1/Pins 23, 24): The LT3976 regulates the FB pin VIN (Pins 10, 11, 12/Pins 13, 14, 15): The VIN pin sup-
to 1.197V. Connect the feedback resistor divider tap to this plies current to the LT3976’s internal circuitry and to the
pin. Also, connect a phase lead capacitor between FB and internal power switch. These pins must be locally bypassed.
the output. Typically, this capacitor is 10pF. EN (Pin 13/Pin 16): The part is in shutdown when this
SS (Pin 2/Pin 1): A capacitor is tied between SS and ground pin is low and active when this pin is high. The hysteretic
to slowly ramp up the peak current limit of the LT3976 on threshold voltage is 1.08V going up and 1.02V going down.
start-up. There is an internal 1.8μA pull-up on this pin. The EN threshold is only accurate when VIN is above 4.3V.
The soft-start capacitor is actively discharged when the If VIN is lower than 3.9V, internal UVLO will place the part
EN pin goes low, during undervoltage lockout or thermal in shutdown. Tie to VIN if shutdown feature is not used.
shutdown. Float this pin to disable soft-start. RT (Pin 14/Pin 18): A resistor is tied between RT and
OUT (Pin 3/Pin 2): This pin is an input to the dropout ground to set the switching frequency.
comparator which maintains a minimum dropout of PG (Pin 15/Pin 19): The PG pin is the open-drain output of
500mV between VIN and OUT. The OUT pin connects to an internal comparator. PGOOD remains low until the FB
the anode of the internal boost diode. This pin also sup-
pin is within 8.4% of the final regulation voltage. PGOOD
plies the current to the LT3976’s internal regulator when
is valid when VIN is above 2V.
OUT is above 3.2V. Connect this pin to the output when
the programmed output voltage is less than 16V. SYNC (Pin 16/Pin 20): This is the external clock synchro-
nization input. Ground this pin for low ripple Burst Mode
BOOST (Pin 4/Pin 4): This pin is used to provide a drive operation at low output loads. Tie to a clock source for
voltage, higher than the input voltage, to the internal bipolar synchronization, which will include pulse skipping at low
NPN power switch. output loads. When in pulse-skipping mode, quiescent
SW (Pins 5, 6, 7/Pins 6, 7, 8): The SW pin is the output of current increases to 11µA in a typical application at no
an internal power switch. Connect these pins to the induc- load. Do not float this pin.
tor, catch diode, and boost capacitor. An R-C snubber to
GND (Exposed Pad Pin 17/Pin 21, Exposed Pad Pin 25):
GND is needed to ensure robustness under all conditions.
Ground. The exposed pad must be soldered to the PCB.
Typical values are 2Ω and 470pF.
NC (Pins 8, 9/Pins 3, 5, 9-12, 17, 22): No Connects.
These pins are not connected to internal circuitry.

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LT3976
Block Diagram

OUT
VIN
VIN
C1 0.5V +
–
– –
INTERNAL 1.197V REF
+ +
1.02V + SWITCH BOOST
EN
– SHDN + SLOPE COMP LATCH
R
RT OSCILLATOR Q C3
200kHz TO 2MHz S
RT L1
SW
VOUT
SYNC
Burst Mode R3
DETECT D1 C2
PG C6

ERROR AMP
VC CLAMP
+ 1.097V + VC
1.8µA
– – SS
C4
OPT
SHDN

GND FB

R2 R1
3976 BD

C5

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 LT3976
Operation
The LT3976 is a constant frequency, current mode step- Between bursts, all circuitry associated with controlling
down regulator. An oscillator, with frequency set by RT, the output switch is shut down reducing the input supply
sets an RS flip-flop, turning on the internal power switch. current to 1.7μA. In a typical application, 3.3μA will be
An amplifier and comparator monitor the current flowing consumed from the supply when regulating with no load.
between the VIN and SW pins, turning the switch off when
The oscillator reduces the LT3976’s operating frequency
this current reaches a level determined by the voltage at
when the voltage at the FB pin is low. This frequency
VC (see Block Diagram). An error amplifier measures the
foldback helps to control the output current during start-
output voltage through an external resistor divider tied
up and overload.
to the FB pin and servos the VC node. If the error ampli-
fier’s output increases, more current is delivered to the The LT3976 can provide up to 5A of output current. A
output; if it decreases, less current is delivered. An active current limit foldback feature throttles back the current
clamp on the VC pin provides current limit. The VC pin is limit during overload conditions to limit the power dis-
also clamped by the voltage on the SS pin; soft-start is sipation. When SS is below 2V, the LT3976 overrides
implemented by generating a voltage ramp at the SS pin the current limit foldback circuit to avoid interfering with
using an external capacitor. start-up. Thermal shutdown further protects the part from
excessive power dissipation, especially in elevated ambient
An internal regulator provides power to the control circuitry.
temperature environments.
The bias regulator normally draws power from the VIN
pin, but if the OUT pin is connected to an external volt- If the input voltage decreases towards the programmed
age higher than 3.2V, bias power will be drawn from the output voltage, the LT3976 will start to skip switch-off
external source (typically the regulated output voltage). times and decrease the switching frequency to maintain
This improves efficiency. output regulation. As the input voltage decreases below
the programmed output voltage, the output voltage will be
If the EN pin is low, the LT3976 is shut down and draws
regulated 500mV below the input voltage. This enforced
700nA from the input. When the EN pin falls below 1.02V,
minimum dropout voltage limits the duty cycle and keeps
the switching regulator will shut down, and when the EN
the boost capacitor charged during dropout conditions.
pin rises above 1.08V, the switching regulator will become
Since sufficient boost voltage is maintained, the internal
active. This accurate threshold allows programmable
switch can fully saturate yielding low dropout performance.
undervoltage lockout.
The LT3976 contains a power good comparator which
The switch driver operates from either VIN or from the
trips when the FB pin is at 91.6% of its regulated value.
BOOST pin. An external capacitor is used to generate a
The PG output is an open-drain transistor that is off when
voltage at the BOOST pin that is higher than the input
the output is in regulation, allowing an external resistor
supply. This allows the driver to fully saturate the internal
to pull the PG pin high. Power good is valid when VIN is
bipolar NPN power switch for efficient operation. above 2V. When the LT3976 is shut down the PG pin is
To further optimize efficiency, the LT3976 automatically actively pulled low.
switches to Burst Mode operation in light load situations.

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LT3976
Applications Information
Achieving Ultralow Quiescent Current diode should have less than a few µA of typical reverse
leakage at room temperature. These two considerations
To enhance efficiency at light loads, the LT3976 operates
are reiterated in the FB Resistor Network and Catch Diode
in low ripple Burst Mode operation, which keeps the out-
Selection sections.
put capacitor charged to the desired output voltage while
minimizing the input quiescent current. In Burst Mode It is important to note that another way to decrease the
operation the LT3976 delivers single pulses of current to pulse frequency is to increase the magnitude of each
the output capacitor followed by sleep periods where the single current pulse. However, this increases the output
output power is supplied by the output capacitor. When in voltage ripple because each cycle delivers more power to
sleep mode the LT3976 consumes 1.7μA, but when it turns the output capacitor. The magnitude of the current pulses
on all the circuitry to deliver a current pulse, the LT3976 was selected to ensure less than 15mV of output ripple in
consumes several mA of input current in addition to the a typical application. See Figure 2.
switch current. Therefore, the total quiescent current will
be greater than 1.7μA when regulating.
VSW
As the output load decreases, the frequency of single cur- 5V/DIV

rent pulses decreases (see Figure 1) and the percentage IL

0.5A/DIV
of time the LT3976 is in sleep mode increases, resulting
VOUT
in much higher light load efficiency. By maximizing the 10mV/DIV
time between pulses, the converter quiescent current VIN = 12V 5µs/DIV 3976 F02

gets closer to the 1.7μA ideal. Therefore, to optimize the VOUT = 3.3V
ILOAD = 20mA
quiescent current performance at light loads, the current COUT = 47µF
in the feedback resistor divider and the reverse current Figure 2. Burst Mode Operation
in the catch diode must be minimized, as these appear
to the output as load currents. Use the largest possible While in Burst Mode operation, the burst frequency and
feedback resistors and a low leakage Schottky catch diode the charge delivered with each pulse will not change with
in applications utilizing the ultralow quiescent current output capacitance. Therefore, the output voltage ripple will
performance of the LT3976. The feedback resistors should be inversely proportional to the output capacitance. In a
preferably be on the order of MΩ and the Schottky catch typical application with a 22µF output capacitor, the output
ripple is about 10mV, and with a 47µF output capacitor
the output ripple is about 5mV. The output voltage ripple
900
can continue to be decreased by increasing the output
800
VOUT = 5V capacitance, though care must be taken to minimize the
SWITCHING FREQUENCY (kHz)

700 fSW = 800kHz effects of output capacitor ESR and ESL.

600

500
At higher output loads (above 150mA for the front page
VOUT = 3.3V application) the LT3976 will be running at the frequency
400
fSW = 600kHz programmed by the RT resistor, and will be operating in
300
standard PWM mode. The transition between PWM and
200
low ripple Burst Mode operation is seamless, and will not
100
disturb the output voltage.
0
40 60 80 100 120 140 160
0 20
LOAD CURRENT (mA) 3976 F01
To ensure proper Burst Mode operation, the SYNC pin
must be grounded. When synchronized with an external
Figure 1. Switching Frequency in Burst Mode Operation clock, the LT3976 will pulse skip at light loads. At very

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 LT3976
Applications Information
light loads, the part will go to sleep between groups of Table 1. Switching Frequency vs RT Value
pulses, so the quiescent current of the part will still be low, SWITCHING FREQUENCY (MHz) RT VALUE (kΩ)
but not as low as in Burst Mode operation. The quiescent 0.2 294
current in a typical application when synchronized with an 0.3 182
external clock is 11µA at no load. Holding the SYNC pin 0.4 130
DC high yields no advantages in terms of output ripple or 0.6 78.7
minimum load to full frequency, so is not recommended. 0.8 54.9
1.0 41.2
FB Resistor Network
1.2 32.4
The output voltage is programmed with a resistor divider 1.4 26.1
between the output and the FB pin. Choose the resistor 1.6 21.5
values according to: 1.8 17.8
⎛ V ⎞ 2.0 14.7
R1= R2 ⎜ OUT – 1⎟ 2.2 12.4
⎝ 1.197V ⎠
Operating Frequency Trade-Offs
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage Selection of the operating frequency is a trade-off between
accuracy. efficiency, component size, minimum dropout voltage, and
maximum input voltage. The advantage of high frequency
The total resistance of the FB resistor divider should be
operation is that smaller inductor and capacitor values
selected to be as large as possible to enhance low current
may be used. The disadvantages are lower efficiency, and
performance. The resistor divider generates a small load
lower maximum input voltage. The highest acceptable
on the output, which should be minimized to optimize the
switching frequency (fSW(MAX)) for a given application
low supply current at light loads.
can be calculated as follows:
When using large FB resistors, a 10pF phase lead capacitor
VOUT + VD
should be connected from VOUT to FB. fSW(MAX) =
tON(MIN) ( VIN – VSW + VD )
Setting the Switching Frequency
where VIN is the typical input voltage, VOUT is the output
The LT3976 uses a constant frequency PWM architecture voltage, VD is the catch diode drop (~0.5V), and VSW is
that can be programmed to switch from 200kHz to 2MHz the internal switch drop (~0.3V at max load). This equa-
by using a resistor tied from the RT pin to ground. A table tion shows that slower switching frequency is necessary
showing the necessary RT value for a desired switching to safely accommodate high VIN/VOUT ratio. This is due
frequency is in Table 1. to the limitation on the LT3976’s minimum on-time. The
To estimate the necessary RT value for a desired switching minimum on-time is a strong function of temperature.
frequency, use the equation: Use the typical minimum on-time curve to design for an
application’s maximum temperature, while adding about
51.1 30% for part-to-part variation. The minimum duty cycle that
RT = 1.09
– 9.27
( fSW ) can be achieved taking minimum on time into account is:
DCMIN = fSW • tON(MIN)
where RT is in kΩ and fSW is in MHz.
where fSW is the switching frequency, the tON(MIN) is the
minimum switch on-time.

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LT3976
Applications Information
A good choice of switching frequency should allow ad- The duty cycle is the fraction of time that the internal
equate input voltage range (see next two sections) and switch is on during a clock cycle. Unlike many fixed fre-
keep the inductor and capacitor values small. quency regulators, the LT3976 can extend its duty cycle
by remaining on for multiple clock cycles. The LT3976
Maximum Input Voltage Range will not switch off at the end of each clock cycle if there
The LT3976 can operate from input voltages of up to 40V. is sufficient voltage across the boost capacitor (C3 in
Often the highest allowed VIN during normal operation the Block Diagram). Eventually, the voltage on the boost
(VIN(OP-MAX)) is limited by the minimum duty cycle rather capacitor falls and requires refreshing. When this occurs,
than the absolute maximum ratings of the VIN pin. It can the switch will turn off, allowing the inductor current to
be calculated using the following equation: recharge the boost capacitor. This places a limitation on
the maximum duty cycle as follows:
VOUT + VD
VIN(OP-MAX) = – VD + VSW βSW
fSW • tON(MIN) DCMAX =
βSW + 1
where tON(MIN) is the minimum switch on-time. A lower
switching frequency can be used to extend normal opera- where βSW is equal to the beta of the internal power switch.
tion to higher input voltages. The beta of the power switch is typically about 50, which
leads to a DCMAX of about 98%. This leads to a minimum
The circuit will tolerate inputs above the maximum op-
input voltage of approximately:
erating input voltage and up to the absolute maximum
ratings of the VIN and BOOST pins, regardless of chosen VOUT + VD
VIN(MIN1) = – VD + VSW
switching frequency. However, during such transients DCMAX
where VIN is higher than VIN(OP-MAX), the LT3976 will enter
pulse-skipping operation where some switching pulses are where VOUT is the output voltage, VD is the catch diode
skipped to maintain output regulation. The output voltage drop, VSW is the internal switch drop and DCMAX is the
ripple and inductor current ripple will be higher than in maximum duty cycle.
typical operation. Do not overload when VIN is greater The final factor affecting the minimum input voltage is
than VIN(OP-MAX). the minimum dropout voltage. When the OUT pin is tied
During start-up or overload, the switch node slews very to the output, the LT3976 regulates the output such that
fast due to the 10A peak current limit. At high voltages it stays 500mV below VIN. This enforced minimum drop-
during these conditions, an R-C snubber on the switch node out voltage is due to reasons that are covered in the next
is required to ensure robustness of the LT3976. Typical section. This places a limitation on the minimum input
values for the snubber are 2Ω and 470pF. See the Typical voltage as follows:
Applications section to see how the snubber is connected. VIN(MIN2) = VOUT + VDROPOUT(MIN)
Minimum Input Voltage Range where VOUT is the programmed output voltage and
VDROPOUT(MIN) is the minimum dropout voltage of 500mV.
The minimum input voltage is determined by either the
LT3976’s minimum operating voltage of 4.3V, its maximum Combining these factors leads to the overall minimum
duty cycle, or the enforced minimum dropout voltage. input voltage:
See the Typical Performance Characteristics section for VIN(MIN) = Max (VIN(MIN1), VIN(MIN2), 4.3V)
the minimum input voltage across load for outputs of
3.3V and 5V.

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 LT3976
Applications Information
Minimum Dropout Voltage It is important to note that the 500mV dropout voltage
specified is the minimum difference between VIN and
To achieve a low dropout voltage, the internal power switch
VOUT. When measuring VIN to VOUT with a multimeter,
must always be able to fully saturate. This means that the
the measured value will be higher than 500mV because
boost capacitor, which provides a base drive higher than
you have to add half the ripple voltage on the input and
VIN, must always be able to charge up when the part starts
up and then must also stay charged during all operating half the ripple voltage on the output. With the normal
conditions. ceramic capacitors specified in the data sheet, this mea-
sured dropout voltage can be as high as 650mV at high
During start-up if there is insufficient inductor current, such load. If some bulk electrolytic capacitance is added to the
as during light load situations, the boost capacitor will be input and output the voltage ripple, and subsequently the
unable to charge. When the LT3976 detects that the boost measured dropout voltage, can be significantly reduced.
capacitor is not charged, it activates a 100mA (typical) Additionally, when operating in dropout at high currents,
pull-down on the OUT pin. If the OUT pin is connected to high ripple voltage on the input and output can generate
the output, the extra load will increase the inductor current audible noise. This noise can also be significantly reduced
enough to sufficiently charge the boost capacitor. When by adding bulk capacitance to the input and output to
the boost capacitor is charged, the current source turns reduce the voltage ripple.
off, and the part may re-enter Burst Mode operation.
Inductor Selection and Maximum Output Current
To keep the boost capacitor charged regardless of load
during dropout conditions, a minimum dropout voltage For a given input and output voltage, the inductor value
is enforced. When the OUT pin is tied to the output, the and switching frequency will determine the ripple current.
LT3976 regulates the output such that: The ripple current increases with higher VIN or VOUT and
decreases with higher inductance and faster switching
VIN – VOUT > VDROPOUT(MIN)
frequency. A good first choice for the inductor value is:
where VDROPOUT(MIN) is 500mV. The 500mV dropout volt-
VOUT + VD
age limits the duty cycle and forces the switch to turn off L=
regularly to charge the boost capacitor. Since sufficient 2fSW
voltage across the boost capacitor is maintained, the switch
is allowed to fully saturate and the internal switch drop where fSW is the switching frequency in MHz, VOUT is the
stays low for good dropout performance. Figure 3 shows output voltage, VD is the catch diode drop (~0.5V) and L
the overall VIN to VOUT performances during start-up and is the inductor value is μH.
dropout conditions. The inductor’s RMS current rating must be greater than
the maximum load current and its saturation current
VIN VIN
should be about 30% higher. For robust operation in fault
1V/DIV
VOUT
conditions (start-up or overload) and high input voltage
(>30V), the saturation current should be above 13A. To
VOUT
1V/DIV
keep the efficiency high, the series resistance (DCR)
should be less than 0.1Ω, and the core material should
be intended for high frequency applications. Table 2 lists
1kΩ LOAD 100ms/DIV
(5mA IN REGULATION)
3976 F03
several inductor vendors.

Figure 3. VIN to VOUT Performance

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LT3976
Applications Information
Table 2. Inductor Vendors maximum load current will depend on the input voltage. In
VENDOR URL addition, low inductance may result in discontinuous mode
Coilcraft www.coilcraft.com operation, which further reduces maximum load current.
Sumida www.sumida.com For details of maximum output current and discontinuous
Toko www.tokoam.com operation, see Linear Technology’s Application Note 44.
Würth Elektronik www.we-online.com
Finally, for duty cycles greater than 50% (VOUT/VIN > 0.5),
Coiltronics www.cooperet.com
a minimum inductance is required to avoid sub-harmonic
Murata www.murata.com
oscillations, see Application Note 19.
One approach to choosing the inductor is to start with
The inductor value must be sufficient to supply the desired the simple rule given above, look at the available induc-
maximum output current (IOUT(MAX)), which is a function tors, and choose one to meet cost or space goals. Then
of the switch current limit (ILIM) and the ripple current. use the equations above to check that the LT3976 will be
ΔIL able to deliver the required output current. Note again
IOUT(MAX) = ILIM – that these equations assume that the inductor current is
2
continuous. Discontinuous operation occurs when IOUT
The LT3976 limits its peak switch current in order to protect is less than ΔIL/2.
itself and the system from overload and short-circuit faults.
The LT3976’s switch current limit (ILIM) is typically 10A at Current Limit Foldback and Thermal Protection
low duty cycles and decreases linearly to 8A at DC = 0.8. The LT3976 has a large peak current limit to ensure a 5A
When the switch is off, the potential across the inductor max output current across duty cycle and current limit
is the output voltage plus the catch diode drop. This gives distribution, as well as allowing a reasonable inductor
the peak-to-peak ripple current in the inductor: ripple current. During a short-circuit fault, having a large
current limit can lead to excessive power dissipation and
ΔIL =
(1– DC) • ( VOUT + VD ) temperature rise in the LT3976, as well as the inductor and
L • fSW catch diode. To limit this power dissipation, the LT3976
starts to fold back the current limit when the FB pin falls
where fSW is the switching frequency of the LT3976, DC is below 0.8V. The LT3976 typically lowers the peak current
the duty cycle and L is the value of the inductor. Therefore, limit about 50% from 10A to 5A.
the maximum output current that the LT3976 will deliver
depends on the switch current limit, the inductor value, During start-up, when the output voltage and FB pin are low,
and the input and output voltages. The inductor value may current limit foldback could hinder the LT3976’s ability to
have to be increased if the inductor ripple current does start up into a large load. To avoid this potential problem,
not allow sufficient maximum output current (IOUT(MAX)) the LT3976’s current limit foldback will be disabled until
given the switching frequency, and maximum input voltage the SS pin has charged above 2V. Therefore, the use of
used in the desired application. a soft-start capacitor will keep the current limit foldback
feature out of the way while the LT3976 is starting up.
The optimum inductor for a given application may differ
from the one indicated by this simple design guide. A larger The LT3976 has thermal shutdown to further protect the
value inductor provides a higher maximum load current and part during periods of high power dissipation, particularly
reduces the output voltage ripple. If your load is lower than in high ambient temperature environments. The thermal
the maximum load current, than you can relax the value of shutdown feature detects when the LT3976 is too hot
the inductor and operate with higher ripple current. This and shuts the part down, preventing switching. When the
allows you to use a physically smaller inductor, or one with thermal event passes and the LT3976 cools, the part will
a lower DCR resulting in higher efficiency. Be aware that if restart and resume switching. A thermal shutdown event
the inductance differs from the simple rule above, then the actively discharges the soft-start capacitor.
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 LT3976
Applications Information
Input Capacitor where fSW is in MHz, and COUT is the recommended output
capacitance in μF. Use X5R or X7R types. This choice will
Bypass the input of the LT3976 circuit with a ceramic capaci-
provide low output ripple and good transient response.
tor of X7R or X5R type. Y5V types have poor performance
Transient performance can be improved with a higher value
over temperature and applied voltage, and should not be
capacitor if combined with a phase lead capacitor (typically
used. A 4.7μF to 10μF ceramic capacitor is adequate to
10pF) between the output and the feedback pin. A lower
bypass the LT3976 and will easily handle the ripple cur-
value of output capacitor can be used to save space and
rent. Note that larger input capacitance is required when
cost but transient performance will suffer.
a lower switching frequency is used (due to longer on
times). If the input power source has high impedance, or When choosing a capacitor, look carefully through the
there is significant inductance due to long wires or cables, data sheet to find out what the actual capacitance is under
additional bulk capacitance may be necessary. This can operating conditions (applied voltage and temperature).
be provided with a low performance electrolytic capacitor. A physically larger capacitor or one with a higher voltage
rating may be required. Table 3 lists several capacitor
Step-down regulators draw current from the input sup-
vendors.
ply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage Table 3. Recommended Ceramic Capacitor Vendors
ripple at the LT3976 and to force this very high frequency MANUFACTURER URL
switching current into a tight local loop, minimizing EMI. AVX www.avxcorp.com
A 10μF capacitor is capable of this task, but only if it is Murata www.murata.com
placed close to the LT3976 (see the PCB Layout section). Taiyo Yuden www.t-yuden.com
A second precaution regarding the ceramic input capacitor Vishay Siliconix www.vishay.com
concerns the maximum input voltage rating of the LT3976. TDK www.tdk.com
A ceramic input capacitor combined with trace or cable
inductance forms a high quality (under damped) tank Ceramic Capacitors
circuit. If the LT3976 circuit is plugged into a live supply, When in dropout, the LT3976 can excite ceramic ca-
the input voltage can ring to twice its nominal value, pos- pacitors at audio frequencies. At high load, this could be
sibly exceeding the LT3976’s voltage rating. If the input unacceptable. Simply adding bulk input capacitance to
supply is poorly controlled or the user will be plugging the input and output will significantly reduce the voltage
the LT3976 into an energized supply, the input network ripple and the audible noise generated at these nodes to
should be designed to prevent this overshoot. See Linear acceptable levels.
Technology Application Note 88 for a complete discussion.
A final precaution regarding ceramic capacitors concerns
Output Capacitor and Output Ripple the maximum input voltage rating of the LT3976. As pre-
viously mentioned, a ceramic input capacitor combined
The output capacitor has two essential functions. Along
with trace or cable inductance forms a high quality (under
with the inductor, it filters the square wave generated by
damped) tank circuit. If the LT3976 circuit is plugged into a
the LT3976 to produce the DC output. In this role it deter-
live supply, the input voltage can ring to twice its nominal
mines the output ripple, so low impedance (at the switching
value, possibly exceeding the LT3976’s rating. If the input
frequency) is important. The second function is to store
supply is poorly controlled or the user will be plugging
energy in order to satisfy transient loads and stabilize the
the LT3976 into an energized supply, the input network
LT3976’s control loop. Ceramic capacitors have very low
should be designed to prevent this overshoot. See Linear
equivalent series resistance (ESR) and provide the best
Technology Application Note 88 for a complete discussion.
ripple performance. A good starting value is:
300
COUT =
VOUT • fSW
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LT3976
Applications Information
Catch Diode Selection Table 4. Schottky Diodes. The Reverse Current Values Listed
Are Estimates Based Off of Typical Curves for Reverse Current
The catch diode (D1 from the Block Diagram) conducts vs Reverse Voltage at 25°C
current only during the switch off time. Average forward VF at IR at
VF at 5A 5A MAX VR = 20V
current in normal operation can be calculated from: TYP 25°C 25°C 25°C
PART NUMBER VR (V) IAVE (A) (mV) (mV) (µA)
⎛V – V ⎞
ID(AVG) = IOUT ⎜ IN OUT ⎟ On Semiconductor
⎝ VIN ⎠ MBRS540T3 40 5 450 500 120
Diodes Inc.
where IOUT is the output load current. The current rating of
B540C 40 5 510 550 2
the diode should be selected to be greater than or equal to
PDS540 40 5 480 520 4
the application’s output load current, so that the diode is
PDS560 60 5 610 670 0.9
robust for a wide input voltage range. A diode with even
SBR8A45SP5 45 8 450 — 18
higher current rating can be selected for the worst-case
SBR8AU60P5 60 8 400 — 60
scenario of overload, where the max diode current can then
increase to the typical peak switch current. Short circuit is
not the worst-case condition due to current limit foldback. charge the boost capacitor. Above 16V, the OUT pin abs
Peak reverse voltage is equal to the regulator input voltage. max is violated. For outputs between 2.5V and 3.2V, an
For inputs up to 40V, a 40V diode is adequate. external Schottky diode to the output is sufficient because
an external Schottky will have much lower forward voltage
An additional consideration is reverse leakage current. drop than the internal boost diode.
When the catch diode is reversed biased, any leakage
current will appear as load current. When operating under For output voltages less than 2.5V, there are two options.
light load conditions, the low supply current consumed An external Schottky diode can charge the boost capaci-
by the LT3976 will be optimized by using a catch diode tor from the input (Figure 4c) or from an external voltage
with minimum reverse leakage current. Low leakage source (Figure 4d). Using an external voltage source is
Schottky diodes often have larger forward voltage drops the better option because it is more efficient than charg-
at a given current, so a trade-off can exist between low ing the boost capacitor from the input. However, such
load and high load efficiency. Often Schottky diodes with a voltage rail is not always available in all systems. For
larger reverse bias ratings will have less leakage at a given output voltages greater than 16V, an external Schottky
output voltage than a diode with a smaller reverse bias diode from an external voltage source should be used to
rating. Therefore, superior leakage performance can be charge the boost capacitor (Figure 4e). In applications
achieved at the expense of diode size. Table 4 lists several using an external voltage source, the supply should be
Schottky diodes and their manufacturers. between 3.1V and 16V. When using the input, the input
voltage may not exceed 27V. In all cases, the maximum
BOOST and OUT Pin Considerations voltage rating of the BOOST pin must not be exceeded.
Capacitor C3 and the internal boost Schottky diode (see the When the output is above 16V, the OUT pin can not be
Block Diagram) are used to generate a boost voltage that tied to the output or the OUT pin abs max will be violated.
is higher than the input voltage. In most cases a 0.47μF It should instead be tied to GND (Figure 4e). This is to
capacitor will work well. The BOOST pin must be more prevent the dropout circuitry from interfering with switch-
than 1.8V above the SW pin for best efficiency and more ing behavior and to prevent the 100mA active pull-down
than 2.6V above the SW pin to allow the LT3976 to skip from drawing power. It is important to note that when
off times to achieve very high duty cycles. For outputs the output is above 16V and the OUT pin is grounded,
between 3.2V and 16V, the standard circuit with the OUT the dropout circuitry is not connected, so the minimum
pin connected to the output (Figure 4a) is best. Below 3.2V dropout will be about 1.5V, rather than 500mV. If the
the internal Schottky diode may not be able to sufficiently output is less than 3.2V and an external Schottky is used
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 LT3976
Applications Information
to charge the boost capacitor, the OUT pin should still be Enable and Undervoltage Lockout
tied to the output even though the minimum input voltage
The LT3976 is in shutdown when the EN pin is low and
of the LT3976 will be limited by the 4.3V minimum rather
active when the pin is high. The falling threshold of the
than the minimum dropout voltage.
EN comparator is 1.02V, with 60mV of hysteresis. The EN
With the OUT pin connected to the output, a 100mA ac- pin can be tied to VIN if the shutdown feature is not used.
tive load will charge the boost capacitor during light load
Undervoltage lockout (UVLO) can be added to the LT3976
start-up and an enforced 500mV minimum dropout voltage
as shown in Figure 6. Typically, UVLO is used in situa-
will keep the boost capacitor charged across operating
tions where the input supply is current limited, or has a
conditions (see Minimum Dropout Voltage section). This
relatively high source resistance. A switching regulator
yields excellent start-up and dropout performance. Figure 5
draws constant power from the source, so source cur-
shows the minimum input voltage for 3.3V and 5V outputs.
rent increases as source voltage drops. This looks like a

BOOST BOOST BOOST

VIN VIN SW VIN VIN SW VIN VIN SW

LT3976 LT3976 LT3976

OUT VOUT OUT VOUT OUT VOUT

GND GND GND

(4a) For 3.2V ≤ VOUT ≤ 16V (4b) For 2.5V ≤ VOUT ≤ 3.2V (4c) For VOUT < 2.5V, VIN < 27V

VS VS

BOOST BOOST
VIN VIN SW VIN VIN SW

LT3976 LT3976

OUT VOUT OUT VOUT

GND GND
3976 F04

(4d) For VOUT < 2.5V, 3.1V ≤ VS ≤ 16V (4e) For VOUT > 16V, 3.1V ≤ VS ≤ 16V

Figure 4. Five Circuits for Generating the Boost Voltage

6.5 5.0
VOUT = 5V VOUT = 3.3V
fSW = 800kHz FRONT PAGE APPLICATION
6.0 4.5
TO RUN/TO START TO RUN/TO START
INPUT VOLTAGE (V)

INPUT VOLTAGE (V)

5.5 4.0

5.0 3.5

4.5 3.0

4.0 2.5
0 1 2 3 4 5 0 1 2 3 4 5
LOAD CURRENT (A) LOAD CURRENT (A)
3976 F05a 3976 F05b

Figure 5. The Minimum Input Voltage Depends on Output Voltage and Load Current
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LT3976
Applications Information
VIN LT3976
IL
1A/DIV
R3 1.02V +
EN SHDN
–
VOUT
R4 1V/DIV
LT3976 F06

VSS
Figure 6. Undervoltage Lockout 0.5V/DIV
3976 F07
1ms/DIV
negative resistance load to the source and can cause the
source to current limit or latch low under low source voltage Figure 7. Soft-Start Waveforms for the Front-Page Application
conditions. UVLO prevents the regulator from operating with a 10nF Capacitor on SS. EN Is Pulsed High for About 7ms
with a 1.65Ω Load Resistor
at source voltages where the problems might occur. The
UVLO threshold can be adjusted by setting the values R3 Synchronization
and R4 such that they satisfy the following equation: To select low ripple Burst Mode operation, tie the SYNC
⎛ R3+R4 ⎞ pin below 0.5V (this can be ground or a logic output).
VUVLO = VEN(THRESH) ⎜ ⎟
⎝ R4 ⎠ Synchronizing the LT3976 oscillator to an external fre-
quency can be done by connecting a square wave (with
where VEN(THRESH) is the falling threshold of the EN pin, 20% to 80% duty cycle) to the SYNC pin. The square
which is approximately 1.02V, and where switching should wave amplitude should have valleys that are below 0.5V
stop when VIN falls below VUVLO. Note that due to the and peaks above 1.5V (up to 6V).
comparator’s hysteresis, switching will not start until the
input is about 6% above VUVLO. The LT3976 will pulse skip at low output loads while syn-
chronized to an external clock to maintain regulation. At
When operating in Burst Mode operation for light load very light loads, the part will go to sleep between groups of
currents, the current through the UVLO resistor network pulses, so the quiescent current of the part will still be low,
can easily be greater than the supply current consumed but not as low as in Burst Mode operation. The quiescent
by the LT3976. Therefore, the UVLO resistors should be current in a typical application when synchronized with an
large to minimize their effect on efficiency at low loads. external clock is 11µA at no load. Holding the SYNC pin
DC high yields no advantages in terms of output ripple or
Soft-Start minimum load to full frequency, so is not recommended.
The SS pin can be used to soft start the LT3976 by throt- Never float the SYNC pin.
tling the maximum input current during start-up and reset. The LT3976 may be synchronized over a 250kHz to 2MHz
An internal 1.8μA current source charges an external range. The RT resistor should be chosen to set the LT3976
capacitor generating a voltage ramp on the SS pin. The switching frequency 20% below the lowest synchronization
SS pin clamps the internal VC node, which slowly ramps input. For example, if the synchronization signal will be
up the current limit. Maximum current limit is reached 250kHz and higher, the RT should be selected for 200kHz.
when the SS pin is about 1.5V or higher. By selecting a To assure reliable and safe operation the LT3976 will only
large enough capacitor, the output can reach regulation synchronize when the output voltage is near regulation
without overshoot. Figure 7 shows start-up waveforms as indicated by the PG flag. It is therefore necessary to
for a typical application with a 10nF capacitor on SS for choose a large enough inductor value to supply the required
a 1.65Ω load when the EN pin is pulsed high for 7ms. output current at the frequency set by the RT resistor (see
The external SS capacitor is actively discharged when the Inductor Selection section). The slope compensation is set
EN pin is low, or during thermal shutdown. The active by the RT value, while the minimum slope compensation
pull-down on the SS pin has a resistance of about 150Ω. required to avoid subharmonic oscillations is established
3976f

20 For more information www.linear.com/3976

 LT3976
Applications Information
by the inductor size, input voltage and output voltage. Protection section). There is another situation to consider
Since the synchronization frequency will not change the in systems where the output will be held high when the
slopes of the inductor current waveform, if the inductor input to the LT3976 is absent. This may occur in battery
is large enough to avoid subharmonic oscillations at the charging applications or in battery backup systems where
frequency set by RT, than the slope compensation will be a battery or some other supply is diode ORed with the
sufficient for all synchronization frequencies. LT3976’s output. If the VIN pin is allowed to float and the
EN/UVLO pin is held high (either by a logic signal or be-
Power Good Flag cause it is tied to VIN), then the LT3976’s internal circuitry
The PG pin is an open-drain output which is used to indicate will pull its quiescent current through its SW pin. This is
to the user when the output voltage is within regulation. fine if your system can tolerate a few μA in this state. If
When the output is lower than the regulation voltage by you ground the EN pin, the SW pin current will drop to
more than 8.4%, as determined from the FB pin voltage, essentially zero. However, if the VIN pin is grounded while
the PG pin will pull low to indicate the power is not good. the output is held high, regardless of EN, parasitic diodes
Otherwise, the PG pin will go high impedance and can inside the LT3976 can pull current from the output through
be pulled logic high with a resistor pull-up. The PG pin is the SW pin and the VIN pin. Figure 9 shows a circuit that
only comparing the output voltage to an accurate refer- will run only when the input voltage is present and that
ence when the LT3976 is enabled and VIN is above 4.3V. protects against a shorted or reversed input.
When the part is shutdown, the PG is actively pulled low to D4
PDS540
indicate that the LT3976 is not regulating the output. The VIN VIN BOOST
input voltage must be greater than 1.4V to fully turn-on
the active pull-down device. Figure 8 shows the status of EN SW VOUT
LT3976
the PG pin as the input voltage is increased.
OUT
4 GND FB +
BACKUP

3
PG PIN VOLTAGE (V)

3976 F09

2
Figure 9. Diode D4 Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output. It Also Protects the Circuit
1
from a Reversed Input. The LT3976 Runs Only When the Input
Is Present

0
PCB Layout
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
INPUT VOLTAGE (V) For proper operation and minimum EMI, care must be
3976 F08 taken during printed circuit board layout. Figure 10 shows
Figure 8. PG Pin Voltage Versus Input Voltage when PG a sample component placement with trace, ground plane
Is Connected to 3V Through a 150k Resistor. The FB Pin and via locations, which serves as a good PCB layout
Voltage Is 1.15V example. Note that large, switched currents flow in the
LT3976’s VIN and SW pins, the catch diode (D1), and the
Shorted and Reversed Input Protection
input capacitor (C1). The loop formed by these compo-
If the inductor is chosen so that it won’t saturate exces- nents should be as small as possible. These components,
sively, a LT3976 buck regulator will tolerate a shorted along with the inductor and output capacitor, should be
output and the power dissipation will be limited by current placed on the same side of the circuit board, and their
limit foldback (see Current Limit Foldback and Thermal connections should be made on that layer. Place a local,
3976f

For more information www.linear.com/3976 21

LT3976
Applications Information
LT3976 power dissipation by the thermal resistance from
junction to ambient. The temperature rise of the LT3976 for
a 3.3V and 5V application was measured using a thermal
SS SYNC
camera and is shown in Figure 11.
17 VOUT
VOUT FB •••
•••
PG Also keep in mind that the leakage current of the power
•• •• •• RT
•• •• •• Schottky diode goes up exponentially with junction tem-
OUT BST •• •• ••
•••
•••
perature. When the power switch is off, the power Schottky
•••
VIN
EN diode is in parallel with the power converter’s output
SW filter stage. As a result, an increase in a diode’s leakage
current results in an effective increase in the load, and a
corresponding increase in the input quiescent current.
Therefore, the catch Schottky diode must be selected
with care to avoid excessive increase in light load supply
3976 F10
current at high temperatures.
Figure 10. Layout Showing a Good PCB Design
70
VOUT = 3.3V
65
unbroken ground plane below these components. The SW 60
fSW = 400kHz
2.5in × 2.5in 4-LAYER BOARD
and BOOST nodes should be as small as possible. Finally, CHIP TEMPERATURE RISE (°C) 55
50
keep the FB and RT nodes small so that the ground traces 45
will shield it from the SW and BOOST nodes. The exposed 40
35
pad on the bottom of the package must be soldered to 30
ground so that the pad acts as a heat sink. To keep thermal 25

resistance low, extend the ground plane as much as pos- 20

15
sible, and add thermal vias under and near the LT3976 to 10 12V
24V
additional ground planes within the circuit board and on 5
0
36V

the bottom side. 1 2 3 4 5

OUTPUT CURRENT (A)

High Temperature Considerations

3976 F11a

Figure 11a. Temperature Rise of the LT3976 in

For higher ambient temperatures, care should be taken in the Front Page Application
the layout of the PCB to ensure good heat sinking of the
LT3976. The exposed pad on the bottom of the package 90
VOUT = 5V
must be soldered to a ground plane. This ground should 80 fSW = 800kHz
2.5in × 2.5in 4-LAYER BOARD
be tied to large copper layers below with thermal vias;
CHIP TEMPERATURE RISE (°C)

70

these layers will spread the heat dissipated by the LT3976. 60

Placing additional vias can reduce the thermal resistance 50
further. When operating at high ambient temperatures, the 40
maximum load current should be derated as the ambient 30
temperature approaches the maximum junction rating. 20
(See Thermal Derating curve in the Typical Performance 10
12V
24V
Characteristics section.) 0
36V
1 2 3 4 5
Power dissipation within the LT3976 can be estimated by OUTPUT CURRENT (A)
calculating the total power loss from an efficiency measure- 3976 F11b

ment and subtracting the catch diode loss and inductor Figure 11b. Temperature Rise of the LT3976 in a
loss. The die temperature is calculated by multiplying the 5VOUT Application
3976f

22 For more information www.linear.com/3976

 LT3976
Applications Information
Fault Tolerance of QFN Package If the output voltage is less than 6V, then the application
circuit can be setup normally (see Figure 12a) because a
The QFN package is designed to tolerate single fault condi-
SS to OUT short will not violate the SS pin 6V absolute
tions. Shorting two adjacent pins together or leaving one
maximum and a PG short to either RT or SYNC will not
single pin floating does not raise the output voltage or cause
violate the 6V absolute maximum on each of those pins.
damage to the LT3976 regulator. However, the application
circuit must meet a few requirements discussed in this If the output voltage is greater than 6V, the best way to
section in order to achieve this fault tolerance. solve the problem of violating the SS absolute maximum
when shorted to OUT is to tie the OUT pin to GND. Note
Tables 5 and 6 show the effects that result from shorting
that grounding the OUT pin will compromise the dropout
adjacent pins or from a floating pin, respectively.
performance of the LT3976. When OUT is grounded, an
There are three items which require consideration in terms external Schottky diode to either the output, VIN, or an-
of the application circuit to achieve fault tolerance: SS- other voltage source must be used to charge the boost
OUT pin short, RT-PG pin short, and PG-SYNC pin short. capacitor. The PG pull-up resistor must be increased

Table 5. Effects of Pin Shorts

PINS EFFECT
SS-OUT VOUT may fall below regulation voltage for VOUT less than or equal to 6V. For outputs above 6V, the absolute maximum of the SS pin
would be violated, so the OUT pin must be tied to GND (see discussion in the Fault Tolerance section)
VIN-EN No effect. In most applications, EN is tied to VIN. If EN is driven with a logic signal, the customer must ensure that the circuit generating
that signal can withstand the maximum VIN
RT-PG No effect if PG is floated. VOUT will fall below regulation if PG is connected to the output with a resistor pull-up as long as the resister
divider formed by the PG pin pull-up and the RT resistor prevents the RT pin absolute maximum from being violated (see discussion in
the Fault Tolerance section). In both cases, the switching frequency will be significantly increased if the output goes below regulation,
which may cause the LT3976 to go into pulse-skipping mode if the minimum on-time is violated.
PG-SYNC No effect if PG is floated. No effect if PG is connected to the output with a resistor pull-up as long as there is a resistor to GND on the
SYNC pin or the SYNC pin is tied to GND. This is to ensure that the resistor divider formed by the PG pin pull-up and the SYNC pin
resistor to GND prevents the SYNC pin Absolute Maximum from being violated (see discussion in the Fault Tolerance section).

Table 6. Effects of Floating Pins

PIN EFFECT
SS No effect; soft-start feature will not function.
OUT VOUT may fall below regulation voltage. With the OUT pin disconnected, the boost capacitor cannot be charged and thus the power 700

600

SWITCHING FREQUENCY (kHz)

500

400

300

200

100

0
0 0.2 0.4 0.6 0.8 1 1.2
FB PIN VOLTAGE (V)
3976 G22

switch cannot fully saturate, which increases power dissipation.

BOOST VOUT may fall below regulation voltage. With the BOOST pin disconnected, the boost capacitor cannot be charged and thus the power
switch cannot fully saturate, which increases power dissipation.
SW No effect; there are several SW pins.
VIN No effect; there are several VIN pins.
EN VOUT may fall below regulation voltage. Part may work normally or be shutdown depending on how the application circuit couples to the
floating EN pin.
RT VOUT may fall below regulation voltage.
PG No effect.
SYNC No effect. The LT3976 may be in Burst Mode operation or pulse-skipping mode depending on how the application circuit couples to the
floating SYNC pin.
FB No effect; there are two FB pins.
GND No effect; there are several GND connections. If Exposed Pad is floated, thermal performance will be degraded.

3976f

For more information www.linear.com/3976 23

LT3976
Applications Information
and a SYNC pin resistor to GND added, so that a PG pin Other Linear Technology Publications
short to either SYNC or RT will form resistor dividers to
Application Notes 19, 35 and 44 contain more detailed
keep the voltage on the SYNC and RT pins below their
descriptions and design information for buck regulators
rated absolute maximum. This application is shown in
and other switching regulators. The LT1376 data sheet
Figure 12b. The external Schottky must be connected
has a more extensive discussion of output ripple, loop
such that the absolute maximum of the BOOST pin is not
compensation and stability testing. Design Note 318
violated. The SYNC pin resistor can be removed if the
shows how to generate a bipolar output supply using a
SYNC pin is grounded or PG is left floating both of which
buck regulator.
also result in fault tolerant circuits.

VIN
0.47µF
VIN BOOST 3.3µH
EN SW
EXTERNAL 2Ω
SYNC
INPUT 150k
LT3976 470pF
10µF
PG PGOOD
SS OUT
1M
RT FB VOUT
10nF
GND
47µF
34.9k 316k 1210
10pF ×2
3976 F12a
f = 800kHz

Figure 12a. Fault Tolerant for VOUT < 6V

(Note: For VOUT < 3.3V External Boost Schottky Diode Is Needed)

VIN
0.47µF
VIN BOOST 3.3µH
EN SW
EXTERNAL 2Ω
SYNC
INPUT 249k
LT3976 470pF
10µF
40.2k PG PGOOD
SS OUT
1M
RT FB VOUT
10nF
GND
47µF
54.9k 316k 1210
10pF ×2
3976 F12b
f = 800kHz

Figure 12b. Fault Tolerant for VOUT < 27V

(Note: For VOUT < 3V External Boost Schottky Diode
Should Be Connected to the Input)

Figure 12. Two Example Circuits to Achieve Fault Tolerance (FMEA) with the LT3976 QFN Package

3976f

24 For more information www.linear.com/3976

 LT3976
Typical Applications
5V Step-Down Converter 12V Step-Down Converter
VIN VIN
6V* TO 40V 13.2V* TO 40V
VIN VIN
OFF ON EN BOOST OFF ON EN BOOST
0.47µF 3.3µH 0.47µF 6.8µH
PG SW PG SW
10µF 2Ω 10µF 2Ω
LT3976 LT3976
470pF 470pF

SS OUT SS OUT
1M VOUT 1M VOUT
RT FB 5V RT FB 12V
SYNC GND 10pF 5A SYNC GND 10pF 5A
10nF 10nF
47µF 47µF
54.9k 316k 1210 54.9k 110k
1210
×2
3976 TA02 3976 TA03
f = 800kHz f = 800kHz
D = PDS540 D = PDS540
L = IHLP-2525CZ-01 L = IHLP-4040DZ-01
* MINIMUM VIN CAN BE LOWERED WITH ADDITIONAL * MINIMUM VIN CAN BE LOWERED WITH ADDITIONAL
INPUT AND OUTPUT CAPACITANCE. INPUT AND OUTPUT CAPACITANCE.

5V, 2MHz Step-Down Converter with Power Good 4V Step-Down Converter with a High Impedance Input Source

VIN
5.9V TO 18V
(40V TRANSIENTS) 0.47µF +
VIN BOOST 1.5µH V 24V 5.49M VIN
OFF ON EN SW – PG BOOST
0.47µF 3.3µH
EN SW
2Ω
150k + CBULK
4.7µF 499k 2Ω
LT3976 470pF 100µF LT3976
470pF
PG PGOOD
SS OUT SS OUT
1M VOUT 1M VOUT
RT FB 5V RT FB 4V
10pF 5A SYNC GND 10pF 5A
10nF SYNC GND 10µF 47nF

54.9k 432k 47µF

14.7k 316k 47µF 1210
1210 ×2
3976 TA05
f = 2MHz
3976 TA04
f = 800kHz
D = PDS540 D = PDS540
L = IHLP-2525CZ-01 L = IHLP-2525CZ-01

2.5V Step-Down Converter 1.8V Step-Down Converter

DFLS160 DFLS160
VIN VIN
4.3V TO 40V 4.3V TO 27V

VIN BOOST VIN

0.47µF
OFF ON EN OFF ON EN BOOST
3.3µH 0.47µF 2.2µH
PG SW PG SW
10µF 2Ω 10µF 2Ω
×2 LT3976 LT3976
470pF 470pF

SS OUT SS OUT
1M VOUT 499k VOUT
RT FB 2.5V RT FB 1.8V
SYNC GND 4.7pF 5A SYNC GND 10pF 5A
10nF 10nF
47µF 47µF
130k 909k 97.6k 1M
1210 1210
3976 TA06
×4 ×4
3976 TA07
f = 400kHz f = 500kHz
D = PDS540 D = PDS540
L = IHLP-2525CZ-01 L = IHLP-2525CZ-01

3976f

For more information www.linear.com/3976 25

LT3976
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev E)

BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102 2.845 ±0.102
(.112 ±.004) 0.889 ±0.127 (.112 ±.004)
(.035 ±.005)
1 8 0.35
REF

5.23 1.651 ±0.102

1.651 ±0.102 3.20 – 3.45
(.206) 0.12 REF
(.065 ±.004) (.126 – .136) (.065 ±.004)
MIN
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
16 9 FOR REFERENCE ONLY
0.305 ±0.038 0.50 NO MEASUREMENT PURPOSE
(.0120 ±.0015) (.0197) 4.039 ±0.102
TYP BSC (.159 ±.004)
(NOTE 3) 0.280 ±0.076
RECOMMENDED SOLDER PAD LAYOUT
16151413121110 9 (.011 ±.003)
REF
DETAIL “A”
0.254
(.010) 3.00 ±0.102
0° – 6° TYP 4.90 ±0.152
(.118 ±.004)
(.193 ±.006)
GAUGE PLANE (NOTE 4)

0.53 ±0.152
(.021 ±.006)
1234567 8
DETAIL “A” 1.10 0.86
0.18 (.043) (.034)
(.007) MAX REF

SEATING
PLANE 0.17 – 0.27 0.1016 ±0.0508
(.007 – .011) (.004 ±.002)
TYP 0.50
NOTE: (.0197)
MSOP (MSE16) 0911 REV E

1. DIMENSIONS IN MILLIMETER/(INCH) BSC

2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.

3976f

26 For more information www.linear.com/3976

 LT3976
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

UDD Package
24-Lead Plastic QFN (3mm × 5mm)
(Reference LTC DWG # 05-08-1833 Rev Ø)

0.70 ±0.05

3.50 ±0.05
2.10 ±0.05 3.65 ±0.05
1.50 REF
1.65 ±0.05

PACKAGE OUTLINE

0.25 ±0.05
0.50 BSC
3.50 REF
4.10 ±0.05
5.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.20 OR 0.25
0.75 ±0.05
1.50 REF × 45° CHAMFER
3.00 ±0.10 R = 0.05 TYP
23 24
0.40 ±0.10

PIN 1 1
TOP MARK
2
(NOTE 6)

3.65 ±0.10
5.00 ±0.10 3.50 REF
1.65 ±0.10

(UDD24) QFN 0808 REV Ø

0.200 REF 0.25 ±0.05

R = 0.115
0.00 – 0.05 TYP 0.50 BSC
BOTTOM VIEW—EXPOSED PAD

NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE

3976f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
Forofmore
tion that the interconnection information
its circuits www.linear.com/3976
as described herein will not infringe on existing patent rights. 27
LT3976
Typical Application
1.2V Step-Down Converter
DFLS160
VIN
4.3V TO 27V 3.3V
(40V TRANSIENT)
VIN
OFF ON EN BOOST
0.47µF 2.2µH
PG SW
10µF 2Ω
LT3976
470pF

SS OUT
VOUT
RT FB 1.2V
SYNC GND 5A
10nF

130k 47µF
1210
3976 TA08
×4
f = 400kHz
D = PDS540
L = IHLP-2525CZ-01

Related Parts
PART NUMBER DESCRIPTION COMMENTS
LT3480 36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz, High VIN = 3.6V to 38V, Transients to 60V, VOUT(MIN) = 0.78V,
Efficiency Step-Down DC/DC Converter with Burst Mode® Operation IQ = 70µA, ISD < 1µA, 3mm × 3mm DFN-10, MSOP-10E
LT3980 58V with Transient Protection to 80V, 2A (IOUT), 2.4MHz, High VIN = 3.6V to 58V, Transients to 80V, VOUT(MIN) = 0.79V,
Efficiency Step-Down DC/DC Converter with Burst Mode Operation IQ = 75µA, ISD < 1µA, 3mm × 4mm DFN-16, MSOP-16E
LT3971 38V, 1.2A (IOUT), 2MHz, High Efficiency Step-Down VIN = 4.2V to 38V, VOUT(MIN) = 1.2V, IQ = 2.8µA, ISD < 1µA,
DC/DC Converter with Only 2.8µA of Quiescent Current 3mm × 3mm DFN-10, MSOP-10E
LT3991 55V, 1.2A (IOUT), 2MHz, High Efficiency Step-Down VIN = 4.2V to 55V, VOUT(MIN) = 1.2V, IQ = 2.8µA, ISD < 1µA,
DC/DC Converter with Only 2.8µA of Quiescent Current 3mm × 3mm DFN-10, MSOP-10E
LT3970 40V, 350mA (IOUT), 2MHz, High Efficiency Step-Down VIN = 4.2V to 40V, VOUT(MIN) = 1.2V, IQ = 2.5µA, ISD < 0.7µA,
DC/DC Converter with Only 2.5µA of Quiescent Current 2mm × 3mm DFN-10, MSOP-10E
LT3990 62V, 350mA (IOUT), 2.2MHz, High Efficiency Step-Down VIN = 4.2V to 62V, VOUT(MIN) = 1.2V, IQ = 2.5µA, ISD < 0.7µA,
DC/DC Converter with Only 2.5µA of Quiescent Current 3mm × 3mm DFN-10, MSOP-16E

3976f

28 Linear Technology Corporation

LT 0113 • PRINTED IN USA

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For more information www.linear.com/3976
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