Features Description: Ltc3609 32V, 6A Monolithic Synchronous Step-Down DC/DC Converter
Features Description: Ltc3609 32V, 6A Monolithic Synchronous Step-Down DC/DC Converter
32V, 6A Monolithic
Synchronous Step-Down
DC/DC Converter
Features Description
n 6A Output Current The LTC®3609 is a high efficiency, monolithic synchronous
n Wide VIN Range = 4V to 32V (36V Maximum) step-down DC/DC converter that can deliver up to 6A output
n Internal N-Channel MOSFETs current from a 4V to 32V (36V maximum) input supply. It
n True Current Mode Control uses a valley current control architecture to deliver very
n Optimized for High Step-Down Ratios low duty cycle operation at high frequency with excellent
n tON(MIN) ≤ 100ns transient response. The operating frequency is selected
n Extremely Fast Transient Response by an external resistor and is compensated for variations
n Stable with Ceramic COUT in VIN and VOUT.
n ±1% 0.6V Voltage Reference
n
The LTC3609 can be configured for discontinuous or
Power Good Output Voltage Monitor
n
forced continuous operation at light load. Forced continu-
Adjustable On-Time/Switching Frequency
n
ous operation reduces noise and RF interference while
Adjustable Current Limit
n
discontinuous mode provides high efficiency by reducing
Programmable Soft-Start
n
switching losses at light loads.
Output Overvoltage Protection
n Optional Short-Circuit Shutdown Timer Fault protection is provided by internal foldback current
n Low Shutdown IQ: 15µA limiting, an output overvoltage comparator and an optional
n Available in a 7mm × 8mm 52-Pin QFN Package short-circuit shutdown timer. Soft-start capability for sup-
ply sequencing is accomplished using an external timing
Applications capacitor. The regulator current limit is user programmable.
n Point of Load Regulation A power good output voltage monitor indicates when
n Distributed Power Systems the output is in regulation. The LTC3609 is available in a
compact 7mm × 8mm QFN package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6100678, 6580258, 5847554, 6304066.
Typical Application
High Efficiency Step-Down Converter Efficiency and Power Loss
187k
vs Load Current
0.1µF VOUT VON ION 100 10000
VIN 90 EFFICIENCY
RUN/SS VIN
4V TO 32V
10µF 80
100pF LTC3609 x3 1000
70
POWER LOSS (mW)
1.2µH VOUT
EFFICIENCY (%)
SW 2.5V 60
1000pF 0.22µF 6A
100µF 50 100
ITH BOOST x2 POWER LOSS
15.8k 40
SGND INTVCC 30
30.1k 10
FCB 20
10 VOUT = 2.5V VIN = 12V
VRNG 4.7µF
EXTVCC = 5V VIN = 25V
PGND 0 1
PGOOD
0.01 0.1 1 10
EXTVCC VFB LOAD CURRENT (A)
3609 TA01b
3609 TA01a 9.53k
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LTC3609
Absolute Maximum Ratings Pin Configuration
(Note 1)
TOP VIEW
Input Supply Voltage (SVIN, PVIN, ION)........ 36V to –0.3V
52 PVIN
51 PVIN
50 PVIN
49 PVIN
48 PVIN
Boosted Topside Driver Supply Voltage
47 SW
46 SW
45 SW
44 SW
43 SW
42 SW
41 SW
(BOOST)................................................. 42V to –0.3V
SW Voltage............................................. 36V to –0.3V PVIN 1 40 PGND
INTVCC, EXTVCC, (BOOST – SW), RUN/SS, PVIN 2 39 PGND
PGOOD Voltages....................................... 7V to –0.3V PVIN 3
53
38 PGND
FCB, VON, VRNG Voltages............. INTVCC + 0.3V to –0.3V PVIN 4 PVIN 55 37 PGND
PVIN 5 SW 36 PGND
ITH, VFB Voltages........................................ 2.7V to –0.3V PVIN 6 35 PGND
Operating Junction Temperature Range PVIN 7 34 PGND
(Notes 2, 4)......................................... –40°C to 125°C SW 8 33 SW
SGND 15
PGOOD 16
VRNG 17
ITH 18
FCB 19
SGND 20
NC 21
ION 22
VFB 23
NC 24
NC 25
SGND 26
WKG PACKAGE
52-LEAD (7mm s 8mm) QFN MULTIPAD
TJMAX = 125°C, θJA = 29°C/W
order information
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3609EWKG#PBF LTC3609EWKG#TRPBF LTC3609WKG 52-Lead (7mm × 8mm) Plastic QFN –40°C to 125°C
LTC3609IWKG#PBF LTC3609IWKG#TRPBF LTC3609WKG 52-Lead (7mm × 8mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC3609
Electrical
Characteristics The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop
SVIN Operating Input Voltage Range 4 32 V
IQ Input DC Supply Current
Normal 900 2000 µA
Shutdown Supply Current 15 30 µA
VFB Feedback Reference Voltage ITH = 1.2V (Note 3)
–40°C to 85°C 0.594 0.600 0.606 V
–40°C to 125°C l 0.590 0.600 0.610 V
∆VFB(LINEREG) Feedback Voltage Line Regulation VIN = 4V to 30V, ITH = 1.2V (Note 3) 0.002 %/V
∆VFB(LOADREG) Feedback Voltage Load Regulation ITH = 0.5V to 1.9V (Note 3) –0.05 –0.3 %
IFB Feedback Input Current VFB = 0.6V –5 ±50 nA
gm(EA) Error Amplifier Transconductance ITH = 1.2V (Note 3) l 1.4 1.7 2 mS
VFCB Forced Continuous Threshold l 0.54 0.6 0.66 V
IFCB Forced Continuous Pin Current VFCB = 0.6V –1 –2 µA
tON On-Time ION = 60µA, VON = 1.5V 220 280 340 ns
ION = 60µA, VON = 0V 110 ns
tON(MIN) Minimum On-Time ION = 180µA, VON = 0V 60 100 ns
tOFF(MIN) Minimum Off-Time ION = 30µA, VON = 1.5V 320 500 ns
IVALLEY(MAX) Maximum Valley Current VRNG = 0V, VFB = 0.56V, FCB = 0V l 4 9 A
VRNG = 1.2V, VFB = 0.56V, FCB = 0V l 6 14 A
IVALLEY(MIN) Maximum Reverse Valley Current VRNG = 0V, VFB = 0.64V, FCB = 0V 4 A
VRNG = 1.2V, VFB = 0.64V, FCB = 0V 7 A
∆VFB(OV) Output Overvoltage Fault Threshold 7 10 13 %
VRUN/SS(ON) RUN Pin Start Threshold l 0.8 1.5 2 V
VRUN/SS(LE) RUN Pin Latchoff Enable Threshold RUN/SS Pin Rising 4 4.5 V
VRUN/SS(LT) RUN Pin Latchoff Threshold RUN/SS Pin Falling 3.5 4.2 V
IRUN/SS(C) Soft-Start Charge Current VRUN/SS = 0V –0.5 –1.2 –3 µA
IRUN/SS(D) Soft-Start Discharge Current VRUN/SS = 4.5V, VFB = 0V 0.8 1.8 3 µA
VIN(UVLO) Undervoltage Lockout VIN Falling l 3.4 3.9 V
VIN(UVLOR) Undervoltage Lockout Release VIN Rising l 3.5 4 V
RDS(ON) Top Switch On-Resistance 18 27 mΩ
Bottom Switch On-Resistance 13 22 mΩ
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LTC3609
Electrical
Characteristics The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Internal VCC Regulator
VINTVCC Internal VCC Voltage 6V < VIN < 30V, VEXTVCC = 4V l 4.7 5 5.5 V
∆VLDO(LOADREG) Internal VCC Load Regulation ICC = 0mA to 20mA, VEXTVCC = 4V –0.1 ±2 %
VEXTVCC EXTVCC Switchover Voltage ICC = 20mA, VEXTVCC Rising l 4.5 4.7 V
∆VEXTVCC EXTVCC Switch Drop Voltage ICC = 20mA, VEXTVCC = 5V 150 300 mV
∆VEXTVCC(HYS) EXTVCC Switchover Hysteresis 500 mV
PGOOD Output
∆VFBH PGOOD Upper Threshold VFB Rising 7 10 13 %
∆VFBL PGOOD Lower Threshold VFB Falling –7 –10 –13 %
∆VFB(HYS) PGOOD Hysteresis VFB Returning 1 2.5 %
VPGL PGOOD Low Voltage IPGOOD = 5mA 0.15 0.4 V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: The LTC3609 is tested under pulsed load conditions such that
may cause permanent damage to the device. Exposure to any Absolute TJ ≈ TA. The LTC3609E is guaranteed to meet specifications from
Maximum Rating condition for extended periods may affect device 0°C to 125°C junction temperature. Specifications over the –40°C to
reliability and lifetime. 125°C operating junction temperature range are assured by design,
Note 2: TJ is calculated from the ambient temperature TA and power characterization and correlation with statistical process controls. The
dissipation PD as follows: LTC3609I is guaranteed over the full –40°C to 125°C operating junction
TJ = TA + (PD • 29°C/W) (θJA is simulated per JESD51-7 high effective temperature range. Note that the maximum ambient temperature
thermal conductivity test board). consistent with these specifications is determined by specific operating
θJC = 1°C/W (θJC is simulated when heat sink is applied at the bottom conditions in conjunction with board layout, the rated package thermal
of the package). impedance and other environmental factors.
Note 3: The LTC3609 is tested in a feedback loop that adjusts VFB to
achieve a specified error amplifier output voltage (ITH). The specification at
85°C is not tested in production. This specification is assured by design,
characterization, and correlation to testing at 125°C.
VOUT VOUT
200mV/DIV 200mV/DIV
RUN/SS
2V/DIV
IL
IL
5A/DIV
5A/DIV
VOUT
1V/DIV
ILOAD ILOAD
5A/DIV IL
5A/DIV 5A/DIV
3609 G01 3609 G02 3609 G03
20µs/DIV 20µs/DIV 40ms/DIV
LOAD STEP 0A TO 5A LOAD STEP 1A TO 6A VIN = 12V
VIN = 25V VIN = 25V VOUT = 2.5V
VOUT = 2.5V VOUT = 2.5V RLOAD = 0.5Ω
FCB = 0V FCB = INTVCC FIGURE 6 CIRCUIT
FIGURE 6 CIRCUIT FIGURE 6 CIRCUIT
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LTC3609
Typical Performance Characteristics
Efficiency vs Load Current Efficiency vs Input Voltage Frequency vs Input Voltage
100 100 650
FCB = 5V
90 FIGURE 6 CIRCUIT
80 600
VOUT = 5V 95
70 ILOAD = 6A
VOUT = 3.3V
FREQUENCY (kHz)
EFFICIENCY (%)
EFFICIENCY (%)
60 VOUT = 2.5V 550
VOUT = 1.8V ILOAD = 6A
50 VOUT = 1.5V 90
40 VOUT = 1.2V 500
VOUT = 1V
30 ILOAD = 1A
85 ILOAD = 1A
20 450
10 VIN = 12V FCB = 0V
FREQUENCY = 550kHz FIGURE 6 CIRCUIT
0 80 400
0.01 0.1 1 10 5 8 11 14 17 20 23 26 29 32 5 8 11 14 17 20 23 26 29 32
LOAD CURRENT (A) INPUT VOLTAGE (V) INPUT VOLTAGE (V)
3609 G05 3609 G06
3609 G04
Frequency vs Load Current Load Regulation ITH Voltage vs Load Current
700 0.80 2.5
FIGURE 6 CIRCUIT FIGURE 6 CIRCUIT
600 CONTINUOUS MODE 0.60
2.0
0.40
500
FREQUENCY (kHz)
400
CONTINUOUS
0
MODE
300 1.0
DISCONTINUOUS MODE –0.20
200
–0.40
0.5 DISCONTINUOUS
100 –0.60 MODE
0 –0.80 0
0 2 4 6 8 0 2 4 6 8 0 2 4 6 8
LOAD CURRENT (A) LOAD CURRENT (A) LOAD CURRENT (A)
3609 G07 3609 G08 3609 G09
10 800
LOAD CURRENT (A)
5 600
VRNG = 1V
0 400
100
–5 200
–10 10 0
0 0.5 1.0 1.5 2.0 2.5 1 10 100 0 1 2 3
ITH VOLTAGE (V) ION CURRENT (µA) VON VOLTAGE (V)
3609 G10 3609 G11 3609 G12
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LTC3609
Typical Performance Characteristics
Maximum Valley Current Limit Maximum Valley Current Limit
On-Time vs Temperature vs VRNG Voltage vs RUN/SS Voltage
300 15 15
IION = 30µA FIGURE 6 CIRCUIT FIGURE 6 CIRCUIT
VVON = 0V
200
ON-TIME (ns)
9 9
150
6 6
100
3 3
50
0 0 0
–50 –25 0 25 50 75 100 125 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.65 1.90 2.15 2.40 2.65 2.90 3.15 3.40
TEMPERATURE (°C) VRNG VOLTAGE (V) RUN/SS VOLTAGE (V)
3609 G14 3609 G15
3609 G13
Maximum Valley Current Limit Maximum Valley Current vs Input Maximum Valley Current Limit
vs Temperature Voltage in Foldback
15 10 10
12 8 8
9 6 6
6 4 4
3 2 2
0 0 0
–50 –25 0 25 50 75 100 125 4 12 20 28 36 0 0.1 0.2 0.3 0.4 0.5 0.6
TEMPERATURE (°C) INPUT VOLTAGE (V) VFB (V)
3609 G16 3609 G18
3609 G17
EXTVCC OPEN 35
FEEDBACK REFERENCE VOLTAGE (V)
1200
1.8
SHUTDOWN CURRENT (µA)
0.61 30
1000
INPUT CURRENT (µA)
1.6 25
800
gm (mS)
0.60 SHUTDOWN 20
600
1.4 15
400
0.59 10
1.2 EXTVCC = 5V
200 5
0.58 1.0 0 0
–50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 5 10 15 20 25 30
TEMPERATURE (°C) TEMPERATURE (°C) INPUT VOLTAGE (V)
3609 G19 3609 G20 3609 G21
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LTC3609
Typical Performance Characteristics
EXTVCC Switch Resistance
INTVCC Load Regulation vs Temperature IEXTVCC vs Frequency
0.30 10 25
VIN = 24V
0.20
IEXTVCC (mA)
∆INTVCC (%)
6 15
0
–0.10 4 10
–0.20
2 5
–0.30
–0.40 0 0
0 10 20 30 40 50 –50 –25 0 25 50 75 100 125 400 500 600 700 800 900 1000
INTVCC LOAD CURRENT (mA) TEMPERATURE (°C) FREQUENCY (kHz)
3609 G22 3609 G28
3609 G23
–0.25
2
RUN/SS PIN CURRENT (µA)
PULL-UP CURRENT
–1.50 –2 3.0
–50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3609 G25 3609 G26
3609 G24
95
IL
90
3.5 5A/DIV
85
DCM
EFFICIENCY (%)
80
3.0 75
VOUT
200mV/DIV 70
CCM
65
2.5
3609 G29 60
40µs/DIV
55 VIN = 24V
LOAD STEP 1A TO 4A FREQUENCY = 500kHz
2.0 VIN = 24V 50
–50 –25 0 25 50 75 100 125 VOUT = 12V 0.01 0.1 1 10
TEMPERATURE (°C) FCB = 0V LOAD CURRENT (A)
3609 G27
FIGURE 8 CIRCUIT 3609 G30
FIGURE 8 CIRCUIT
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LTC3609
Pin Functions
PVIN (Pins 1, 2, 3, 4, 5, 6, 7, 48, 49, 50, 51, 52, 53): ITH (Pin 18): Current Control Threshold and Error Amplifier
Main Input Supply. Decouple this pin to power PGND with Compensation Point. The current comparator threshold
the input capacitance, CIN. increases with this control voltage. The voltage ranges
SW (Pins 8, 33, 41, 42, 43, 44, 45, 46, 47, 55): Switch from 0V to 2.4V with 0.8V corresponding to zero sense
Node Connection to the Inductor. The (–) terminal of the voltage (zero current).
bootstrap capacitor, CB, also connects here. This pin swings FCB (Pin 19): Forced Continuous Input. Tie this pin to
from a diode voltage drop below ground up to VIN. ground to force continuous synchronous operation at low
NC (Pins 9, 21, 24, 25, 28): No Connection. load, to INTVCC to enable discontinuous mode operation at
low load or to a resistive divider from a secondary output
SGND (Pins 10, 14, 15, 20, 26, 27, 54): Signal Ground. All when using a secondary winding.
small-signal components and compensation components
ION (Pin 22): On-Time Current Input. Tie a resistor from VIN
should connect to this ground, which in turn connects to
to this pin to set the one-shot timer current and thereby
PGND at one point.
set the switching frequency.
BOOST (Pin 11): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor, CB, connects here. VFB (Pin 23): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
This pin swings from a diode voltage drop below INTVCC
up to VIN + INTVCC. divider from VOUT.
EXTVCC (Pin 29): External VCC Input. When EXTVCC exceeds
RUN/SS (Pin 12): Run Control and Soft-Start Input. A
4.7V, an internal switch connects this pin to INTVCC and
capacitor to ground at this pin sets the ramp time to full
shuts down the internal regulator so that controller and
output current (approximately 3s/µF) and the time delay
gate drive power is drawn from EXTVCC. Do not exceed
for overcurrent latchoff (see Applications Information).
7V at this pin and ensure that EXTVCC < VIN.
Forcing this pin below 0.8V shuts down the device.
SVIN (Pin 30): Supply Pin for Internal PWM Controller.
VON (Pin 13): On-Time Voltage Input. Voltage trip point for
the on-time comparator. Tying this pin to the output volt- INTVCC (Pins 31, 32): Internal 5V Regulator Output. The
age or an external resistive divider from the output makes driver and control circuits are powered from this voltage.
the on-time proportional to VOUT. The comparator input Decouple this pin to power ground with a minimum of
defaults to 0.7V when the pin is grounded and defaults to 4.7µF low ESR tantalum or ceramic capacitor.
2.4V when the pin is tied to INTVCC. Tie this pin to INTVCC
PGND (Pins 34, 35, 36, 37, 38, 39, 40): Power Ground.
in high VOUT applications to use a lower RON value.
Connect this pin closely to the (–) terminal of CVCC and
PGOOD (Pin 16): Power Good Output. Open-drain logic the (–) terminal of CIN.
output that is pulled to ground when the output voltage
is not within ± 10% of the regulation point.
VRNG (Pin 17): Current Limit Range Input. The voltage at
this pin adjusts maximum valley current and can be set
from 0.7V to 1.2V by a resistive divider from INTVCC. It
defaults to 0.7V if the VRNG pin is tied to ground which
results in a typical 9A current limit.
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LTC3609
Functional Diagram
RON
INTVCC
– +
31, 32
F
BOOST
11
VVON
tON = (10pF) R
IION
S Q FCNT CB
M1
ON
20k DB L1
SW
+ + VOUT
SWITCH 8, 33, 41, 42,
ICMP IREV LOGIC 43, 44, 45,
46, 47, 55
– –
1.4V SHDN +
COUT
OV
M2 CVCC
VRNG
17
PGND
s
(0.5 TO 2) 34, 35, 36, 37,
0.7V 38, 39, 40
16 PGOOD
1 R2
240k
1V
+ 0.54V
Q2 Q4 UV
Q6 –
ITHB
23
VFB
Q3 Q1
+ R1
OV
+ 0.8V – 0.66V
SGND
– 10, 14, 15, 20,
SS RUN 26, 27, 54
– + SHDN
1.2µA
s3.3 EA
NC
+
–
+ –
9, 21, 24, 25, 28
6V
0.6V 0.4V
18 12 3609 FD
ITH RUN/SS
CSS
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LTC3609
Operation
Main Control Loop Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback volt-
The LTC3609 is a high efficiency monolithic synchronous,
age exits a ±10% window around the regulation point.
step-down DC/DC converter utilizing a constant on-time,
Furthermore, in an overvoltage condition, M1 is turned
current mode architecture. It operates from an input
off and M2 is turned on and held on until the overvoltage
voltage range of 4V to 32V/36V maximum and provides
condition clears.
a regulated output voltage at up to 6A of output current.
The internal synchronous power switch increases efficiency Foldback current limiting is provided if the output is
and eliminates the need for an external Schottky diode. In shorted to ground. As VFB drops, the buffered current
normal operation, the top MOSFET is turned on for a fixed threshold voltage ITHB is pulled down by clamp Q3 to
interval determined by a one-shot timer OST. When the a 1V level set by Q4 and Q6. This reduces the inductor
top MOSFET is turned off, the bottom MOSFET is turned valley current level to one sixth of its maximum value as
on until the current comparator ICMP trips, restarting the VFB approaches 0V.
one-shot timer and initiating the next cycle. Inductor current Pulling the RUN/SS pin low forces the controller into its
is determined by sensing the voltage between the PGND shutdown state, turning off both M1 and M2. Releasing
and SW pins using the bottom MOSFET on-resistance. the pin allows an internal 1.2µA current source to charge
The voltage on the ITH pin sets the comparator threshold up an external soft-start capacitor, CSS. When this voltage
corresponding to inductor valley current. The error ampli- reaches 1.5V, the controller turns on and begins switching,
fier, EA, adjusts this voltage by comparing the feedback but with the ITH voltage clamped at approximately 0.6V
signal VFB from the output voltage with an internal 0.6V below the RUN/SS voltage. As CSS continues to charge,
reference. If the load current increases, it causes a drop the soft-start current limit is removed.
in the feedback voltage relative to the reference. The ITH
voltage then rises until the average inductor current again INTVCC/EXTVCC Power
matches the load current.
Power for the top and bottom MOSFET drivers and most of
At light load, the inductor current can drop to zero and the internal controller circuitry is derived from the INTVCC
become negative. This is detected by current reversal pin. The top MOSFET driver is powered from a floating
comparator IREV which then shuts off M2 (see Func- bootstrap capacitor, CB. This capacitor is recharged from
tional Diagram), resulting in discontinuous operation. Both INTVCC through an external Schottky diode, DB, when
switches will remain off with the output capacitor supplying the top MOSFET is turned off. When the EXTVCC pin is
the load current until the ITH voltage rises above the zero grounded, an internal 5V low dropout regulator supplies
current level (0.8V) to initiate another cycle. Discontinu- the INTVCC power from VIN. If EXTVCC rises above 4.7V,
ous mode operation is disabled by comparator F when the internal regulator is turned off, and an internal switch
the FCB pin is brought below 0.6V, forcing continuous connects EXTVCC to INTVCC. This allows a high efficiency
synchronous operation. source connected to EXTVCC, such as an external 5V sup-
The operating frequency is determined implicitly by the ply or a secondary output from the converter, to provide
top MOSFET on-time and the duty cycle required to main- the INTVCC power. Voltages up to 7V can be applied to
tain regulation. The one-shot timer generates an on-time EXTVCC for additional gate drive. If the input voltage is
that is proportional to the ideal duty cycle, thus holding low and INTVCC drops below 3.5V, undervoltage lockout
frequency approximately constant with changes in VIN. circuitry prevents the power switches from turning on.
The nominal frequency can be adjusted with an external
resistor, RON.
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10
LTC3609
Applications Information
The basic LTC3609 application circuit is shown on the Operating Frequency
front page of this data sheet. External component selection The choice of operating frequency is a tradeoff between
is primarily determined by the maximum load current. efficiency and component size. Low frequency operation
The LTC3609 uses the on-resistance of the synchronous improves efficiency by reducing MOSFET switching losses
power MOSFET for determining the inductor current. The but requires larger inductance and/or capacitance in order
desired amount of ripple current and operating frequency to maintain low output ripple voltage.
also determines the inductor value. Finally, CIN is selected
for its ability to handle the large RMS current into the The operating frequency of LTC3609 applications is de-
converter and COUT is chosen with low enough ESR to meet termined implicitly by the one-shot timer that controls the
the output voltage ripple and transient specification. on-time, tON, of the top MOSFET switch. The on-time is
set by the current into the ION pin and the voltage at the
VON and PGOOD VON pin according to:
The LTC3609 has an open-drain PGOOD output that VVON
tON = (10pF )
indicates when the output voltage is within ±10% of the IION
regulation point. The LTC3609 also has a VON pin that
allows the on-time to be adjusted. Tying the VON pin high Tying a resistor RON from VIN to the ION pin yields an
results in lower values for RON which is useful in high VOUT on-time inversely proportional to VIN. The current out of
applications. The VON pin also provides a means to adjust the ION pin is:
the on-time to maintain constant frequency operation in VIN
applications where VOUT changes and to correct minor IION =
RON
frequency shifts with changes in load current.
For a step-down converter, this results in approximately
VRNG Pin and ILIMIT Adjust
constant frequency operation as the input supply varies:
The VRNG pin is used to adjust the maximum inductor
VOUT
valley current, which in turn determines the maximum f= [ HZ ]
average output current that the LTC3609 can deliver. The VVON RON(10pF )
maximum output current is given by:
To hold frequency constant during output voltage changes,
IOUT(MAX) = IVALLEY(MAX) + 1/2 ∆IL tie the VON pin to VOUT or to a resistive divider from VOUT
The IVALLEY(MAX) is shown in the figure “Maximum Valley when VOUT > 2.4V. The VON pin has internal clamps that
Current Limit vs VRNG Voltage” in the Typical Performance limit its input to the one-shot timer. If the pin is tied below
Characteristics. 0.7V, the input to the one-shot is clamped at 0.7V. Similarly,
if the pin is tied above 2.4V, the input is clamped at 2.4V.
An external resistor divider from INTVCC can be used to In high VOUT applications, tying VON to INTVCC so that the
set the voltage on the VRNG pin from 0.7V to 1.2V, or it can comparator input is 2.4V results in a lower value for RON.
be simply tied to ground force a default value equivalent Figures 1a and 1b show how RON relates to switching
to 0.7V. When setting current limit, ensure that the junc- frequency for several common output voltages.
tion temperature does not exceed the maximum rating of
125°C. Do not float the VRNG pin.
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11
LTC3609
Applications Information
Because the voltage at the ION pin is about 0.7V, the cur- load current increases. By lengthening the on-time slightly
rent into this pin is not exactly inversely proportional to as current increases, constant frequency operation can be
VIN, especially in applications with lower input voltages. maintained. This is accomplished with a resistive divider
To correct for this error, an additional resistor RON2 con- from the ITH pin to the VON pin and VOUT. The values
nected from the ION pin to the 5V INTVCC supply will further required will depend on the parasitic resistances in the
stabilize the frequency. specific application. A good starting point is to feed about
25% of the voltage change at the ITH pin to the VON pin
5V as shown in Figure 2a. Place capacitance on the VON pin
RON2 = RON
0.7 V to filter out the ITH variations at the switching frequency.
The resistor load on ITH reduces the DC gain of the error
Changes in the load current magnitude will also cause
amp and degrades load regulation, which can be avoided
frequency shift. Parasitic resistance in the MOSFET
by using the PNP emitter follower of Figure 2b.
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
1000
SWITCHING FREQUENCY (kHz)
VOUT = 3.3V
100
100 1000 10000
RON (kΩ)
3609 F01a
1000
SWITCHING FREQUENCY (kHz)
VOUT = 12V
VOUT = 5V
VOUT = 3.3V
100
100 1000 10000
RON (kΩ)
3609 F01b
3609fb
12
LTC3609
Applications Information
RVON1 2.0
30k
VOUT VON
CVON
CC 1.0
(2a) 0.5
RVON1
3k
VOUT VON
CVON 0
RVON2 0 0.25 0.50 0.75 1.0
10k 10k 0.01µF
LTC3609 DUTY CYCLE (VOUT/VIN)
INTVCC 3609 F03
RC
Q1 ITH
2N5087
CC
Figure 3. Maximum Switching Frequency vs Duty Cycle
3609 F02
13
LTC3609
Applications Information
Once the value for L is known, the type of inductor must capacitors have the highest capacitance density but it is
be selected. High efficiency converters generally cannot important to only use types that have been surge tested
afford the core loss found in low cost powdered iron cores. for use in switching power supplies. Aluminum electrolytic
A variety of inductors designed for high current, low volt- capacitors have significantly higher ESR, but can be used
age applications are available from manufacturers such as in cost-sensitive applications providing that consideration
Sumida, Panasonic, Coiltronics, Coilcraft and Toko. is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteris-
CIN and COUT Selection tics but can have a high voltage coefficient and audible
The input capacitance, CIN, is required to filter the square piezoelectric effects. The high Q of ceramic capacitors with
wave current at the drain of the top MOSFET. Use a low ESR trace inductance can also lead to significant ringing. When
capacitor sized to handle the maximum RMS current. used as input capacitors, care must be taken to ensure
that ringing from inrush currents and switching does not
VOUT VIN pose an overvoltage hazard to the power switches and
IRMS ≅ IOUT(MAX) –1
VIN VOUT controller. To dampen input voltage transients, add a small
5µF to 50µF aluminum electrolytic capacitor with an ESR in
This formula has a maximum at VIN = 2VOUT, where the range of 0.5Ω to 2Ω. High performance through-hole
IRMS = IOUT(MAX)/2. This simple worst-case condition is capacitors may also be used, but an additional ceramic
commonly used for design because even significant de- capacitor in parallel is recommended to reduce the effect
viations do not offer much relief. Note that ripple current of their lead inductance.
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to derate Top MOSFET Driver Supply (CB, DB)
the capacitor. An external bootstrap capacitor, CB, connected to the BOOST
The selection of COUT is primarily determined by the pin supplies the gate drive voltage for the topside MOSFET.
ESR required to minimize voltage ripple and load step This capacitor is charged through diode DB from INTVCC
transients. The output ripple ∆VOUT is approximately when the switch node is low. When the top MOSFET turns
bounded by: on, the switch node rises to VIN and the BOOST pin rises
to approximately VIN + INTVCC. The boost capacitor needs
1
ΔVOUT ≤ ΔIL ESR+ to store about 100 times the gate charge required by the
8fCOUT top MOSFET. In most applications an 0.1µF to 0.47µF, X5R
or X7R dielectric capacitor is adequate.
Since ∆IL increases with input voltage, the output ripple
is highest at maximum input voltage. Typically, once the Discontinuous Mode Operation and FCB Pin
ESR requirement is satisfied, the capacitance is adequate
The FCB pin determines whether the bottom MOSFET
for filtering and has the necessary RMS current rating.
remains on when current reverses in the inductor. Tying
Multiple capacitors placed in parallel may be needed to this pin above its 0.6V threshold enables discontinuous
meet the ESR and RMS current handling requirements. operation where the bottom MOSFET turns off when in-
Dry tantalum, special polymer, aluminum electrolytic and ductor current reverses. The load current at which current
ceramic capacitors are all available in surface mount pack- reverses and discontinuous operation begins depends on
ages. Special polymer capacitors offer very low ESR but the amplitude of the inductor ripple current and will vary
have lower capacitance density than other types. Tantalum
3609fb
14
LTC3609
Applications Information
with changes in VIN. Tying the FCB pin below the 0.6V Fault Conditions: Current Limit and Foldback
threshold forces continuous synchronous operation, al- The LTC3609 has a current mode controller which inher-
lowing current to reverse at light loads and maintaining ently limits the cycle-by-cycle inductor current not only
high frequency operation. in steady-state operation but also in transient. To further
In addition to providing a logic input to force continuous limit current in the event of a short circuit to ground, the
operation, the FCB pin provides a means to maintain a LTC3609 includes foldback current limiting. If the output
flyback winding output when the primary is operating falls by more than 25%, then the maximum sense voltage is
in discontinuous mode. The secondary output VOUT2 is progressively lowered to about one sixth of its full value.
normally set as shown in Figure 4 by the turns ratio N
of the transformer. However, if the controller goes into INTVCC Regulator and EXTVCC Connection
discontinuous mode and halts switching due to a light An internal P-channel low dropout regulator produces the
primary load current, then VOUT2 will droop. An external 5V supply that powers the drivers and internal circuitry
resistor divider from VOUT2 to the FCB pin sets a minimum within the LTC3609. The INTVCC pin can supply up to 50mA
voltage VOUT2(MIN) below which continuous operation is RMS and must be bypassed to ground with a minimum of
forced until VOUT2 has risen above its minimum: 4.7µF tantalum or ceramic capacitor. Good bypassing is
R4 necessary to supply the high transient currents required
VOUT2(MIN) = 0.6V 1+ by the MOSFET gate drivers.
R3
SW
GND
IN4148
VOUT2 40 39 38 37 36 35 34 33 32 31 30 29 28 27
+
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
EXTVCC
NC
SGND
CSEC
1µF
•
41 26
VOUT1 SW SGND
•
T1 42 25
+ 1:N SW NC R4
COUT 43 24
SW NC
44 23
SW VFB
45 22
SW ION
46 21
SW NC
LTC3609
47 20
SW SGND
VIN 48 19 OPTIONAL EXTVCC
PVIN FCB CONNECTION
+ 49 18 5V < VOUT2 < 7V
CIN PVIN ITH
50 17
PVIN VRNG R3
51 16
PVIN PGOOD
52 15
PVIN SGND
RUN/SS
BOOST
SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
VON
SW
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
3609 F04
SGND
SW
3609fb
15
LTC3609
Applications Information
The EXTVCC pin can be used to provide MOSFET gate drive additional 1.3s/µF, during which the load current is folded
and control power from the output or another external back until the output reaches 75% of its final value.
source during normal operation. Whenever the EXTVCC
After the controller has been started and given adequate
pin is above 4.7V the internal 5V regulator is shut off and
time to charge up the output capacitor, CSS is used as a
an internal 50mA P-channel switch connects the EXTVCC short-circuit timer. After the RUN/SS pin charges above 4V,
pin to INTVCC. INTVCC power is supplied from EXTVCC
if the output voltage falls below 75% of its regulated value,
until this pin drops below 4.5V. Do not apply more than
then a short-circuit fault is assumed. A 1.8µA current then
7V to the EXTVCC pin and ensure that EXTVCC ≤ VIN. The
begins discharging CSS. If the fault condition persists until
following list summarizes the possible connections for the RUN/SS pin drops to 3.5V, then the controller turns
EXTVCC: off both power MOSFETs, shutting down the converter
1. EXTVCC grounded. INTVCC is always powered from the permanently. The RUN/SS pin must be actively pulled
internal 5V regulator. down to ground in order to restart operation.
2. EXTVCC connected to an external supply. A high efficiency The overcurrent protection timer requires that the soft‑start
supply compatible with the MOSFET gate drive require- timing capacitor, CSS, be made large enough to guarantee
ments (typically 5V) can improve overall efficiency. that the output is in regulation by the time CSS has reached
the 4V threshold. In general, this will depend upon the
3. EXTVCC connected to an output derived boost network.
The low voltage output can be boosted using a charge size of the output capacitance, output voltage and load
pump or flyback winding to greater than 4.7V. The system current characteristic. A minimum soft-start capacitor
will start-up using the internal linear regulator until the can be estimated from:
boosted output supply is available. CSS > COUT VOUT RSENSE (10 –4 [F/V s])
Generally 0.1µF is more than sufficient.
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the LTC3609 Overcurrent latchoff operation is not always needed or
as well as a timer for soft-start and overcurrent latchoff. desired. Load current is already limited during a short
Pulling the RUN/SS pin below 0.8V puts the LTC3609 into circuit by the current foldback circuitry and latchoff op-
a low quiescent current shutdown (IQ < 30µA). Releasing eration can prove annoying during troubleshooting. The
the pin allows an internal 1.2µA current source to charge feature can be overridden by adding a pull-up current
up the external timing capacitor, CSS. If RUN/SS has been greater than 5µA to the RUN/SS pin. The additional cur-
pulled all the way to ground, there is a delay before start- rent prevents the discharge of CSS during a fault and also
shortens the soft-start period. Using a resistor to VIN as
ing of about:
shown in Figure 5a is simple, but slightly increases shut-
tDELAY =
1.5V
1.2µA
(
CSS = 1.3s/µF CSS ) down current. Connecting a resistor to INTVCC as shown
in Figure 5b eliminates the additional shutdown current,
but requires a diode to isolate CSS. Any pull-up network
When the voltage on RUN/SS reaches 1.5V, the LTC3609 must be able to pull RUN/SS above the 4.2V maximum
begins operating with a clamp on ITH of approximately threshold of the latchoff circuit and overcome the 4µA
0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH maximum discharge current.
is raised until its full 2.4V range is available. This takes an
3609fb
16
LTC3609
Applications Information
INTVCC 3. INTVCC current. This is the sum of the MOSFET driver
RSS*
and control currents. This loss can be reduced by supply-
3.3V OR 5V
VIN
RUN/SS RUN/SS ing INTVCC current through the EXTVCC pin from a high
D2*
RSS* efficiency source, such as an output derived boost network
D1
or alternate supply if available.
2N7002 CSS
CSS
4. CIN loss. The input capacitor has the difficult job of
3609 F05
*OPTIONAL TO OVERRIDE
filtering the large RMS input current to the regulator. It
OVERCURRENT LATCHOFF must have a very low ESR to minimize the AC I2R loss and
(5a) (5b) sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
Figure 5. RUN/SS Pin Interfacing with Latchoff Defeated
Other losses, including COUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
Efficiency Considerations
generally account for less than 2% additional loss.
The percent efficiency of a switching regulator is equal to
When making adjustments to improve efficiency, the input
the output power divided by the input power times 100%.
current is the best indicator of changes in efficiency. If you
It is often useful to analyze individual losses to determine
make a change and the input current decreases, then the
what is limiting the efficiency and which change would
efficiency has increased. If there is no change in input
produce the most improvement. Although all dissipative
current, then there is no change in efficiency.
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3609 circuits: Checking Transient Response
1. DC I2R losses. These arise from the resistance of the The regulator loop response can be checked by looking
internal resistance of the MOSFETs, inductor and PC at the load transient response. Switching regulators take
board traces and cause the efficiency to drop at high several cycles to respond to a step in load current. When
output currents. In continuous mode the average output a load step occurs, VOUT immediately shifts by an amount
current flows through L, but is chopped between the top equal to ∆ILOAD (ESR), where ESR is the effective series
and bottom MOSFETs. The DC I2R loss for one MOSFET resistance of COUT. ∆ILOAD also begins to charge or dis-
can simply be determined by [RDS(ON) + RL] • IO. charge COUT generating a feedback error signal used by the
2. Transition loss. This loss arises from the brief amount regulator to return VOUT to its steady-state value. During
of time the top MOSFET spends in the saturated region this recovery time, VOUT can be monitored for overshoot
during switch node transitions. It depends upon the or ringing that would indicate a stability problem. The ITH
input voltage, load current, driver strength and MOSFET pin external components shown in Figure 6 will provide
capacitance, among other factors. The loss is significant adequate compensation for most applications. For a
at input voltages above 20V and can be estimated from: detailed explanation of switching control loop theory see
Application Note 76.
Transition Loss ≅ (1.7A–1) VIN2 IOUT CRSS f
3609fb
17
LTC3609
Applications Information
Design Example Next, set up VRNG voltage and check the ILIMIT. Tying VRNG
to GND will set the typical current limit to 9A, and tying
As a design example, take a supply with the following
VRNG to 1.2V will result in a typical current around 14A.
specifications: VIN = 5V to 32V (12V nominal), VOUT =
2.5V ± 5%, IOUT(MAX) = 6A, f = 550kHz. First, calculate the CIN is chosen for an RMS current rating of about 5A at
timing resistor with VON = VOUT: 85°C. The ceramic output capacitors are chosen for an
ESR of 0.002Ω to minimize output voltage changes due
2.5V
RON = = 187k to inductor ripple current and load steps. The ripple volt-
( 2.4V )( 550kHz )(10pF ) age is:
and choose the inductor for about 40% ripple current at ∆VOUT(RIPPLE) = ∆IL(MAX) (ESR)
the maximum VIN: = (2.4A) (0.002Ω) = 4.8mV
2.5V 2.5V and a 0A to 6A load step will only cause an output
L= 1− =1.8µH
(550kHz ) (0.4) (6A ) 32V change of:
Selecting a standard value of 1.5µH results in a maximum ∆VOUT(STEP) = ∆ILOAD (ESR) = (6A) (0.002Ω) = 12mV
ripple current of: An optional 22µF ceramic output capacitor is included
2.5V 2.5V to minimize the effect of ESL in the output ripple. The
ΔIL = 1– = 2.4A complete circuit is shown in Figure 6.
( 550kHz ) (1.5µH) 12V
INTVCC
VIN EXTVCC
CF RF1 C4
CVCC 0.1µF 1Ω 0.01µF
4.7µF 50V
6.3V
SW
GND
40 39 38 37 36 35 34 33 32 31 30 29 28 27
R2
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
EXTVCC
NC
SGND
30.1k
VOUT 41 26 1%
2.5V AT SW SGND VOUT
6A L1 42 25
COUT1 + 1.2µH SW NC R1
100µF 43 24 9.53k
SW NC 1% RON
x2
44 23 187k
GND SW VFB INTVCC
45 22 1%
SW ION VIN
46 21
SW NC
LTC3609 JP1
47 20
SW SGND CC1
VIN VIN 48 19 R5 1000pF
PVIN FCB
5V TO 32V CIN 15.8k
49 18
4.7µF PVIN ITH
50V 50 17
PVIN VRNG
x2 51 16
PVIN PGOOD
52 15
PVIN SGND CC2
RPG1
RUN/SS
BOOST
100pF
SGND
SGND
100k
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
VON
SW
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
PGOOD INTVCC
SGND
2Ω
SW
3609 F06
CIN: MURATA GRM32ER71H475K INTVCC VOUT
COUT: MURATA GRM435R60J107M CB1 CVON
DB 0.22µF
LI: CDEP851R2MC-50 0.1µF
CMDSH-3
KEEP POWER GROUND AND SIGNAL SW CSS
GROUND SEPARATE. CONNECT AT 0.1µF
ONE POINT.
18
LTC3609
Applications Information
How to Reduce SW Ringing • Use a compact plane for the switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
As with any switching regulator, there will be voltage ring-
ing on the SW node, especially for high input voltages. • Use planes for VIN and VOUT to maintain good voltage
The ringing amplitude and duration is dependent on the filtering and to keep power losses low.
switching speed (gate drive), layout (parasitic inductance) • Flood all unused areas on all layers with copper. Flood-
and MOSFET output capacitance. This ringing contributes ing with copper reduces the temperature rise of power
to the overall EMI, noise and high frequency ripple. One components. Connect these copper areas to any DC
way to reduce ringing is to optimize layout. A good layout net (VIN, VOUT, GND or to any other DC rail in your
minimizes parasitic inductance. Adding RC snubbers from system).
SW to GND is also an effective way to reduce ringing. Finally,
adding a resistor in series with the BOOST pin will slow When laying out a printed circuit board without a ground
down the MOSFET turn-on slew rate to dampen ringing, plane, use the following checklist to ensure proper opera-
but at the cost of reduced efficiency. Note that since the tion of the controller. These items are also illustrated in
IC is buffered from the high frequency transients by PCB Figure 7.
and bondwire inductances, the ringing by itself is normally • Segregate the signal and power grounds. All small-
not a concern for controller reliability. signal components should return to the SGND pin at
one point, which is then tied to the PGND pin.
PC Board Layout Checklist
• Connect the input capacitor(s), CIN, close to the IC.
When laying out a PC board follow one of the two sug-
This capacitor carries the MOSFET AC current.
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents, a • Keep the high dV/dT SW, BOOST and TG nodes away
multilayer board is recommended to help with heat sinking from sensitive small-signal nodes.
of power components. • Connect the INTVCC decoupling capacitor, CVCC, closely
• The ground plane layer should not have any traces and to the INTVCC and PGND pins.
it should be as close as possible to the layer with the • Connect the top driver boost capacitor, CB, closely to
LTC3609. the BOOST and SW pins.
• Place CIN and COUT all in one compact area, close to • Connect the VIN pin decoupling capacitor, CF , closely
the LTC3609. It may help to have some components to the VIN and PGND pins.
on the bottom side of the board.
• Keep small-signal components close to the LTC3609.
• Ground connections (including LTC3609 SGND and
PGND) should be made through immediate vias to
the ground plane. Use several larger vias for power
components.
3609fb
19
LTC3609
Applications Information
CVCC SW
40 39 38 37 36 35 34 33 32 31 30 29 28 27
COUT
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
EXTVCC
NC
SGND
41 26
SW SGND
VOUT 42 25
SW NC
43 24 R1
SW NC
44 23 R2
SW VFB RON
45 22
SW ION
46 21
SW NC
LTC3609
47 20
SW SGND
48 19 CC1
PVIN FCB RC
CIN 49 18
PVIN ITH
50 17
PVIN VRNG
51 16
PVIN PGOOD
52 15
PVIN SGND
CC2
RUN/SS
BOOST
SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
VON
SW
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
DB
CB CSS
RF
KEEP POWER GROUND AND SIGNAL 3609 F07
3609fb
20
LTC3609
Typical Applications
3.6V Input to 1.5V/6A at 750kHz
INTVCC
VBIAS EXTVCC
CF 5V C4
CVCC 0.1µF 0.01µF
4.7µF 50V
6.3V
SW
GND
R2
40 39 38 37 36 35 34 33 32 31 30 29 28 27 60.4k
1%
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
EXTVCC
NC
SGND
VOUT
VOUT R1
41 26 40.2k
1.5V AT SW SGND
6A L1 42 25 1%
COUT1 0.5µH SW NC
100µF 43 24
SW NC RON
x2 44 23 113k
GND SW VFB INTVCC
45 22 1%
SW ION VIN
46 21
SW NC
LTC3609 JP1
47 20
SW SGND CC1
VIN VIN 48 19 R5
PVIN FCB 1500pF
3.6V 8.45k
CIN 49 18
4.7µF PVIN ITH
50 17
50V PVIN VRNG
x2 51 16
PVIN PGOOD
52 15
PVIN SGND CC2
RPG1
RUN/SS
BOOST
100pF
SGND
SGND
100k
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
VON
SW
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
PGOOD INTVCC
SGND
2Ω
SW
CIN: MURATA GRM32ER71H475K INTVCC VOUT 3609 TA02
80
75
VOUT
200mV/DIV 70
65
3609 TA02b 60
20µs/DIV
55 VIN = 3.6V
LOAD STEP 1A TO 5A
FREQUENCY = 750kHz
VIN = 3.6V 50
VOUT = 1.5V 0.01 0.1 1 10
FCB = 0V LOAD CURRENT (A)
3609 TA02c
3609fb
21
LTC3609
Typical Applications
5V to 32V Input to 1.2V/6A at 550kHz
INTVCC
VIN EXTVCC
CF RF1 C4
CVCC 0.1µF 1Ω 0.01µF
4.7µF 25V
6.3V
SW
GND
40 39 38 37 36 35 34 33 32 31 30 29 28 27
R2
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
EXTVCC
NC
SGND
60.4k
VOUT 41 26 1%
1.2V AT SW SGND VOUT
6A L1 42 25 R1
COUT1 SW NC
0.8µH 60.4k
100µF 43 24
x2 SW NC 1% RON
44 23 182k
GND SW VFB INTVCC
45 22 1%
SW ION VIN
46 21
SW NC
LTC3609 JP1
47 20
SW SGND CC1
VIN VIN 48 19 R5
PVIN FCB 1500pF
5V TO 32V CIN 8.45k
49 18
4.7µF PVIN ITH
50V 50 17
PVIN VRNG
x2 51 16 R3
PVIN PGOOD
0Ω
52 15
PVIN SGND CC2
RPG1
RUN/SS
BOOST
100pF
SGND
SGND
100k
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
VON
SW
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
PGOOD INTVCC
SGND
2Ω
SW
C5: TAIYO YUDEN JMK316BJ226ML-T INTVCC VOUT 3609 TA03
75
70
VOUT
200mV/DIV 65
60
3609 TA02b
20µs/DIV
55
LOAD STEP 1A TO 6A
VIN = 12V 50
VOUT = 1.2V 0.01 0.1 1 10
FCB = 0V LOAD CURRENT (A)
3609 TA02c
3609fb
22
LTC3609
Typical Applications
5V to 32V Input to 1.8V/6A All Ceramic 1MHz
INTVCC
VIN EXTVCC
CF RF1 C4
CVCC 0.1µF 1Ω 0.01µF
4.7µF 50V
6.3V
SW
GND
40 39 38 37 36 35 34 33 32 31 30 29 28 27
R2
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
EXTVCC
NC
SGND
20k
VOUT 41 26 1%
1.8V AT SW SGND VOUT
6A L1 42 25 R1
COUT1 SW NC
0.47µH 10k
100µF 43 24
x2 SW NC 1% RON
44 23 102k
GND SW VFB INTVCC
45 22 1%
SW ION VIN
46 21
SW NC
LTC3609 JP1
47 20
SW SGND CC1
VIN VIN 48 19 R5
PVIN FCB 1500pF
5V TO 32V CIN 5.76k
49 18
4.7µF PVIN ITH
x2 50 17
PVIN VRNG
51 16
PVIN PGOOD
52 15
PVIN SGND CC2
RPG1
RUN/SS
BOOST
100pF
SGND
SGND
100k
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
VON
SW
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
PGOOD INTVCC
SGND
2Ω
SW
C5: TAIYO YUDEN JMK316BJ226ML-T INTVCC VOUT 3609 TA04
60
50
VOUT
200mV/DIV 40
30
3609 TA04b 20
20µs/DIV
LOAD STEP 500mA TO 4A 10
VIN = 12V 0
VOUT = 1.8V 10 100 1000 10000
FCB = 0V LOAD CURRENT (mA)
3609 TA04c
3609fb
23
LTC3609
Package Description
WKG Package
52-Lead QFN Multipad (7mm × 8mm)
(Reference LTC DWG # 05-08-1768 Rev Ø)
SEATING PLANE
bbb M C A B
8.00
BSC 33 8
1.00 REF
32 9
10
NX b
4.275 ± 0.10 2.25 ± 0.10
aaa C 2x
27 14
0.580 ± 0.10 0.40 ± 0.10
26 19 15
aaa C 2x TOP VIEW 0.90 ± 0.10 1.35 1.775 0.25 ± 0.05
NX
9 ± 0.10 REF
// ccc C 0.08 C
BOTTOM VIEW
8 (BOTTOM METALLIZATION DETAILS) MLP52 QFN REV Ø 0807
7.50 ± 0.05
2.90 REF 2.625 REF
0.50 BSC
NOTE:
1. DIMENSIONING AND TOLERANCING CONFORM TO ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES (°)
PIN 1 3. N IS THE TOTAL NUMBER OF TERMINALS
4 THE LOCATION OF THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING
CONVENTION CONFORMS TO JEDEC PUBLICATION 95 SPP-002
3.20 ± 0.10 2.025 3.40 REF
3.40 REF ± 0.10 5. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY
2.925 ± 0.10
3.90 ± 0.10 6. NJR REFER TO NON JEDEC REGISTERED
7 DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED
BETWEEN 0.20mm AND 0.30mm FROM THE TERMINAL TIP. IF THE TERMINAL
HAS THE OPTIONAL RADIUS ON THE OTHER END OF THE TERMINAL, THE
1.00 REF DIMENSION b SHOULD NOT BE MEASURED IN THAT RADIUS AREA.
8.50 ± 0.05 8 COPLANARITY APPLIES TO THE TERMINALS AND ALL OTHER SURFACE
METALLIZATION
2.25 ± 0.10 4.275 ± 0.10 9 DRAWING SHOWN ARE FOR ILLUSTRATION ONLY
SYMBOL TOLERANCE
PACKAGE
aaa 0.15
OUTLINE
0.40 ± 0.10 bbb 0.10
ccc 0.10
0.25 ± 0.05 1.775 1.35
REF ± 0.10
RECOMMENDED SOLDER PAD LAYOUT
TOP VIEW
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24
LTC3609
Revision History (Revision history begins at Rev B)
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25
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3609
Typical Application
INTVCC
VIN EXTVCC
CF RF1 C4
CVCC 0.1µF 1Ω 0.01µF
4.7µF 50V
6.3V
SW
GND
40 39 38 37 36 35 34 33 32 31 30 29 28 27
R2
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
EXTVCC
NC
SGND
60.4k
VOUT 41 26 1%
12V AT SW SGND VOUT
4A L1 42 25
COUT1 + 4.3µH SW NC R1
180µF 43 24 3.16k
16V SW NC 1% RON
44 23 1M
GND SW VFB INTVCC
45 22 1%
SW ION VIN
46 21
SW NC
LTC3609 JP1
47 20
SW SGND CC1
VIN VIN 48 19 R5
PVIN FCB 1000pF
14V TO 32V CIN 24.3k
49 18
4.7µF PVIN ITH
x2 50 17
PVIN VRNG
51 16
PVIN PGOOD
52 15
PVIN SGND CC2
RPG1
RUN/SS
BOOST
100pF
SGND
SGND
100k
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
VON
SW
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
PGOOD INTVCC
SGND
2Ω
SW
CIN: MURATA GRM31CR71H475K INTVCC INTVCC 3609 TA05
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