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41 results for source starred repositories written in Verilog
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opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog 2,425 318 Updated Jul 16, 2025

A small, light weight, RISC CPU soft core

Verilog 1,475 174 Updated Aug 9, 2025

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our d…

Verilog 1,250 27 Updated Nov 5, 2025

32-bit Superscalar RISC-V CPU

Verilog 1,119 195 Updated Sep 18, 2021

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

Verilog 1,028 197 Updated Oct 22, 2023

An FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器,用于驱动BLDC/PMSM电机。

Verilog 793 229 Updated Sep 15, 2023

A tiny Open POWER ISA softcore written in VHDL 2008

Verilog 699 108 Updated Oct 9, 2025

synthesiseable ieee 754 floating point library in verilog

Verilog 686 158 Updated Mar 13, 2023

Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks

Verilog 619 103 Updated Jan 3, 2020

An open source library for image processing on FPGA.

Verilog 611 224 Updated Jun 16, 2015

Bus bridges and other odds and ends

Verilog 602 113 Updated Apr 14, 2025

An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

Verilog 322 96 Updated Sep 15, 2023

Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation

Verilog 286 46 Updated Feb 11, 2024

Docs, design, firmware, and software for the Haasoscope

Verilog 149 45 Updated May 24, 2024

Imitate SDcard using FPGAs. 使用FPGA模拟伪装SD卡。

Verilog 129 26 Updated Sep 14, 2023

A single-wire bi-directional chip-to-chip interface for FPGAs

Verilog 123 16 Updated Jul 7, 2016
Verilog 108 28 Updated Sep 2, 2023

Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker

Verilog 101 13 Updated Feb 17, 2023

Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples => https://www.chili-chips.xyz/open-cologne | Also see https:/…

Verilog 79 7 Updated Oct 16, 2025

A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs

Verilog 63 14 Updated Jan 8, 2019

MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX with Hard MIPI PHY. Gbps UVC Video Stream Over USB 3.0 with C…

Verilog 58 29 Updated Feb 13, 2025

Small SERV-based SoC primarily for OpenMPW tapeout

Verilog 48 12 Updated Jun 4, 2025

This repository contains software for BeagleWire. It is a realization of my project for GSOC-2017

Verilog 46 16 Updated Oct 10, 2018

This repo is for Efinix Xyloni development board users. It has projects and software to get you started working with the board.

Verilog 45 8 Updated Jan 16, 2023
Verilog 42 3 Updated May 8, 2020

Open-source CSI-2 receiver for Xilinx UltraScale parts

Verilog 37 15 Updated Jul 10, 2019

Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces

Verilog 35 6 Updated Nov 29, 2024

Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"

Verilog 30 16 Updated Dec 10, 2021

Test code to talk from STM32 MCU over FSMC to SDRAM on ICE40 FPGA

Verilog 29 10 Updated Dec 19, 2016

Example designs for the Spartan7 "S7 Mini" FPGA board

Verilog 29 11 Updated May 26, 2019
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