Practice project to learn basics of backend.

学術論文・教育用原稿のLaTeXリポジトリ。 LaTeX repository for academic papers and educational manuscripts.

A 4-bit binary counter built in Logisim that drives two seven-segment displays. The circuit counts from 55 to 70 using an enable bit and three counting bits. The design process involved creating truth tables, optimizing logic with Karnaugh maps, and implementing the final circuit with logic gates.

Collected article documents in PDF

Push Swap is a C program that sorts integers using two stacks and a limited set of operations (push, swap, rotate). Designed to minimize the number of moves, it demonstrates expertise in algorithm optimization, data structure manipulation, recursion, and efficient memory management, showcasing advanced problem-solving skills.

Automated conversion from CHP to PRS

This repository contains Solutions to 50 assignments from the Logic Building batch at Marvellous Infosystems(Pune). Each assignment includes 5 problems covering topics such as Numbers, Digits, Arrays, Strings, Bits, Pattern Printing, File handling, and Data structures. These problems helped me develop strong problem-solving skills.

Learning digital logic design and design verification using SystemVerilog.

Using combinational and sequential logic in building a reliable digital system that detects specific binary messages and responds with the correct action based on the message. This project emphasizes the use of finite state machines, logic gates, flip-flops, and output interface control to build a fully functional sequence detection system.

A high school project simulating a Telegram shopping bot designed with a Mealy machine. It automates user interactions in a shopping scenario, such as browsing items, adding to cart, and confirming purchases, via a state-based model.

AITLの中核理論（推論・制御・物理的制約付きAI）をまとめたリポジトリ。 Core theoretical foundations of AITL: reasoning, control, and physics-informed AI.

Repositorio del trabajo practico de la asignatura de Diseño Logico de la UNTREF, 2024C2

A collection of projects done across various domains throughout four years of UG (ECE)

4221-to-Seven-Segment Decoder for Logic Design course — A combinational circuit converting custom 4-bit binary inputs into signals to drive a common-cathode 7-segment display, using basic logic gates (NOT, AND, OR).

DIGITAL LOGIC DESIGN

The program in GUI that show and minimize with Karnaugh-Map in Python & C++

MemeVerse-App

A Verilog-based implementation of a 2-bit Ripple Carry Adder with a comprehensive testbench for functional verification, ideal for beginners exploring digital design and HDL concepts. 🚀

Quine-McCluskey Minimization Technique (Tabular-Method) Digital Logic Design