verilator / verilator
Verilator open-source SystemVerilog simulator and lint system
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Verilator open-source SystemVerilog simulator and lint system
OpenTitan: Open source silicon root of trust
Simple single-port AXI memory interface
[UNRELEASED] FP div/sqrt unit for transprecision
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
RISC-V Debug Support for our PULP RISC-V Cores
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.