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ICCAD 2016: Austin, Texas, USA
- Frank Liu:
Proceedings of the 35th International Conference on Computer-Aided Design, ICCAD 2016, Austin, TX, USA, November 7-10, 2016. ACM 2016, ISBN 978-1-4503-4466-1 - Kent W. Nixon, Xiang Chen, Yiran Chen:
Scope - quality retaining display rendering workload scaling based on user-smartphone distance. 1 - Shuangchen Li, Liu Liu
, Peng Gu, Cong Xu, Yuan Xie:
NVSim-CAM: a circuit-level simulator for emerging nonvolatile memory based content-addressable memory. 2 - Andrea Peano, Luca Ramini, Marco Gavanelli
Design technology for fault-free and maximally-parallel wavelength-routed optical networks-on-chip. 3 - Ana Petkovska, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli, Robert K. Brayton, Paolo Ienne:
Fast generation of lexicographic satisfiable assignments: enabling canonicity in SAT-based applications. 4 - Nian-Ze Lee
Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits. 5 - Monther Abusultan, Sunil P. Khatri:
A flash-based digital circuit design flow. 6 - Yibo Lin
MrDP: multiple-row detailed placement of heterogeneous-sized cells for advanced nodes. 7 - Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin:
OWARU: free space-aware timing-driven incremental placement. 8 - Shounak Dhar, Saurabh N. Adya, Love Singhal, Mahesh A. Iyer
Detailed placement for modern FPGAs using 2D dynamic programming. 9 - Swaroop Ghosh, Mohammad Nasim Imtiaz Khan, Asmit De, Jae-Won Jang:
Security and privacy threats to on-chip non-volatile memories and countermeasures. 10 - Davood Shahrjerdi, Bayan Nasri
Security engineering of nanostructures and nanomaterials. 11 - Chen Zhang
Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks. 12:1-12:8 - Ying Wang, Huawei Li, Xiaowei Li
Re-architecting the on-chip memory sub-system of machine-learning accelerator for embedded devices. 13 - Sicheng Li, Yandan Wang, Wujie Wen, Yu Wang, Yiran Chen, Hai Li
A data locality-aware design framework for reconfigurable sparse matrix-vector multiplication kernel. 14 - Pai-Yu Chen, Jae-sun Seo, Yu Cao
Compact oscillation neuron exploiting metal-insulator-transition for neuromorphic computing. 15 - Quan Chen, Wim Schoenmaker:
A new tightly-coupled transient electro-thermal simulation method for power electronics. 16 - Kim Batselier
A tensor-based volterra series black-box nonlinear system identification and simulation framework. 17 - Handi Yu, Jun Tao, Changhai Liao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Efficient statistical analysis for correlated rare failure events via asymptotic probability approximation. 18 - Seyed Nematollah Ahmadyan, Shobha Vasudevan:
Duplex: simultaneous parameter-performance exploration for optimizing analog circuits. 19 - Andrew B. Kahng, Jiajia Li, Lutong Wang
Improved flop tray-based design implementation for power reduction. 20 - Rudolf Scheifele:
RC-aware global routing. 21 - Sam Bayless, Holger H. Hoos, Alan J. Hu:
Scalable, high-quality, SAT-based multi-layer escape routing. 22 - Bo-Qiao Lin, Ting-Chou Lin, Yao-Wen Chang:
Redistribution layer routing for integrated fan-out wafer-level chip-scale packages. 23 - Juan Antonio Carballo, Bangqi Xu:
The architecture value engine: measuring and delivering sustainable SoC improvement. 24 - José Pineda de Gyvez, Hamed Fatemi, Maarten Vertregt:
Circuit valorization in the IC design ecosystem. 25 - Mustafa Badaroglu, Jeff Xu:
Interconnect-aware device targeting from PPA perspective. 26 - Andrew B. Kahng, Hyein Lee, Jiajia Li:
Measuring progress and value of IC implementation technology. 27 - Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin
Provably secure camouflaging strategy for IC protection. 28 - Muhammad Yasin
CamoPerturb: secure IC camouflaging for minterm protection. 29 - Bicky Shakya, Navid Asadizanjani, Domenic Forte
Chip editor: leveraging circuit edit for logic obfuscation and trusted fabrication. 30 - Thaddeus Koehn, Peter M. Athanas:
Arbitrary streaming permutations with minimum memory and latency. 31 - Shouyi Yin, Zhicong Xie, Chenyue Meng, Leibo Liu
Multibank memory optimization for parallel data access in multiple data arrays. 32 - Dongyoun Yi, Taewhan Kim:
Allocation of multi-bit flip-flops in logic synthesis for power optimization. 33 - Wanli Chang, Debayan Roy, Licong Zhang, Samarjit Chakraborty
Model-based design of resource-efficient automotive control software. 34 - Ghizlane Tibba, Christoph Malz, Christoph Stoermer, Natarajan Nagarajan, Licong Zhang, Samarjit Chakraborty
Testing automotive embedded systems under X-in-the-loop setups. 35 - Weijing Shi, Mohamed Baker Alawieh
Efficient statistical validation of machine learning systems for autonomous driving. 36 - Bowen Zheng, Chung-Wei Lin, Huafeng Yu, Hengyi Liang, Qi Zhu
CONVINCE: a cross-layer modeling, exploration and validation framework for next-generation connected vehicles. 37 - Shih-Hsu Huang, Rung-Bin Lin, Myung-Chul Kim, Shigetoshi Nakatake:
Overview of the 2016 CAD contest at ICCAD. 38 - Tangent Wei, Luke Lin:
ICCAD-2016 CAD contest in large-scale identical fault search. 39 - Chi-An (Rocky) Wu, Chih-Jen (Jacky) Hsu, Kei-Yong Khoo:
ICCAD-2016 CAD contest in non-exact projective NPNP boolean matching and benchmark suite. 40 - Rasit Onur Topaloglu
ICCAD-2016 CAD contest in pattern classification for integrated circuit design space analysis and benchmark suite. 41 - Jinwook Jung, Iris Hui-Ru Jiang, Gi-Joon Nam, Victor N. Kravets, Laleh Behjat
OpenDesign flow database: the infrastructure for VLSI design and design automation research. 42 - Christian Krieg, Clifford Wolf, Axel Jantsch
Malicious LUT: a stealthy FPGA trojan injected and triggered by the design flow. 43 - Dylan Ismari, Jim Plusquellic, Charles Lamech, Swarup Bhunia
On detecting delay anomalies introduced by hardware trojans. 44 - Yuntao Liu
An optimization-theoretic approach for attacking physical unclonable functions. 45 - Jin Miao, Meng Li, Subhendu Roy, Bei Yu:
LRR-DPUF: learning resilient and reliable digital physical unclonable function. 46 - Hang Zhang
Enabling online learning in lithography hotspot detection with information-theoretic feature optimization. 47 - Jian Kuang, Evangeline F. Y. Young, Bei Yu:
Incorporating cut redistribution with mask assignment to enable 1D gridded design. 48 - Yu-Hsuan Su, Yao-Wen Chang:
VCR: simultaneous via-template and cut-template-aware routing for directed self-assembly technology. 49 - Yu-Hsuan Su, Yao-Wen Chang:
DSA-compliant routing for two-dimensional patterns using block copolymer lithography. 50 - Pradeep Kumar Nalla, Raj Kumar Gajavelly
The art of semi-formal bug hunting. 51 - Vladimir Herdt, Hoang M. Le, Daniel Große
Compiled symbolic simulation for systemC. 52 - Heinz Riener
Exact diagnosis using boolean satisfiability. 53 - Ghaith Bany Hamad, Ghaith Kazma, Otmane Aït Mohamed, Yvon Savaria:
Efficient and accurate analysis of single event transients propagation using SMT-based techniques. 54 - Sukeshwar Kannan, Mehdi Sadi, Luke England:
Power delivery in 3D packages: current crowding effects, dynamic IR drop and compensation network using sensors (invited paper). 55 - Dylan C. Stow, Itir Akgun
Cost analysis and cost-driven IP reuse methodology for SoC design based on 2.5D/3D integration. 56 - Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
Energy-efficient and reliable 3D network-on-chip (NoC): architectures and optimization algorithms. 57 - Ran Wang, Sergej Deutsch, Mukesh Agrawal, Krishnendu Chakrabarty
The hype, myths, and realities of testing 3D integrated circuits. 58 - Leonidas Kosmidis
TASA: toolchain-agnostic static software randomisation for critical real-time systems. 59 - Youngbin Kim
Splitting functions in code management on scratchpad memories. 60 - Ujjwal Gupta, Joseph Campbell, Ümit Y. Ogras
Adaptive performance prediction for integrated GPUs. 61 - Teng Xu, Miodrag Potkonjak:
Energy-efficient fault tolerance approach for internet of things applications. 62 - Yutaka Masuda, Masanori Hashimoto
Critical path isolation for time-to-failure extension and lower voltage operation. 63 - Chaofan Li, Sachin S. Sapatnekar
Control synthesis and delay sensor deployment for efficient ASV designs. 64 - PariVallal Kannan, Satish Sivaswamy:
Performance driven routing for modern FPGAs. 65 - Wuxi Li, Shounak Dhar, David Z. Pan:
UTPlaceF: a routability-driven FPGA placer with physical and congestion aware packing. 66 - Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Peishan Tu, Hang Zhang
RippleFPGA: a routability-driven placement for large-scale heterogeneous FPGAs. 67 - Ryan Pattison, Ziad Abuowaimer, Shawki Areibi, Gary Gréwal, Anthony Vannelli:
GPlace: a congestion-aware placement tool for ultrascale FPGAs. 68 - Liangzhen Lai, Vikas Chandra, Rob Aitken:
Resiliency in dynamically power managed designs. 69 - Taeyoung Kim
Dynamic reliability management for near-threshold dark silicon processors. 70 - Mohammad Saber Golanbari, Anteneh Gebregiorgis, Fabian Oboril, Saman Kiamehr, Mehdi Baradaran Tahoori:
A cross-layer approach for resiliency and energy efficiency in near threshold computing. 71 - Sangyoung Park
Design space exploration of drone infrastructure for large-scale delivery services. 72 - Ganapati Bhat, Ujjwal Gupta, Nicholas Tran, Jaehyun Park
Multi-objective design optimization for flexible hybrid electronics. 73 - Sujit Rokka Chhetri, Arquimedes Canedo, Mohammad Abdullah Al Faruque
KCAD: kinetic cyber-attack detection method for cyber-physical additive manufacturing systems. 74 - Seyed Ali Rokni, Hassan Ghasemzadeh:
Autonomous sensor-context learning in dynamic human-centered internet-of-things environments. 75 - Xinhai Zhang, Lei Feng
Formulating customized specifications for resource allocation problem of distributed embedded systems. 76 - Giuseppe Natale, Giulio Stramondo, Pietro Bressana, Riccardo Cattaneo, Donatella Sciuto, Marco D. Santambrogio:
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops. 77 - Deepak Kadetotad, Sairam Arunachalam, Chaitali Chakrabarti, Jae-sun Seo:
Efficient memory compression in deep neural networks using coarse-grain sparsification for speech applications. 78 - Warren Kemmerer, Wei Zuo, Deming Chen:
Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design. 79 - Semeen Rehman, Walaa El-Harouni, Muhammad Shafique
Architectural-space exploration of approximate multipliers. 80 - Vojtech Mrazek
Design of power-efficient approximate multipliers for approximate artificial neural networks. 81 - Amrut Kapare, Hari Cherupalli, John Sartori:
Automated error prediction for approximate sequential circuits. 82 - Arun Chandrasekharan, Mathias Soeken, Daniel Große
Approximation-aware rewriting of AIGs for error tolerant applications. 83 - Joakim Urdahl, Shrinidhi Udupi, Tobias Ludwig, Dominik Stoffel, Wolfgang Kunz:
Properties first? a new design methodology for hardware, and its perspectives in safety analysis. 84 - Alessandro Bernardini, Wolfgang Ecker, Ulf Schlichtmann
Where formal verification can help in functional safety analysis. 85 - Sebastian Steinhorst
Formal approaches to design of active cell balancing architectures in battery management systems. 86 - Bon Woong Ku, Peter Debacker, Dragomir Milojevic
How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? 87 - Yudong Tao
A novel unified dummy fill insertion framework with SQP-based optimization method. 88 - Lorenzo Ciampolini, Jean-Christophe Lafont, Faress Tissafi Drissi, Jean-Paul Morin, David Turgis, Xavier Jonsson, Cyril Desclèves, Joseph Nguyen:
Efficient yield estimation through generalized importance sampling with application to NBL-assisted SRAM bitcells. 89 - Jonathon Magaña, Daohang Shi, Azadeh Davoodi:
Are proximity attacks a threat to the security of split manufacturing of integrated circuits? 90 - Ping-Lin Yang, Malgorzata Marek-Sadowska:
Making split-fabrication more secure. 91 - Ali Ahmadi, Mohammad-Mahdi Bidmeshki, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
A machine learning approach to fab-of-origin attestation. 92 - Matthew R. Guthaus
OpenRAM: an open-source memory compiler. 93 - Jangseop Shin, Hongce Zhang
A hardware-based technique for efficient implicit information flow tracking. 94 - Wei Hu
Imprecise security: quality and complexity tradeoffs for hardware information flow tracking. 95 - Giovanni Agosta
Encasing block ciphers to foil key recovery attempts via side channel. 96 - Chaofei Yang, Beiye Liu, Hai Li
Security of neuromorphic computing: thwarting learning attacks using memristor's obsolescence effect. 97 - Debjit Sinha, Vladimir Zolotov, Jin Hu, Sheshashayee K. Raghunathan, Adil Bhanji, Christine M. Casey:
Generation and use of statistical timing macro-models considering slew and load variability. 98 - Lengfei Han, Zhuo Feng:
TinySPICE plus: scaling up statistical SPICE simulations on GPU leveraging shared-memory based sparse matrix solution techniques. 99 - Grace Li Zhang
PieceTimer: a holistic timing analysis framework considering setup/hold time interdependency using a piecewise model. 100 - Abdul-Amir Yassine, Farid N. Najm:
A fast layer elimination approach for power grid reduction. 101 - Devon Jenson, Marc D. Riedel
A deterministic approach to stochastic computation. 102 - Qin Wang, Zeyan Li, Haena Cheong, Oh-Sun Kwon, Hailong Yao, Tsung-Yi Ho
Control-fluidic CoDesign for paper-based digital microfluidic biochips. 103 - Sean C. Smithson, Guang Yang, Warren J. Gross, Brett H. Meyer:
Neural networks designing neural networks: multi-objective hyper-parameter optimization. 104 - Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty
Error recovery in a micro-electrode-dot-array digital microfluidic biochip? 105 - Jie Wu, Jinglan Liu, Xiaobo Sharon Hu
Privacy protection via appliance scheduling in smart homes. 106 - Chi-Sheng Shih, Pi-Cheng Hsiu
Framework designs to enhance reliable and timely services of disaster management systems. 107 - Xiaodao Chen, Yuchen Zhou, Hong Zhou, Chaowei Wan, Qi Zhu
Analysis of production data manipulation attacks in petroleum cyber-physical systems. 108 - Chaofei Yang, Chunpeng Wu, Hai Li
Security challenges in smart surveillance systems and the solutions based on emerging nano-devices. 109 - Sandeep Chatterjee, Valeriy Sukharev
Fast physics-based electromigration checking for on-die power grids. 110 - Ermao Cai, Dimitrios Stamoulis, Diana Marculescu
Exploring aging deceleration in FinFET-based multi-core systems. 111 - Zhong Guan, Malgorzata Marek-Sadowska:
An efficient and accurate algorithm for computing RC current response with applications to EM reliability evaluation. 112 - Zeyu Sun, Ertugrul Demircan, Mehul D. Shroff, Taeyoung Kim
Voltage-based electromigration immortality check for general multi-branch interconnects. 113 - Ye Wang, Constantine Caramanis
Exploiting randomness in sketching for efficient hardware implementation of machine learning applications. 114 - Chenyuan Zhao, Jialing Li, Yang Yi:
Making neural encoding robust and energy efficient: an advanced analog temporal encoder for brain-inspired computing systems. 115 - Szu-Pang Mu, Wen-Hsiang Chang, Mango C.-T. Chao, Yi-Ming Wang, Ming-Tung Chang, Min-Hsiu Tsai:
Statistical methodology to identify optimal placement of on-chip process monitors for predicting fmax. 116 - Biruk Mammo, Milind Furia, Valeria Bertacco, Scott A. Mahlke, Daya Shanker Khudia:
BugMD: automatic mismatch diagnosis for bug triaging. 117 - Linuo Xue, Yuanqing Cheng, Jianlei Yang, Peiyuan Wang, Yuan Xie:
ODESY: a novel 3T-3MTJ cell design with optimized area DEnsity, scalability and latencY. 118 - Debjyoti Bhattacharjee
Delay-optimal technology mapping for in-memory computing using ReRAM devices. 119 - Yue Zha
Reconfigurable in-memory computing with resistive memory crossbar. 120 - Xunzhao Yin, Ahmedullah Aziz
Exploiting ferroelectric FETs for low-power non-volatile logic-in-memory circuits. 121 - Anil Kanduri, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch
Approximation knob: power capping meets energy efficiency. 122 - Scott Ladenheim, Yi-Chung Chen, Milan Mihajlovic, Vasilis F. Pavlidis:
IC thermal analyzer for versatile 3-D structures using multigrid preconditioned krylov methods. 123 - Chidhambaranathan Rajamanikkam, Rajesh J. S., Koushik Chakraborty, Sanghamitra Roy
BoostNoC: power efficient network-on-chip architecture for near threshold computing. 124 - Onur Sahin, Ayse K. Coskun:
QScale: thermally-efficient QoS management on heterogeneous mobile platforms. 125 - Shaoyi Cheng, John Wawrzynek:
Synthesis of statically analyzable accelerator networks from sequential programs. 126 - Shouyi Yin, Xianqing Yao, Tianyi Lu, Leibo Liu
Joint loop mapping and data placement for coarse-grained reconfigurable architecture with multi-bank memory. 127 - Marco Minutoli
Efficient synthesis of graph methods: a dynamically scheduled architecture. 128 - Sandeep Kumar Samal, Deepak Nayak, Motoi Ichihashi, Srinivasa Banna, Sung Kyu Lim
Tier partitioning strategy to mitigate BEOL degradation and cost issues in monolithic 3D ICs. 129 - Kyungwook Chang, Saurabh Sinha, Brian Cline, Raney Southerland, Michael Doherty, Greg Yeric, Sung Kyu Lim
Cascade2D: A design-aware partitioning approach to monolithic 3D IC with 2D commercial tools. 130 - Jai-Ming Lin, Po-Yang Chiu, Yen-Fu Chang:
SAINT: handling module folding and alignment in fixed-outline floorplans for 3D ICs. 131 - Robert Wille, Bing Li, Ulf Schlichtmann
From biochips to quantum circuits: computer-aided design for emerging technologies. 132 - Sandip Ray, Ian G. Harris, Görschwin Fey
Multilevel design understanding: from specification to logic (invited paper). 133
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