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ISCAS 2024: Singapore
- IEEE International Symposium on Circuits and Systems, ISCAS 2024, Singapore, May 19-22, 2024. IEEE 2024, ISBN 979-8-3503-3099-1
- Qingdian Geng, Yan Liang, Zhenzhou Lu, Herbert Ho-Ching Iu, Guangyi Wang:
Double locally active memristor-based inductor-free chaotic circuit. 1-5 - Yi Guo, Chao Tang
, Hao Wu, Badong Chen:
EEG Emotion Recognition Based on Dynamic Graph Neural Networks. 1-5 - Abhishek A. Kadam
A Compact Low Power Multi-mode Spiking Neuron using Band to Band Tunneling. 1-5 - Syed Asrar ul Haq, Sumit Jagdish Darak, Abdul Karim Gizzini:
Low Complexity Deep Learning Aided Channel Estimation Architecture for Vehicular Networks. 1-5 - Gianluca Zoppo, Fernando Corinto, Marco Gilli:
Exploring the Global Dynamics of Networks Trained through Equilibrium Propagation. 1-5 - Chaoming Fang, Fengshi Tian, Jie Yang, Mohamad Sawan:
Accelerating BPTT-Based SNN Training with Sparsity-Aware and Pipelined Architecture. 1-5 - Chengwei Cao, Yiwen Tang, Xiongchuan Huang, Zhuo Zou, Lirong Zheng:
A Fully Synthesizable Capacitorless Digital LDO for Distributed Power Delivery Network. 1-5 - Wangchen Fan, Qinsong Qian, Weifeng Sun, Zhongyuan Fang:
A High-Switching-Frequency Multi-Mode Four-Switch Buck-Boost Converter Empowered by a 400-MHz Bandwidth Two-Stage Operational Amplifier. 1-5 - Chuanning Wang, Chao Fang
A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference. 1-5 - Easha, Gaurab Banerjee:
Advancing In-Home Gait Monitoring: A Feasibility Study of Upper Limb Swing Analysis Using FMCW Radar. 1-5 - Jianqing Huang, Yuxing Li, Yanmin Zhu, Edmund Y. Lam:
A field deployable imaging system for detecting microplastics in the aquatic environment. 1-5 - Yaohua Zhang, Dai Jiang, Andreas Demosthenous:
A Differential SPDT T/R Switch for PMUT Biomedical Ultrasound Systems. 1-4 - Arnau Pastor, Pau Escofet, Sahar Ben Rached, Eduard Alarcón, Pere Barlet-Ros, Sergi Abadal:
Circuit Partitioning for Multi-Core Quantum Architectures with Deep Reinforcement Learning. 1-5 - Ming Yuan, Qiang Liu, Lin Gan, Guangwen Yang:
ESFLOW: Mapping Large-Scale Earthquake Simulation to Spatial Computing Systems. 1-5 - Kun-Chih Jimmy Chen, Wei-Ren Syu:
High Reliable and Accurate Stochastic Computing-based Artificial Neural Network Architecture Design. 1-5 - Yegeun Kim, Changhun Seok, Yoontae Jung, Sohmyung Ha, Minkyu Je:
A Biopotential Recording IC with <10-ms-Settling Hybrid DC Servo Loop. 1-5 - Nidhee Bhuwal, Manoj Kumar Majumder, Deepika Gupta:
Implementation of Floating Charged Memristor Emulator utilizing DVCCTA. 1-5 - Yuta Furukawa, Yuki Sasaki, Daisuke Hisano, Yu Nakayama, Kazuki Maruta:
Selective Diversity Reception in Underwater Optical Camera Communication. 1-5 - Kieran De Bruyn, Tinus Pannier, Jakob Declercq, Laurens Breyne, Xin Yin
Linearity Enhancement Analysis of Breakdown Voltage Doubler and Demonstration in 60 GBd SiGe BiCMOS Driver. 1-5 - Anice Jahanjoo, Nima TaheriNejad, Amin Aminifar
High-Accuracy Stress Detection Using Wrist-Worn PPG Sensors. 1-5 - Hwapyong Kim, Taewhan Kim:
Net Topology Exploration and Tuning for Mitigating Congestion in Global Routing. 1-5 - Amin Aminifar
RecogNoise: Machine-Learning-Based Recognition of Noisy Segments in Electrocardiogram Signals. 1-5 - Yuze Weng, Jinlei Pan, Yang Zhao, Junmin Jiang, Liang Qi:
A 2.3-ppm/℃ High-Order Compensated Bandgap Reference With Low-Cost Current Trimming. 1-5 - Calista Adele Yapeter, Costanza Gulli, Katerina-Theresa Mantikas, Francis Lali, Nicolas Moser, Constantinos Simillis, Melpomeni Kalofonou, Pantelis Georgiou
Rapid Diagnostics for Colorectal Cancer using Lab-on-Chip Technology with Machine Learning. 1-5 - Alessandro Bertolini
A Two-Stage CMOS Amplifier Performing High Degree of Stability for All Capacitive Load. 1-5 - Likai Li, Yichuan Bai, Shengping Liu, Yang Zhao, Sunan He, Yaqing Li, Li Du, Yuan Du:
Optoelectronic Computing Evaluation and Deployment Platform Based on a 256-MAC Silicon Photonic Chip. 1-5 - Kapila W. S. Palitharathna
Handover Management through Reconfigurable Intelligent Surfaces for VLC under Blockage Conditions. 1-5 - Yuta Togashi, Tadashi Tsubone:
Synchronization phenomena in coupled impact oscillator model of rocking robots on a suspension bridge. 1-4 - Luca Buonanno, Giacomo Pedretti, Lei Zhao, Aishwarya Natarajan, Todd Richmond, John Moon, Rand Jean, Xia Sheng, Ron M. Roth, Jim Ignowski:
Memristive Quaternary Content-Addressable Memories for Implementing Boolean Functions. 1-5 - Nagendra Krishnapura:
Analysis of Signal Transmission through Time-Varying Inductively Coupled Links. 1-5 - Alireza Ahrar, Jianxiong Xu, Mohammad Reza Pazhouhandeh, Antoine Frappé, Mostafa Rahimi Azghadi, Amirali Amirsoleimani:
Toward Accurate Analysis of Channel Charge Injection in SAR ADCs' Capacitive DACs. 1-5 - Zhewen Yu
Prediction of Subharmonic Oscillation in SIMO DC-DC Converter with Ordered Power Distributive Control in CCM and Peak Current Mode. 1-5 - Chen Wang, Yuanqi Hu:
A 174.8 dB FoMs CT-ΔΣ ADC with Integrated ISFET Sensor and Noise-Shaping Enhancement. 1-5 - Haodong Fan, Liang Chang, Junlu Zhou, Xi Yang, Shuisheng Lin, Jun Zhou:
An Ultra-Low Power Time-Domain based SNN Processor for ECG Classification. 1-5 - Mizuki Miyamoto, Ryugo Morita, Jinjia Zhou:
Visual question answering based evaluation metrics for text-to-image generation. 1-5 - David-Peter Wiens, Björn Driemeyer, Maurits Ortmanns:
A Mixed-Signal TIA with Input Restoring ADC. 1-5 - Yuye Yang
A Low-Power Multimode Eight-Channel AFE for dToF LiDAR. 1-5 - Shuai Wang
AFT-CIM: An Energy Efficient ADC-Free Transpose Computing-in-Memory Macro for MAC Operations. 1-5 - Marco Braun, Adrian Becker, Mirko Meuter, Simon Roesler, Kevin Kollek, Anton Kummert:
Deep Learning Method for Doppler Disambiguation. 1-5 - Rashmi Kumari, Surita Sarkar, Debeshi Dutta, Pabitra Das
P2E-LGAN: PPG to ECG Reconstruction Methodology using LSTM based Generative Adversarial Network. 1-5 - Aibin Yan, Zhuoyuan Lin, Guangzhu Liu, Qingyang Zhang, Zhengfeng Huang, Jie Cui, Xiaoqing Wen, Patrick Girard:
Nonvolatile and SEU-Recoverable Latch Based on FeFET and CMOS for Energy-Harvesting Devices. 1-5 - Sudipta Das, Samuel Riedel, Marco Bertuletti, Luca Benini, Moritz Brunion, Julien Ryckaert, James Myers, Dwaipayan Biswas, Dragomir Milojevic:
3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs. 1-5 - Loukas Petrou, Marco A. Antoniades, Julius Georgiou:
Dynamic Control of Reconfigurable Intelligent Surfaces: An IC-Based MOS Varactor Approach. 1-5 - H. S. Trinath Tammisetti, Nikhil Malgundkar, Abhishek Kumar:
A Tunable FDD Duplexer using Electrical Balance with N-Path Filters. 1-5 - Haikuo Shao
An FPGA-Based Reconfigurable Accelerator for Convolution-Transformer Hybrid EfficientViT. 1-5 - Yu-Hsiang Tseng, Shao-Hong Yang, Tsung-Te Liu:
Highly Reliable PUF Circuits Using Efficient Post-Processing Stabilization Technique. 1-5 - Soumika Majumder, Venkata Naveen Kolakaluri, Oliver Lexter July A. Jose, Chua-Chin Wang:
A Wide Range 2-to-2048 Division Ratio Frequency Divider Using 40-nm CMOS Process. 1-4 - Yasir Ali Shah
Efficient Soft Core Multiplier for Post Quantum Digital Signatures. 1-5 - Jim Darrell Ang, Li Yang, Roberto Gómez-García, Xi Zhu:
A Millimeter-Wave Input-Reflectionless Amplifier in 45-nm SOI CMOS Technology. 1-5 - Arash Pashrashid, Ali Hajiabadi, Trevor E. Carlson:
Efficient Detection and Mitigation Schemes for Speculative Side Channels. 1-5 - Xiaojie Chen, Weicong Lu, Tao Su, Dihu Chen:
SHP-FsNTT: A Scalable and High-Performance NTT Accelerator Based on the Four-step Algorithm. 1-5 - Mingxin Guo, Dongjun Xu, Yaoyao Li, Jian Cheng, Liang Chen:
Spiking-Hybrid-YOLO for Low-Latency Object Detection. 1-5 - Adithya Krishna, Ashwin Rajesh, Hitesh Pavan Oleti, Anand Chauhan, Shankaranarayanan H, André van Schaik, Mahesh Mehendale, Chetan Singh Thakur:
Live Demonstration: Real-time audio and visual inference on the RAMAN TinyML accelerator. 1 - Pavan Kumar Ganjimala, Subrahmanyam Mula:
A proportionate type block-oriented functional link adaptive filter for sparse nonlinear systems. 1-5 - Sivakumar Elangovan, Porus Vangala, Yeshwanth Sunnapu, Khalid Shaikh, Udayan Ganguly, Maryam Shojaei Baghini:
Novel SRAM based Temporary Memory for PVT Variation Tolerant Analog In-Memory Computing. 1-5 - Yi Wang, Yuanjin Zheng, Yajun Ha:
Machine Learning with Real-time and Small Footprint Anomaly Detection System for In-Vehicle Gateway. 1-5 - Jongjun Park, Seryeong Kim, Wonhoon Park, Seokchan Song, Hoi-Jun Yoo:
A 3.55 mJ/frame Energy-efficient Mixed-Transformer based Semantic Segmentation Accelerator for Mobile Devices. 1-5 - Bowen Liu, Yangkun Hou, Yueshan Qin, Jiwei Zou, Hanbin Ma, Yongpan Liu, Huazhong Yang, Xueqing Li, Chen Jiang:
A 1024-Channel Neurostimulation System Enabled by Photolithographic Organic Thin-Film Transistors with High Uniformity. 1-5 - Ketan Atul Bapat, Shashank S, Mrityunjoy Chakraborty:
Hard Thresholding based Stochastic Robust Algorithm for Multiple Measurement Vectors. 1-5 - Zengrun Liu, Diya Shi, Ying Wei:
Multi-Kernel Attention Encoder For Time-Domain Speech Separation. 1-5 - Yanwen Liu, Jie Ding, Xiang Li:
New Measure for Network Controllability Robustness Based on Controllable Subspace. 1-5 - Vijay Joshi
An Efficient FPGA Implementation of a Simple Lossless Algorithm (SLA) for On-board Satellite Hyperspectral Data Compression. 1-5 - Chuang Bi, Siyong Luo, Heyang Shan, Lin Cheng:
Modeling and Prediction of Common-Mode Electromagnetic Interference for GaN-Based LLC Resonant Converters. 1-5 - Junlong Gong, Wei Deng, Fuyuan Zhao, Haikun Jia, Wenjing Ye, Ruichen Wan, Baoyong Chi:
A 24.3-to-44.8 GHz Reconfigurable Dual-Band T/R Front-End with An Implicit Switch-based Antenna Interface Supporting 600MSym/s 64QAM. 1-5 - Liwei Cao, Xiao Liu:
A Fully Integrated Charge Pump with Double-Loop Control and Differentiator-based Transient Enhancer for Neural Stimulation Applications. 1-5 - Thorben Schoepe, Damien Drix, Franz Marcus Schüffny, Rebecca Miko, Samuel Sutton, Elisabetta Chicca, Michael Schmuker:
Odour Localization in Neuromorphic Systems. 1-5 - Wenjie Wang, Jianan Zheng, Yang Zhou, Risheng Su, Longbin Zhu, Zhijun Zhou:
A Stimulation Artifacts Removal Technique Employing VCO and Phase Detector for Simultaneous Neural Stimulation and Recording. 1-5 - Deyu Ling, Wenxin Yu, Zhiqiang Zhang, Jinmei Zou:
An Attention Network With Self-Supervised Learning for Rheumatoid Arthritis Scoring. 1-5 - Jaewon Lee, Seoyoung Jang, Yujin Choi, Donggeon Kim, Matthias Braendli, Marcel A. Kossel, Andrea Ruffino, Thomas Morf, Pier Andrea Francese, Gain Kim:
A 4×4 MIMO Discrete Multitone Wireline Transceiver With Far-End Crosstalk Cancellation For ADC-Based High-Speed Serial Links. 1-5 - Amirhossein Moshrefi, Yves Blaquière, Frederic Nabki:
A Precise and Reliable Engine Knock Detection Utilizing Meta Classifier. 1-5 - Qing Yang, Hadi Lotfi
A Miniaturized Chip-based ODNP Platform. 1-5 - Xinhao Mao, Ziyu Guo, Jun Han, Bo Hu, Xiaoyang Zeng:
Hardware Acceleration of Phase and Gain Control for Analog Beamforming. 1-5 - Chunyi Li, Zicheng Zhang, Haoning Wu, Kaiwei Zhang, Lei Bai, Xiaohong Liu, Guangtao Zhai, Weisi Lin:
PAPS-OVQA: Projection-Aware Patch Sampling for Omnidirectional Video Quality Assessment. 1-5 - Sezin Kircali Ata, Zhi-Hui Kong, Anusha James, Lile Cai, Kiat Seng Yeo, Khin Mi Mi Aung, Chuan Sheng Foo, Ashish James:
The Initialization Factor: Understanding its Impact on Active Learning for Analog Circuit Design. 1-5 - Hanbo Zhang, Yuqing Lou, Zhihang Zhang, Yongfu Li, Fakhrul Z. Rokhani, Guoxing Wang, Jian Zhao:
A Large-Area LTPS-TFT-Based Bi-directional Biomedical Interface with Process-Invariant In-pixel Biopotential-to-Digital Converters. 1-5 - Oliver Lexter July A. Jose, Yun-Che Chang, Venkata Naveen Kolakaluri, Celso B. Co, Mitch Ming-Chi Chou, Chua-Chin Wang:
A 10-MHz 5-V On-chip 6-layer Multi-level Digital Transformer Using T18HVG2 Process. 1-5 - Shobhit Srivastava, Sachin Doge, Sourabh Panwar, Shashidhara M, Vivek Garg, Shivendra Yadav, Lomash Chandra, Abhishek Acharya:
Impact of S/D Extension Length and Sheet Stacking on Transient Behavior of Nanosheet FETs. 1-4 - Jiahe Li, Ruoyu Chu, Ziqi Li, Hongming Lyu:
Precise and Tunable TΩ Pseudo-Resistors Based on Process-Independent pA-level Current Sources and DACs. 1-5 - Yu-Guang Chen, Tzong-Ying Lee, Yi-Ting Lin:
Enhancing Stability in CRPs: A Novel Parallel Scan-Chain PUF Design Considering Aging Effects. 1-5 - Yilmaz Ege Gonul, Leo Filippini, Junghoon Oh, Ragh Kuttappa, Scott Lerner, Mineo Kaneko, Baris Taskin:
Design Automation for Charge Recovery Logic. 1-5 - Zhicheng Dong, Xiaoteng Zhao, Weitan Huang, Yuan Gao, Depeng Sun, Shubin Liu, Lihong Yang, Zhangming Zhu:
A 30.5-to-31 GHz Sampling PLL With Double-Edge Sampling PD and Implict Common-Mode VCO Scoring 39.69-fs RMS Jitter and -253.6-dB FoM in a 0.047mm2 Area. 1-5 - Yu Liu, Chao Chen, Yixuan Huang, Qiao He, Jiang Wu:
A 140-dB Dynamic Range Digital PPG Front-end IC with An Integrated MoSe2 Photodiode for Wearable Non-invasive Pulse Oximetry. 1-5 - Hengchao Wang, Ziyu Zhong, Jiaoyang Yin, Yiling Xu, Le Yang:
Enhancing Real-Time Video Streaming with Joint Frame Size and Rate Adaptation. 1-5 - Azuki Takada, Masayuki Kinoshita, Koji Kamakura, Takaya Yamazato:
Experimental Demonstration of Dual Camera Receivers in M-PAM Rolling Shutter Based Visible Light Communication. 1-5 - Jiawen Xue, Xuguang Zhang, Guolin Li, Xiang Xie:
Tangible User Interface Everywhere Based on Imperceptible Structured Light. 1-5 - Xiangsheng Xu, Qihang Zhang, Tengfei Ma, Songping Mai:
A High Efficiency, Low EMI Non-inverting Buck-Boost Converter in Wireless Power and Data Transfer System for Brain Computer Interface. 1-4 - Elena Ferro
A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing. 1-5 - Josiah Mendes, Rajesh C. Panicker:
RISCALAR: A Cycle-Approximate, Parametrisable RISC-V Microarchitecture Explorer & Simulator. 1-5 - Mahati Basavaraju, Vinay Rayapati, Madhav Rao:
POCO: Hardware Characterization of Activation Functions using POSIT-CORDIC Architecture. 1-5 - Pathmapirian Nanthakumar, Chamira U. S. Edussooriya, Chamith Wijenayake
Minimax Design of M-D Interpolated FIR Filters using Convex-Concave Procedure. 1-5 - Mengxia He, S. C. Chan:
A New Method for Source Number Estimation in the Presence of Unknown Nonuniform Noise. 1-5 - Simone Giroletti
Pseudo-Differential Time-to-Amplitude Converter for LGAD Based Particle Detectors. 1-5 - Botao Yang, Nayu Li, Yiwei Liu, Hang Lu
A K-Band Eight-Element Dual-Beam Receiver With Current-Sharing-Based Low-Power Technique for LEO SATCOM in 65-nm CMOS. 1-5 - Tomoyuki Sasaki, Hidehiro Nakano:
Analysis for optimizer based on spiking-neural oscillator networks with a simple network topology. 1-5 - Weiping Yang
An Integration and Time-Sampling based Readout Circuit with Current Compensation for Parallel MAC operations in RRAM Arrays. 1-5 - Temitope Odedeyi, Ali Issa
High-Throughput Starch Content Estimation using RF Return Loss: Theory, Analysis and Test Instrument Design. 1-5 - Mengjie Li
A 19.7 TFLOPS/W Multiply-less Logarithmic Floating-Point CIM Architecture with Error-Reduced Compensated Approximate Adder. 1-5 - Yange Wang, Wensong Wang, Zhou Shu, Yanshu Guo, Shiquan Wang, Yuanjin Zheng:
Novel High Frequency Antenna Sensor to Detect On-Line Partial Discharge Signals. 1-5 - Rong Zhou, Bo Liu, Xin Si, Hao Cai:
Complementary Series-connected STT-MTJ for Time-based Computing-in-Memory. 1-5 - Jan-Christoph Krabbe, Adrian Bauer, Kevin Kollek, Jan-Hendrik Meusener, Anton Kummert:
FPSeg: Flexible Promptable Semantic Segmentation for Edge Devices. 1-5 - Yifei Li, Yuxin Zhou, Yuhao Shu, Hongyu Chen, Yajun Ha:
The Optimization of Aging-aware 8T SRAM for FPGA Configuration Memory. 1-5 - Perakalapudi Ravibabu, Prema Kumar Govindaswamy, Vijay Shankar Pasupureddi:
A 15-Gb/s, 0.036 pJ/bit, Half-Rate, Low Power PRBS Generator in 1.2 V, 65 nm CMOS. 1-5 - Kais Belwafi, Hamdan Alshamsi, Ashfaq Ahmed, Abdulhadi Shoufan:
Enhancing Circuit Authentication through Secure Isolation. 1-5 - Jianzheng Li, Yuchen Zhao, Weimin Hu, Yufei Liu, Yajie Qin, Ziwei Liu:
An Improved Foreground Calibration Method for Capacitor Mismatch in NS-SAR ADC. 1-5 - Fanxi Yang, Yuhan He, Ning Ma, Lirong Zheng, Zhuo Zou:
TSCM: A TCAM-Based Sparse Connection Memory Architecture in Neuromorphic Computing System for Cortical Simulation. 1-5 - Kondapalli Surya Prasad, Pudi Hemanth, Debashis Mandal:
A Rail-to-Rail Input Class-AB Linear Amplifier with Improved Bandwidth and Slew-Rate for Envelope Tracking Supply Modulators. 1-5 - Stefano Calvo, Mattia Barezzi, Umberto Garlando, Roberto La Rosa, Danilo Demarchi:
An Energy Autonomous and Battery-Free Plant's Electrical Impedance Measurement System. 1-4 - Haoxin Cai, Bin Li, Zhaohui Wu:
A 12V-to-1~1.8V Tri-Path Series-Capacitor Converter with Reduced Inductor Current and Full-Range Duty Cycle for Point-of-Loads Application. 1-5 - Haoyu Liao, Yuan Li, Puguang Liu, Qiang Wang, Mingche Lai, Xingyun Qi:
Optimization of TDM Using Single-ended Transmission for Multi-FPGA Platforms. 1-5 - Rajeev Kumar Kottilingal, Nandakumar Nambath:
Performance Analysis of Underwater Optical Wireless Video Communication Systems. 1-5 - Yu-An Chen, Chung-An Shen:
The Design of a Low-latency Tensor Decomposition Algorithm and VLSI Architecture. 1-5 - Yunxiang He, Xin Lou:
Density Estimation-based Effective Sampling Strategy for Neural Rendering. 1-5 - Rella Mareta, Hanho Lee:
Compact 217 NTT Architecture for Fully Homomorphic Encryption. 1-5 - Andy Gong
NURODE: In-Memory Crossbar Core for Hodgkin-Huxley Model ODE-Based Computations. 1-5 - Taehyung Park, Seungjin Yang, Jongmin Seok, Hyuk-Jae Lee, Ju-Hyun Kim, Chae-Eun Rhee:
Accelerating Large-Scale DLRM Inference through Dynamic Hot Data Rearrangement. 1-5 - Ruifang Liu, Shijie Cheng, Hao Wu, Keith Siu-Fung Sze, Qianjin Feng:
A Frequency-domain Features Based Clustering Algorithm for Blood Pressure Estimation with Photoplethysmogram Signal. 1-5 - Yu-Kai Zhang, Che-Yu Chou, Shang-Hua Yang, Yuan-Hao Huang:
Two-stage Adaptive Compressive Sensing and Reconstruction for Terahertz Single-Pixel Imaging. 1-5 - Yinuo Chen, Lu Cao, Hong Chen, Liang Zou, Cong Tang, Junyu Wang:
A 23.8-bit ENOB, ±5V Input Range Readout Circuit for High Precision Sensor Applications with 173.7dB-FoM. 1-5 - Yanshen Luo, Wenjian Huang, Yuying Huang, Yongfu Li, Yanhan Zeng:
A 0.7-V and 10-nA CMOS-Only Voltage Reference with 1-mA Load Driving Capability Based on Gate-Voltage Compensation Loop. 1-5 - Ian Perczak, Fei Yuan:
An 800 kS/s 1.83 fJ/conv. 12b ADC via Voltage Successive Approximation and Gated Cyclic Vernier Time Digitization. 1-5 - Ali Namdari, Orazio Aiello, Daniele D. Caviglia:
0.5V 32nW Inverter-Based Gm-C Filter for Bio-Signal Processing. 1-5 - Ben Walters, Zhengyu Cai, Hamid Rahimian Kalatehbali, Amirali Amirsoleimani, Roman Genov, Jason Eshraghian, Mostafa Rahimi Azghadi:
Spiking Auto-Encoder Using Error Modulated Spike Timing Dependant Plasticity. 1-5 - Seoyoung Jang, Jaewon Lee, Yujin Choi, Donggeon Kim, Gain Kim:
DMT 3L4W: A 3-Lane 4-Wire Signaling With Discrete Multitone Modulation for High-Speed Wireline Chip-to-Chip Interconnects. 1-5 - Navid Rezazadeh, John Gosson, Roger Levinson, Paramjeet Sahni, Mark Bury, Juan Diaz, Shufan Chan, Eve Boyer, Niraj Mathur, Hamid Taheri:
A Charge-Trap-Transistor-Based Fully Analog Machine Learning Inference Engine for Audio Keyword Spotting. 1-5 - Nellie Laleni, Sahana Padma, Thomas Kämpfe, Taekwang Jang:
Single Slope ADC with Reset Counting for FeFET-based In-Memory Computing. 1-5 - Weiyan Li, Xianren Hao, Xiaguang Li, Yan Ma, Jingjing Liu, Huaxi Zhang, Xiaoyang Zeng, Zhiyuan Chen:
A Single-Stage Four-Phase Dual-Output Regulating Rectifier With Ultrafast Transient Response Using Double-Frequency Current-Wave Modulation. 1-5 - Takahiro Fujita, Kazuyuki Wada:
A Low-Power Lock-in Amplifier Suitable for Implementation on a Programmable System on-Chip. 1-5 - Zhikai Wang, Zuochang Ye, Jingbo Zhou, Xiaosen Liu, Yan Wang:
A Two-step Fine-tuning Assisted Layout Sizing Scheme for Analog/RF Circuits. 1-5 - Óscar Pereira-Rial, Daniel García-Lesta, Lorenzo Vaquero, Paula López, Víctor M. Brea, Diego Cabello:
Live Demonstration: 5-bit signed SRAM-based DNN CIM for Image Recognition. 1 - I-Hsuan Li, Tian-Sheuan Chang:
Dynamic Gradient Sparse Update for Edge Training. 1-5 - Gustavo Liñán Cembrano
Live Demonstration: Automated Design of Analog and Mixed-Signal Circuits Using Neural Networks. 1 - Shine Parekkadan Sunny, Satyajit Das:
Efficient FFT-Based CNN Acceleration with Intra-Patch Parallelization and Flex-Stationary Dataflow. 1-5 - Kun-Chih Jimmy Chen, Leiqi Wang:
Q-learning Assisted LASSO-based Thermal Sensor Placement for Thermal-aware Multi-core Systems. 1-5 - Ramin Babaee, Shahab Oveis Gharan, Martin Bouchard:
Current-Steering DAC Architecture Design for Amplitude Mismatch Error Minimization. 1-4 - Omar Ismail, Paul Kaesser, John G. Kauffman, Maurits Ortmanns:
DAC Element Mismatch Shaping Algorithms in Incremental Delta-Sigma ADCs. 1-5 - Amirreza Farahbakhsh, Seyedmehdi Hosseini, Sajjad Kachuee, Mohammad Sharifkhani:
Rapid Emulation of Approximate DNN Accelerators. 1-5 - Yukang Huang, Junyi Mai, Wanling Jiang, Enyi Yao:
A Trusted Inference Mechanism for Edge Computing Based on Post-Quantum Encryption. 1-5 - Zhongyi Zhang, Wang Ling Goh, Yuan Gao:
A Nanowatt Area-Efficient 16-Channel Bandpass Filterbank with Floating Active Capacitance Multiplier for Acoustic Signal Processing. 1-5 - Devesh Khilwani, Sunwoo Lee, Christine Ou, Stuart Daudlin, Anthony Rizzo, Songli Wang, Michael Cullen, Keren Bergman, Alyosha C. Molnar:
3D-Integrated, Low Power, High Bandwidth Density Opto-Electronic Transceiver. 1-5 - Cong Pang, Wei Zhou, Haoyan Li, Xiangyu Zhang, Xin Lou:
Feature Map Guided Adapter Network for Object Detection in Low-light Conditions. 1-5 - Guozhen Chang, Yang Liu, Wing-Hung Ki:
A 24V-to-1V Hybrid Converter With Adaptive Dead Time Control for Point-of-Load Applications. 1-5 - Mohammad Hizzani, Arne Heittmann, George Higgins Hutchinson, Dmitrii Dobrynin, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan:
Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines. 1-5 - Shuailin Tao, Jinhai Hu, Wang Ling Goh, Yuan Gao:
Squeeze-Excite Fusion Based Multimodal Neural Network for Sleep Stage Classification with Flexible EEG/ECG Signal Acquisition Circuit. 1-5 - Dongzhu Li, Tianqi Zhao
Efficient FPGA Resource Utilization in Wired-Logic Processors Using Coarse and Fine Segmentation of LUTs for Non-Linear Functions. 1-5 - Yerzhan Mustafa
Side-channel Attacks Targeting Classical-Quantum Interface in Quantum Computers. 1-5 - Paolo Gibertini
Coincidence Detection with an Analog Spiking Neuron Exploiting Ferroelectric Polarization. 1-5 - Mingyu Shu, Yingchang Mao, Qiang Liu:
A Data-Distribution Aware Approximate Multiplier Design Based on FPGA. 1-5 - Seungeon Hwang, Duyeong Song, Jongsun Park:
HeNCoG: A Heterogeneous Near-memory Computing Architecture for Energy Efficient GCN Acceleration. 1-5 - Milos Nikolic, Ghouthi Boukli Hacene, Ciaran Bannon, Alberto Delmas Lascorz, Matthieu Courbariaux, Omar Mohamed Awad, Isak Edo Vivancos, Yoshua Bengio, Vincent Gripon, Andreas Moshovos:
BitPruning: Learning Bitlengths for Aggressive and Accurate Quantization. 1-5 - Thai-Ha Tran
An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode. 1-5 - Ajay Shroti, Anuj Grover:
Design Of High-Density Iso-Stable Asymmetric Memory Cell With Upto 10X Reduced Leakage. 1-5 - Vince Tran, Demeng Chen, Roman Genov, Mostafa Rahimi Azghadi, Amirali Amirsoleimani:
BITLITE: Light Bit-wise Operative Vector Matrix Multiplication for Low-Resolution Platforms. 1-5 - Hanchen Ge, Canjun Yuan, Yaofeng Liang, Jinpeng Lei, Zhicong Huang:
Modeling of DC-DC Converters with Neural Ordinary Differential Equations. 1-4 - Dante Loi, Javier Granizo, Luis Hernández:
A Scalable and PVT Invariant Spiking Neuron Using Asynchronous CMOS Logic. 1-5 - Gai Zhang, Lv Tang, Xinfeng Zhang:
VQNeRV: Vector Quantization Neural Representation for Video Compression. 1-5 - Kazuki Yasufuku, Yoko Uwate, Yoshifumi Nishio:
Analysis of Reservoir Computing Using Oscillator Circuit. 1-5 - Satyapreet Singh Yadav
tinyRadar: LSTM-based Real-time Multi-target Human Activity Recognition for Edge Computing. 1-5 - Jongseok Woo, Kuchul Jung, Saibal Mukhopadhyay:
Efficient Hardware Design of DNN for RF Signal Modulation Recognition. 1-5 - Zhizhuo Zhou, Jing Zhang, Zhihai Rong:
Cooperative Emergence in Structured Populations Mixed with Imitation and Aspiration Learning Dynamics. 1-5 - Zhang Zhang, Zhihao Chen, Sikai Chen, Guangjun Xie, Jianmin Zeng, Gang Liu:
A 10T SRAM with Two Read and Write Modes across Row and Column for CAM Operation and Computing In-Memory. 1-5 - Bhartipudi Sahishnavi, Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Andleeb Zahra, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas:
An inductor-less, cost-effective On-chip CMOS VNA for bio-molecule detection. 1-5 - Asif Wahid, Rajath Bindiganavile, Armin Tajalli:
Hadamard Multi-Tone Signaling in Multi-Wire Pulse Amplitude Modulation for Next Generation Wireline Communication. 1-5 - Kai Hu, Yu Liu, Fang Xu, Renhe Liu, Han Wang, Shenghui Song:
Asymmetric Neural Image Compression with High-Preserving Information. 1-5 - Zong-Lin Gao, Cheng-Wei Chen, Yi-Chen Yao, Cheng-Yuan Ho, Wen-Hsiao Peng:
Conditional Variational Autoencoders for Hierarchical B-frame Coding. 1-5 - Xu Wang
Comparison of DTC Segmentation Methods in Fractional-N Frequency Synthesizers. 1-5 - Federico Villani, Enea Masina, Thomas Burger, Michele Magno:
A 36nW Ultra-Wideband Wake-Up Receiver with -86dBm Sensitivity and Addressing Capabilities. 1-5 - Jiawei Wang, Li Lun, Zhenhui Dai, Yuanyuan Jiang, Xiaoxin Cui:
A 16.41 TOPS/W CNN Accelerator with Event-Based Layer Fusion for Real-Time Inference. 1-5 - Saurabh Dhiman, Hitesh Shrimali:
A 12.7 Bit Accurate and 5.3nJ·µV2·ns Comparator with Dynamic-cum-Body Bias Technique in SOI. 1-5 - Yinuo Chen, Liang Zou, Cong Tang, Hong Chen, Junyu Wang:
A 172.5dB-FoM Hybrid CT/DT Incremental Σ∆Modulator for Direct Current-to-Digital Conversion. 1-5 - Shintaro Arai, Ryusei Nishimura, Keisuke Yasui, Daisuke Ito:
Implementation of Robust Image Sensor Communication Using Light-Trail Surface by Rotating Propeller LED Transmitter. 1-5 - Luis A. Camuñas-Mesa, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
Mismatch calibration strategy for query-driven AER read-out in a memristor-CMOS neuromorphic chip. 1-5 - Ziying Ni, Ayesha Khalid, Weiqiang Liu, Máire O'Neill:
FPGA Bitstream Fault Injection Attack and Countermeasures on the Sampling Counter in CRYSTALS Kyber. 1-5 - Siqi Cai, Yuzhou Chen, Wenhui Zhang, Zeyuan Jin, Gang Wang, Hao Chen, Guanghui He:
A High-Throughput Lossless Image Compression Engine Optimized for Compression Ratio. 1-5 - Peiyao Sun, Haosen Yu, Basel Halak, Tomasz Kazmierski:
A Method for Swift Selection of Appropriate Approximate Multipliers for CNN Hardware Accelerators. 1-5 - Dingcheng Jiang, Bingqiang Liu, Jipeng Wang, Ao Hu, Yequan Zhao, Minjie Bao, Zhendong Fan, Zixuan Shen, Ke Wang, Chao Wang:
Live Demonstration: A Reconfigurable, Energy-efficient and High-frame-rate EKF-SLAM Accelerator Based SoC Design for Autonomous Mobile Robot Applications. 1 - Zobair Ebrahimi, Benoit Gosselin:
A Low-Power Predictive Sampling PPG Sensor. 1-5 - Hiroyuki Asahara, Takuji Kousaka:
Neimark-Sacker bifurcation in DC-DC converter with photovoltaic module. 1-4 - Sihan Zhou, Dinghan Hu, Feng Gao, Tiejia Jiang, Jiuwen Cao:
Automatic EEG-based Spike Ripples Detection with Multi-band Frequency Analysis. 1-5 - Yimin Wang, Yunuo Cen, Xuanyao Fong:
Design Framework for Ising Machines with Bistable Latch-Based Spins and All-to-All Resistive Coupling. 1-5 - Yi Chen, Bosheng Liu, Yongqi Xu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han:
Accelerating Frequency-domain Convolutional Neural Networks Inference using FPGAs. 1-5 - Changyan Chen, Rui Pan, Huajie Huang, Xuya Jiang, Qing Zhang, Yuhang Zhang, Jian Zhao, Yongfu Li:
Live Demonstration: A Wearable Cardiopulmonary Healthcare System for Real-term Monitoring of Multi-modal Physiological Signals. 1 - Biao Wang, Xiangyu Meng, Fangfei Ming:
A V-Band Low-Phase-Noise VCO with Transformer-Based Gm-Boosting Technique. 1-4 - Yirui Liu, Yukun Ding, Xiao Liu:
A Lossless Neural Recording SoC for Epilepsy Monitoring with up to 84.9-dB Dynamic Range and Rail-to-Rail Stimulation Artifact Tolerance. 1-5 - Shaofeng Zou, Xuyang Wang, Tao Yuan, Kaihui Zeng, Guolin Li, Xiang Xie:
Moving Object Detection in Shallow Underwater using Multi-Scale Spatial-Temporal Lacunarity. 1-5 - Shidi Hao, Shuai Wan, Tengya Tian, Wei Zhang, Fuzheng Yang:
Improving Optimal Binarization with Update On-the-fly in G-PCC Entropy Coding: Probability Initialization and Adaptive Bounds Setting for Context Models. 1-5 - Junhao Guo, Hongxin Kong, Lang Feng:
A Rule-Based High Efficient Obstacle-Avoiding RSMT Algorithm for VLSI Routing. 1-5 - Asif Iftekhar Omi
On the New Analytical Design of Efficient Inductive Links with Maximum Biomedical Wireless Power Transfer Capability and Area Controllability. 1-5 - Hitesh Kumar Sahu, Emon Sarkar, Pushkar Sathe, Laxmeesha Somappa:
All-Digital High-Resolution Frequency Measurement SoC for Rapid MEMS Readouts. 1-5 - Jun Yin, Elisa Pantoja, Yimin Gao, Mircea R. Stan:
A Feedback Self-adaptive Body Biasing-based RF-DC Rectifier for Highly-sensitive RF Energy Harvesting. 1-5 - Xinyan Liu, Xiao Wu, Haikuo Shao
A Flexible FPGA-Based Accelerator for Efficient Inference of Multi-Precision CNNs. 1-5 - Josefredo Gadelha da Silva, Márcio J. Lacerda, Ariádne L. J. Bertolin, Jander Santos, Erivelton Geraldo Nepomuceno:
LQR and Genetic Algorithms: An Effective Duo for Assessing Control Expenditure and Performance in Dynamic Systems. 1-5 - Ningyuan Zhang, Sihao Zhang, Junhua Liu, Huailin Liao:
A low in-band phase noise Fractional-N ADPLL based on Switched-Capacitor-DPI. 1-5 - Zhaoting Ou, Jienan Chen, Jie Zheng:
An Automatic PCB Imposition Method based on Reinforcement Learning. 1-5 - Wei Soon Ng, Wang Ling Goh, Yuan Gao:
High Accuracy and Low Latency Mixed Precision Neural Network Acceleration for TinyML Applications on Resource-Constrained FPGAs. 1-5 - Tsung-Wen Sun, Yung-Tang Hsu, Tsung-Heng Tsai, Chia-Chan Chang:
A GaN-Based Gate Driver with Adaptive Charge Sharing Bootstrap Technique to Improve the Conduction Loss. 1-4 - Mohammad Mezanur Rahman Monjur, Qiaoyan Yu:
CTC: Continuous-Time Convolution based Multi-Attack Detection for Sensor Networks. 1-5 - Habibur Rahman, Adrian M. Llop Recha, Stefano Fasciani, Pål Gunnar Hogganvik, Kristian Gjertsen Kjelgård, Dag Trygve Wisland:
Conure: Surrogate-based Artwork Generator for RFCMOS Integrated Inductors. 1-5 - Yongteng Ma, Xuliang Yu, Zhichao Tan, Liang Zhao:
An SRAM Compute-In-Memory Macro Based on Direct Coupling SAR ADC and DAC Reuse. 1-5 - Cheng Gu, Gang Li, Xiaolong Lin, Jiayao Ling, Xiaoyao Liang:
GNeRF: Accelerating Neural Radiance Fields Inference via Adaptive Sample Gating. 1-5 - Zhaowen Wang, Hongzhe Jiang, Peter R. Kinget:
A Digital Pre-Distortion Technique for High-Linearity, Low-Power, Compact, Phase Interpolators. 1-5 - Aida Aberra, Muhammad Abrar Akram, Soon-Jae Kweon, Jongmin Kim, Kim-Hoang Nguyen, Gichan Yun, Minkyu Je, Yong-Ak Song, Sohmyung Ha:
A Hybrid High-voltage Regulating Charge Pump for Electrokinetic Concentration. 1-5 - Mujeev Khan
Design and Implementation of FPGA based System for Object Detection and Range Estimation used in ADAS Applications utilizing FMCW Radar. 1-5 - Jiashuo Wei, Qiang Liu:
A Fault Attack Resistant Method for RISC-V Based on Interrupt Handlers and Instruction Extensions. 1-5 - Zhiting Lin, Yunlong Liu, Yaling Wang, Yue Zhao, Chunyu Peng, Xiulong Wu:
SRAM-Based Digital CIM Macro for Linear Interpolation and MAC. 1-5 - Marco Gonzalez
A Narrowband RF Front End in 22-nm FD-SOI Featuring a Programmable Low-Noise Amplifier with a Configurable Noise-Power Trade-Off. 1-5 - Yike Li, Zheng Wang, Wenhui Ou, Chen Liang, Weiyu Zhou, Yongkui Yang, Chao Chen:
Low-latency Buffering for Mixed-precision Neural Network Accelerator with MulTAP and FQPipe. 1-5 - Cai Chen, Yi Wang, Kim-Hui Yap:
Multi-scale Attentive Fusion Network for Remote Sensing Image Change Captioning. 1-5 - Lin Xie, Zizheng Dong, Jialei Sun, Sai Gao, Shuaipeng Li, Naifeng Jing, Qin Wang, Jianfei Jiang:
A 0.8-ps RMS Precision Period Jitter Measurement Circuit with Offset Reduction. 1-5 - Yixiang Tan, Zhiying Wu, Jieli Liu, Jiajing Wu, Ting Chen, Kaixin Lin:
Bubble or Not: An Analysis of Ethereum ERC721 and ERC1155 Non-fungible Token Ecosystem. 1-5 - Kyle van Oosterhout, Martijn Timmermans, Marco Fattori, Eugenio Cantatore:
A 250MΩ Input Impedance a-IGZO Front-End for Biosignal Acquisition from Non-Contact Electrodes. 1-5 - Rakesh Kumar Palani, Srishti Agrawal, Ayan Alam Khan, Aadarsh V, Rajasekhar Nagulapalli:
A Wide Range Constant Transconductance Circuit Based on Negative Feedback for Analog Circuits. 1-4 - Yan Zhao, Chao Chen, Wenjing Zhang, Jun Yang:
A 2.4GHz Sub-passive RF Down-converter with Trans-frequency Current-reusing scheme achieving Low Flicker Noise and High Linearity. 1-5 - Jihene Bouhlila, Felix Last, Rainer Buchty, Mladen Berekovic, Saleh Mulhem:
Machine Learning for SRAM Stability Analysis. 1-5 - Zhuoyu Chen, Shengming Zhou, Pingcheng Dong, Ke Li, Wenyue Zhang, Fengwei An, Lei Chen:
Live Demonstration: A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Low-power Applications. 1 - Xiaoqing Zhao, Longjun Liu, Yuyi Liu, Bin Gao, Hongbin Sun:
Compensation Architecture to Alleviate Noise Effects in RRAM-based Computing-in-memory Chips with Residual Resource. 1-5 - Chun-Hsian Huang, Shao-Wei Tang, Pao-Ann Hsiung:
ACNNE: An Adaptive Convolution Engine for CNNs Acceleration Exploiting Partial Reconfiguration on FPGAs. 1-5 - Arjun Tyagi, Shahar Kvatinsky:
Assessing the Performance of Stateful Logic in 1-Selector-1-RRAM Crossbar Arrays. 1-5 - Bo Ruan, Limin Jiang
Dynamically Configurable FIR Filters Based on Serial MACs and Systolic Arrays. 1-5 - Zehao Li, Wenhao Lu, Yuncheng Lu, Junying Li, Yucen Shi, Yuanjin Zheng, Tony Tae-Hyoung Kim:
Live Demonstration: Real-Time Object Detection & Classification System in IoT with Dynamic Neuromorphic Vision Sensors. 1 - Trevor J. Odelberg, Jaeho Im, Milad Moosavifar, David D. Wentzloff:
A Fully Integrated NB-IoT Wake-Up Receiver Utilizing An Optimized OFDM 12-Point FFT Wake-Up Engine. 1-5 - David Rivera-Orozco, Federico Sandoval-Ibarra, Gerardo Molina Salgado:
On the Application of Data Weighted Averaging to Noise Shaping SAR ADCs. 1-5 - Zijian Chen, Wei Sun, Zicheng Zhang, Ru Huang, Fangfang Lu, Xiongkuo Min, Guangtao Zhai, Wenjun Zhang:
FS-BAND: A Frequency-Sensitive Banding Detector. 1-5 - Jinane Bazzi
Reconfigurable Precision SRAM-based Analog In-memory-compute Macro Design. 1-5 - Madhukar Gosula, Ashis Maity:
CMOS Implementation of Low-Frequency Pattern Generator for Electrochemical Sensing. 1-5 - Zetong Wu, Hao Wu, Kaiqun Fang, Keith Siu-Fung Sze, Qianjin Feng:
A Transformer-Based Deep Learning Model for Sleep Apnea Detection and Application on RingConn Smart Ring. 1-5 - Junjie Wang, Shuang Liu, Ruicheng Pan, Shiqin Yan, Yihe Liu, Yang Liu:
Live Demonstration for Input-Sparsity-Aware RRAM Processing-in-Memory Chip. 1-2 - Zicheng Li, Yadong Qu, Hongtao Xie, Yongdong Zhang:
LATextSpotter: Empowering Transformer Decoder with Length Perception Ability. 1-5 - Can Liang
An Energy Efficient Delay Element with Self-shutoff Logic and Delay Extension. 1-5 - Zexin Su, Bo Li, Chang Liu, Xiaohui Su, Qian Luo, Hongyu Ren, Zhengsheng Han:
SRAM-Based PUF with Noise Immunity Achieving 0.58% Native BER in 55-nm CMOS. 1-5 - Weiqiang Chen, Lingxin Meng, Yining Zhao, Menglian Zhao, Zhichao Tan:
A 0.5V 723nW 84.3dB-SNDR Dynamic Zoom ADC with CLS-Assisted Capacitively-Biased FIA. 1-4 - Shuqian Yang, Henhui Ding, Xudong Jiang:
Generalized Few-Shot 3D Point Cloud Segmentation. 1-5 - Loai G. Salem:
A Switched-Photovoltaic Ladder DC-DC Converter for High Harvesting Efficiency under Nonuniform Illumination. 1-5 - Kevin Wine, Demetrios Lambropoulos, Laleh Najafizadeh, Sasan Haghani:
Incorporating Design Skills in an Introductory Electric Circuits Laboratory. 1-4 - Md. Rubel Sarkar, Shirazush Salekin Chowdhury
An In-Memory Power Efficient Computing Architecture with Emerging VGSOT MRAM Device. 1-5 - Tayeb H. C. Bouazza, Dang-Kièn Germain Pham, Reda Mohellebi, Patricia Desgreys:
Spectral Structure Analysis of FFT-based Digital Predistortion for Wideband 5G Applications. 1-5 - Jiwon Choi, Wooyoung Jo, Seongyon Hong, Beomseok Kwon, Wonhoon Park, Hoi-Jun Yoo:
A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-based Sparsity Augmentation and Text-based Mixed-Precision. 1-5 - Weizeng Li, Linfang Wang, Zhi Li, Wang Ye, Zhidao Zhou, Haiyang Zhou, Hanghang Gao, Jinshan Yue, Hongyang Hu, Fengman Liu, Qing Luo, Chunmeng Dou:
A 2T P-Channel Logic Flash Cell for Reconfigurable Interconnection in Chiplet-Based Computing-In-Memory Accelerators. 1-4 - Alana Marie Dee, Katherine Bennett, Sajjad Moazeni:
A Mixed-Signal Compute-in-Memory Architecture for Solving All-to-All Connected MAXCUT Problems with Sub-µs Time-to-Solution. 1-5 - Wenhua Ding, Yufei Wang, Tingyu Chen, Mengna Luo, Jinpeng Lei, Yaofeng Liang, Zhicong Huang:
Machine Learning Based Design of Magnetic Coupler for Wireless Power Transfer. 1-4 - R. S. Ashwin Kumar:
Flip-Around Level-Shifting For Switched-Capacitor Amplifiers to Improve the Closed-Loop Settling of Floating-Inverter Amplifiers. 1-5 - Wei Lu, Han-Hsiang Pei, Jheng-Rong Yu, Hung-Ming Chen, Po-Tsang Huang:
A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning. 1-5 - Sumukh Prashant Bhanushali, Arindam Sanyal:
Enhancing Performance of SAR ADC through Supervised Machine Learning. 1-5 - Erik Wehr, Tobias Zekorn, Michael Hanhart, Kenny Vohl, Léon Weihs, Ralf Wunderlich, Stefan Heinen:
A Trimming-Less External-RC Relaxation Oscillator With Self-Calibrating Current Reference for a SiC Active Gate Driver Application. 1-5 - Sandeep Reddy Kukunuru, Farzan Rezaei, Loai G. Salem
A Single-Inductor 5: 1 Resonant Switched-Capacitor Ladder Converter with Continuous Voltage Conversion Capability. 1-5 - Di Li, Susanto Rahardja:
Unsupervised Image Enhancement via Contrastive Learning. 1-5 - Jyoti Patel, Sankalp Rai, Vivek Kumar, Sudeb Dasgupta:
Interface Trap Analysis in Multi-Fin FinFET Technology: a Crucial Reliability Issue in Digital Application. 1-5 - Takemori Orima, Yoshihiko Horio, Satoshi Moriya, Shigeo Sato:
Bifurcation phenomena observed from two-variable spiking neuron integrated circuit. 1-5 - Nouduru Venkata Raghavendra, Deepthi Amuru, Zia Abbas:
MetaCirc: A Meta-learning Approach for Statistical Leakage Estimation Improvement in Digital Circuits. 1-5 - Muhammad Haris Farooq, Muhammad Abrar Akram, Shirin Qaisar, Soon-Jae Kweon, Hammad M. Cheema, Sohmyung Ha:
A Tri-loop Fast-transient Digital LDO with Adaptive-gain Control and Fine-loop Freezer. 1-5 - Lingrui Xiang, Xiaofen Lu, Rui Zhang, Zheng Hu:
SSDC: A Scalable Sparse Differential Checkpoint for Large-scale Deep Recommendation Models. 1-5 - Anal Prakash Sharma, Laxmeesha Somappa:
Hardware Implementation of a 16 Channel 0.16 μJ/class Neural Tree for on-chip Seizure Detection. 1-5 - Yuan Ma, Shangbin Liu, Chao Xie, Yahao Song, Lan Yin, Milin Zhang:
Design of a multi-channel high-sensitivity electrochemical interface IC based on organic electrochemical transistors (OECT). 1-5 - Nordin Zbida, Susana Patón, Eric Gutierrez:
A 3rd-order Noise Shaped Multistage Open-Loop Current Controlled Oscillator-based ADC with Non-Linearity Compensation. 1-5 - Najmeh Nazari, Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Muhtasim Alam Chowdhury, Chongzhou Fang, Avesta Sasan, Setareh Rafatirad, Houman Homayoun, Soheil Salehi:
Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures. 1-5 - Bangda Bender Yang, Anthony Chan Carusone:
Design of a Linearized Power-Efficient Dynamic Amplifier in 22nm FDSOI. 1-5 - Dinesh Kushwaha, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu:
SRAM-Based Hybrid Analog Compute-In-memory Architecture to Enhance the Signal Margin. 1-5 - Yi Sheng Chong, Rakshith Harish, Rajesh Chandrasekhara Panicker, Vishnu P. Nambiar, Anh Tuan Do:
A 420 GOPS/W CGRA with a Configurable MAC and Dynamic Truncation. 1-5 - Wenming Zhu, Weitao Yuan, Dan Wu, Yuansheng Zhao, Zhenghao Lu, Guoyi Yu, Yu Yu, Chao Wang:
A Novel Balanced Detection Based Optoelectronic Front End Circuit for FMCW LiDAR System. 1-4 - Julian Höfer, Michael Gauß, Manuela Adams, Fabian Kreß, Fabian Kempf, Christian Maximilian Karle, Tanja Harbaum, Andreas Barth, Jürgen Becker:
A Challenge-Based Blended Learning Approach for an Introductory Digital Circuits and Systems Course. 1-5 - Hossein Yaghoobzadeh Shadmehri, Ehsan Rahiminejad, Mehdi Saberi, Alexandre Schmid:
A Low-Power and High-Precision Time- Domain Winner-Take-All Circuit Based on the Group Search Algorithm. 1-4 - Kaixin Lin, Dan Lin, Ziye Zheng, Yixiang Tan, Jiajing Wu:
Detecting Fake Deposit Attacks on Cross-chain Bridges from a Network Perspective. 1-5 - Jingdong Kuang, Wei Liu
Deep Learning Based Source Direction Estimation with Magnitude-only Array Measurements. 1-5 - Da-Hyeon Youn, Gyuwon Kam, Minkyu Song, Soo Youn Kim:
Two-step Classification Neuron Circuits for Low-power and High-integration SNN Systems. 1-5 - Ziqi Li
A 9.45-ENOB 3.84-MS/s Ping-Pong Interleaving SAR ADC with Integrated Buffers and SPI for 96-Channel Neural Signal Acquisition. 1-5 - Defa Wang, Zhiwei Zhu, Shuai Wan, Fei Yang, Luis Herranz:
Rate Control for Slimmable Video Codec using Multilayer Perceptron. 1-5 - Kevin Kollek, Marco Braun, Jan-Hendrik Meusener, Jan-Christoph Krabbe, Anton Kummert:
Empirical Study on the Impact of Few-Cost Proxies. 1-5 - Canghai Lin, ZhiJiao Zhang, Lei Wang, Yao Wang, Jingyue Zhao, Zhijie Yang, Xun Xiao:
Fast and Lightweight Automatic Modulation Recognition using Spiking Neural Network. 1-5 - Zewei Ding, Shangmei Wang, Yujie Cai, Xiaoyang Zeng, Wenhong Li, Mingyu Wang:
A Lossless Compression Algorithm with Hardware Implementation for Dynamic Vision Sensor. 1-5 - Kun Zhang, Hongxin Qiu, Zhikai Liu, Fan Liang, Wei Sun:
Self-aware Cross-component Prediction Model Based on Template for Screen Content Coding. 1-5 - Kuan-Ting Lin, Ming-Dou Ker:
A Versatile 8-Channel High Voltage Stimulator for Comprehensive Neural Stimulation. 1-5 - Heng-Yu Liu, Lin-Hung Lai, Wen-Yue Lin
A 2.56-µs Dynamic Range, 31.25-ps Resolution 2-D Vernier Digital-to-Time Converter (DTC) for Cell-Monitoring. 1-5 - Boris Murmann:
Practical Aspects of Script-Based Analog Design Using Precomputed Lookup Tables. 1-5 - Bjoern Driemeyer, Holger Mandry, David-Peter Wiens, Joachim Becker, Maurits Ortmanns:
Optimisation of RO-PUF Design Parameters for Minimising the Effective Area per PUF Bit. 1-5 - Jiaxing Zhang, Jiayang Li
Three Coils, High-Resolution Receiver Positioning System for Wireless Power Transfer. 1-4 - Jonas David Rieseler, Christian Adam
A Compressed Sensing Integrate-and-Fire Neuron Concept for Massively Parallel Recordings. 1-5 - Kuan-Hsien Liu, Chih-Jung Wang, Tsung-Jung Liu
RDLNET: Residual Dense Block based Lightweight Network for Video Super-Resolution. 1-5 - Xin Zhao, Zhicheng Hu, Liang Chang:
USR-LUT: A High-Efficient Universal Super Resolution Accelerator with Lookup Table. 1-5 - Zichen Hu, Zhining Zhou, Hongming Lyu:
A Microwatt/Channel Neural Signal Processor for High-Channel-Count Spike Detection and Sorting. 1-5 - Jaekwon Lee, Lu Zhang, Donghyun Kim, Kar-Ann Toh:
Human Activity Recognition Using Wi-Fi Signals based on Tokenized Signals with Attention. 1-5 - Liangshun Wu, Lisheng Xie, Jianwei Xue, Faquan Chen, Qingyang Tian, Yifan Zhou, Ziren Wu, Rendong Ying, Peilin Liu:
SPRCPl: An Efficient Tool for SNN Models Deployment on Multi-Core Neuromorphic Chips via Pilot Running. 1-5 - Wangzilu Lu, Jiajie Huang, Chao Wang, Ting Zhou, Yang Zhao, Jian Zhao, Yongfu Li:
A 2.5 kHz 50.57 dB Linearized VCO ADC Using 6 µm LTPS TFTs. 1-5 - Shantanu Singh Baliyan, Anshul Thakur, Laxmeesha Somappa:
On-chip Data Compression Techniques for High-Density Implantable Neural Recording. 1-5 - Shanthi Pavan:
Systematic Development of CMOS PTAT Circuits. 1-5 - Hira Rasheed, Peyman Mirtaheri, Ali Muhtaroglu:
A Reduced Spiking Neural Network Architecture for Energy Efficient Context-Dependent Reinforcement Learning Tasks. 1-5 - Samuel Chef, Chung Tah Chua, Jing Yun Tay, Chee Lip Gan:
Explainable automated data estimation in Logic State Imaging of embedded SRAM. 1-5 - Andrea Fasolino, Paola Vitolo, Rosalba Liguori, Luigi Di Benedetto
Dynamically Adaptive Accumulator for in-sensor ANN Hardware Accelerators. 1-5 - Amany Kassem, Izzat Darwazeh:
Bandwidth Enhancement Techniques for Large-Area VLC Receivers. 1-5 - Juhong Park, Johnny Rhe, Jong Hwan Ko:
KARS: Kernel-Grouping Aided Row-Skipping for SDK-based Weight Compression in PIM Arrays. 1-5 - Hadi Lotfi
An S-band SiGe BiCMOS Transmitter for an NV Center Based Quantum Magnetometer. 1-5 - Stefan Karolcík, Pantelis Georgiou
Optimal filtering and smoothing thresholds for high-frequency photoplethysmography signals. 1-5 - Qiang Han, Farid Boussaïd, Mohammed Bennamoun
Model Predictive Control-Based Reinforcement Learning. 1-5 - He Liu, Simin Tao, Zhipeng Huang, Biwei Xie, Xingquan Li, Ge Li:
Instance-level Timing Learning and Prediction at Placement using Res-UNet Network. 1-5 - Li Yang, Mohamed Malki, José Maria Muñoz-Ferreras, Xi Zhu, Roberto Gómez-García:
High-Order Multilayer Input-Absorptive RF Filter With Wideband Quasi-Flat Group Delay and Multiple Stopband Transmission Zeros. 1-5 - Lantao Wang, Johannes Bastl, Tim Lauber, Kenny Vohl, Jonas Meier, Andreas Köllmann, Ulrich Möhlmann, Michael Hanhart, Ralf Wunderlich, Stefan Heinen:
A 28 nm 8.2-11.1 GHz Class-C Digitally Controlled Oscillator with 40 kHz Tuning Resolution. 1-4 - Tianyue Wang, Rujun Song, Zhuoling Xiao, Bo Yan, Haojie Qin, Di He:
CLFusion: 3D Semantic Segmentation Based on Camera and Lidar Fusion. 1-5 - Zhaodong Lv, Hao Sun, Yuhao Shu, Yajun Ha:
EarFDA: A Lightweight and Energy-Efficient Fall Detection Accelerator for Ear-Worn Devices. 1-5 - Longyu Cheng, Xujin Ba, Yanyun Qu:
DehazeDiff: When Conditional Guidance Meets Diffusion Models for Image Dehazing. 1-5 - Yu-Chuan Chuang, Ming-Guang Lin, Chi-Tse Huang, Chieh-Fang Teng, Cheng-Yang Chang, Yi-Ta Chen, An-Yeu Andy Wu:
A 40nm 24.6TOPS/W Scalable EfficientDet Processor for Object Detection. 1-5 - Takuya Shindo, Nobuhiko Itoh:
A Study on Hybrid Optimization Methods using Lévy Flight and Differential Evolution Mechanisms. 1-4 - Yaning Wang, Zhenguo Li, Peng Wang, Yihang Cheng, Fule Li, Yi Hu, Jiali Hou, Meng Su, Mengjiao Li:
A Floating-Ring Hybrid Amplifier Insensitive to PVT and Common-mode Variation without CMFB for High-Speed ADCs. 1-5 - Ahmed Zaky Ghonem, Eslam Yahya Tawfik:
ASIC Implementation of Efficient 512-Neuron 256K-Synapses Digital Neuromorphic Processor with On-Chip Encoding in 22nmFDX. 1-5 - Siyuan Xu, Huiru Yang, Longhuang Li, Yiyang Du, Huaiyu Ye, Huan Hu:
An Ultra-Low Power Wearable Sensing System with a Highly Sensitive Three-Dimensional LIG Sensor and Energy-Efficient Time Domain Readout. 1-5 - Shubham Mishra, Vishal Saxena:
A Sub-1pJ/bit Laser Power Independent 32Gb/s Silicon Photonic EAM Driver in 65nm CMOS. 1-5 - Paul Kaesser, Omar Ismail, David-Peter Wiens, Maurits Ortmanns:
Offset Cancellation in Incremental ∆Σ ADCs. 1-5 - Amandeep Singh, Bishnu Prasad Das:
PVT-Insensitive Time-Domain-based In-Memory Computation with Improved Linearity for Binary Neural Networks. 1-5 - Chenjie Xia, Xuanhao Zhang, Zihan Zou, Hao Cai, Bo Liu:
Live Demonstration: A Target-Separable BWN Inspired Speech Recognition Processor with Low-power Precision-adaptive Approximate Computing. 1 - Xiangwei Zhang, Wenhao Liu, Han Yang, Ying Hou, Xiaosong Wang, Yu Liu:
A 6-µW AC-Coupled, Two-Step Incremental ∆Σ ADC for High-Density Neural Recording. 1-4 - Jianlin Xia, Yongjia Li, Zhongyuan Fang, Jin Wu, Feng Lin, Weifeng Sun:
A Non-trimmed, 7 MHz and 52 ppm/°C Relaxation Oscillator with Loop Errors Compensation from -40°C to 165°C. 1-5 - Asra Malik, Soon-Jae Kweon, Karam Ellahi, Muhammad Abrar Akram, Song-I Cheon, Yoontae Jung, Minkyu Je, Hammad M. Cheema, Sohmyung Ha:
A High-throughput Impedance Measurement IC with Baseline-Canceling Peak Detector. 1-5 - Haoyu Li, Dong Wang, Jiazheng Zhou, Junhua Liu, Huailin Liao:
A 0.5 μm2 2-T Thin-Oxide OTP Antifuse with Reliability Enhanced by Auto Shut-off Program Logic for Low-Power Applications. 1-5 - Aditya Japa, Jack Miskelly, Yijun Cui, Máire O'Neill, Chongyan Gu:
A Novel Methodology for Processor based PUF in Approximate Computing. 1-5 - Yina Li, Wenwen Zhang, Zhouzhuo Tang, Yingmei Feng, Xia Yu, Qi-Jie Wang, Zhiping Lin:
Signal Analysis and Detection of COVID-19 Infection with ATR-FTIR Spectroscopy. 1-5 - Zhenhui Duan, Bingqiang Liu, Zehua Yin, Jipeng Wang, Zixuan Shen, Xupeng Zhang, Zaisheng He, Chao Wang:
Live Demonstration: A High-frame-rate and Energy-efficient SIFT Feature Extraction Accelerator Based SoC Design for AMR Applications. 1 - Qinghao Liu, Chuanshi Yang, Yange Wang, Chun-Huat Heng, Yuanjin Zheng:
A 825 MHz 2.83 µW -70 dBm Sensitivity Wake-up Receiver with Resonant Noise Matching. 1-5 - Ziyi Chen, Ioannis Savidis:
Block Configuration Algorithms for a Reconfigurable Analog Array. 1-5 - Nazim Altar Koca, Chip-Hong Chang, Anh Tuan Do, Vishnu P. Nambiar:
Exploring Error Correction Circuits on RISC-V based Systems for Space Applications. 1-5 - Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Hoi-Jun Yoo:
Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network. 1-5 - Kento Fukuta, Yoko Uwate, Yoshifumi Nishio:
Associative Memory Function Using Coupled Oscillators with Sparse Coupling. 1-4 - Adil Malik, Christos Papavassiliou:
A Memristor Circuit Implementing Tunable Stochastic Distributions for Bayesian Inference and Monte Carlo Sampling. 1-5 - Jianye Li, Jialei Wu, Yixin Zhou, Keping Wang:
A Charge-Balanced Monopolar Neural Stimulator by Utilizing Dynamic Current Replication Technique Achieving <1 nA Residual Average DC Current Error. 1-5 - Feifei Xu, Wang Zhou, Guangzhen Li, Zheng Zhong, Yingchen Zhou:
Enhancing Cross-Modal Understanding for Audio Visual Scene-Aware Dialog Through Contrastive Learning. 1-5 - Qiao Wang, Xizhu Peng, Zhifei Lu, Yutao Peng, Zhe Hu
Digital Background Calibration Techniques for Interstage Gain Error and Nonlinearity in Pipelined ADCs. 1-5 - Suma George Cardwell
Device Codesign using Reinforcement Learning. 1-5 - Xin-Ce Gong, Jian-Jun Kuang, Xin Ming, Zhiyi Lin, Bo Zhang:
A Fast Transient PMOS LDO with AP3 Buffer and Shaped-Hybrid-Bias EA Techniques Achieving 8.15ps FOM. 1-5 - Zezhong Wang, Masayuki Shimoda, Atsushi Takahashi:
BCA Channel Routing to Minimize Wirelength for Generalized Channel Problem. 1-5 - Zhiquan Wan, Zhipeng Cao, Shunbin Li, Dehao Ye:
Modeling and Analysis of Waferscale Switching Network with Multiple System Faults. 1-5 - Allan Riboullet, Frédéric Nabki, Yves Blaquière, Glenn E. R. Cowan:
Configurable and Intelligent Switched CMOS Current Driver Powering Arrays of Electrothermal Actuators for MEMS Switches. 1-5 - Akash Chavan, Pranav Sinha, Sunny Raj:
In-memory Machine Learning using Adaptive Multivariate Decision Trees and Memristors. 1-5 - Llorenç Fanals-i-Batllori, Namit Mishra, Lorenzo Rota, Aldo Pena-Perez:
A Simple Zero Average Switching Energy Differential SAR ADC. 1-4 - Cel Thys
Walsh-domain Neural Network for Power Amplifier Behavioral Modelling and Digital Predistortion. 1-5 - Qinyu Chen
Epilepsy Seizure Detection and Prediction using an Approximate Spiking Convolutional Transformer. 1-5 - Miaoxin Wang, Xiao Wu, Jun Lin, Zhongfeng Wang:
An FPGA-Based Accelerator Enabling Efficient Support for CNNs with Arbitrary Kernel Sizes. 1-5 - Lukas Schramm, Peter Baumgartner, Jasmin Aghassi-Hagmann:
Quantization-Robust On-Chip Jitter Measurement Technique for Multiple Local Oscillator Systems. 1-5 - Bu Chen
A 128×128 CMOS SPAD Receiver for 500Mbps Free Space Optical Communication with Column-wise Decoding and Fast Spot Tracking. 1-5 - Zelong Yuan, Siwei Yuan, Pengyu Liu, Chen Yin, Lei Xu, Weiguang Sheng, Naifeng Jing:
A Flexible and High-Precision Activation Function Unit Based on Equi-Error Partitioning Algorithm. 1-5 - Meng-Hsun Hsieh, Xuan-Hong Li, Yu-Hsiang Huang, Pei-Hsuan Kuo, Juinn-Dar Huang:
A Hardware-Friendly Alternative to Softmax Function and Its Efficient VLSI Implementation for Deep Learning Applications. 1-5 - Hongyu Wang, Xiangyu Zhang, Xin Lou:
A Multi-scale Block PatchMatch-based Unified Algorithm for Efficient 6-D Vision Processing. 1-5 - SNB Tushar, Hritom Das, Garrett S. Rose:
HfO2-Based Synaptic Spiking Neural Network Evaluation to Optimize Design and Testing Cost. 1-5 - Shivangi Chandrakar, Deepika Gupta, Manoj Kumar Majumder:
Crosstalk and Power Analysis in Tapered based Composite Cu-CNT TSV in 3D IC. 1-5 - Lingfeng Zhu, Wing-Hung Ki, Yue Zhong, Xiaofei Ma, Junmin Jiang:
D2 Buck Converter With Delay-Insensitive Response and Adaptive On-Time Extension During Load Transient. 1-4 - Zirui Li, Jianwang Zhai, Zixuan Li, Zhongdong Qi, Kang Zhao:
Effective Resource Model and Cost Scheme for Maze Routing in 3D Global Routing. 1-5 - Dongfan Xu, Minzhe Tang, Yi Zhang, Zheng Li, Atsushi Shirane, Kenichi Okada:
A 24-71-GHz Tri-Mode Mixer Using Harmonic Selection for Multi-Band 5G NR. 1-4 - Zhiyuan Zhao, Jixing Li, Gang Chen, Zhelong Jiang, Ruixiu Qiao, Peng Xu, Yihao Chen, Huaxiang Lu:
An FPGA-Based High-Throughput Dataflow Accelerator for Lightweight Neural Network. 1-5 - Ziyi Cao, Tiansong Li, Shaoguo Cui, Kejun Wu, Yan Chen, Longwei Zhong, Hongkui Wang, Li Yu:
TPARN: A Network for Enhancing Synthetic Video Quality After 3D-HEVC Encoding. 1-5 - Daniel Casanueva-Morato, Pablo Lopez-Osorio, Enrique Piñero-Fuentes, Juan Pedro Dominguez-Morales, Fernando Perez-Peña, Alejandro Linares-Barranco:
Integrating a hippocampus memory model into a neuromorphic robotic-arm for trajectory navigation. 1-5 - Abdullah Mansoor, Malgorzata Chrzanowska-Jeske:
SERS-3DPlace: Ensemble Reinforcement Learning for 3D Monolithic Placement. 1-5 - Hamed Nasiri, Cheng Li, Lihong Zhang:
Reinforcement-Learning-Based Successive Approximation Algorithm. 1-5 - Zhishuo Huang, Jia Tao, Haosong Zhao, Donglong Chen, Shuyan Zhu, Yinjin Fu, Nong Xiao, Yao Liu
Unified Lossless-Throughput Architecture for AES and SM4 Encryption with Changeable Keys. 1-5 - Rubén Gómez-Merchán, Juan A. Leñero-Bardallo, Pablo Fernández-Peramo, Ángel Rodríguez-Vázquez:
A Discrete Approach to Dynamic Vision with Single-Photon Detectors. 1-5 - Sunglim Han, Hoyong Seong, Sein Oh, Jimin Koo, Hanbit Jin, Hye Jin Kim, Sohmyung Ha, Minkyu Je:
A 72-channel Resistive-sensor Interface IC with High Energy Efficiency and a Wide Input Range. 1-5 - Nael Mizanur Rahman, Uday Kamal, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Saibal Mukhopadhyay:
Passive Lightweight On-chip Sensors for Power Side Channel Attack Detection. 1-5 - Xin Cheng, Jialiang Tang, Zhiqiang Zhang, Wenxin Yu, Ning Jiang, Jinjia Zhou:
Decoupled Multi-teacher Knowledge Distillation based on Entropy. 1-5 - Yunjeong Shin, Daehyeok Park, Dohun Koh, Dongryul Heo, Jieun Park, Hyundong Lee, Jongbeom Kim, Hyunsoo Lee, Taigon Song:
FS2K: A Forksheet FET Technology Library and a Study of VLSI Prediction for 2nm and Beyond. 1-5 - Ke Dong, Kejie Huang, Bo Wang:
Tetris-SDK: Efficient Convolution Layer Mapping with Adaptive Windows for Fast In Memory Computing. 1-5 - Juncheng Chen, Han Zhang, Zishuo Yang, Yicheng Xu, Nay Aung Kyaw, Kwen-Siong Chong, Zhiping Lin, Bah-Hwee Gwee:
A Novel Non-profiling Side-Channel Attack on Masked Devices with Connectivity Matrix. 1-5 - Xiaowei Zhang, Fangcong Wang, Dezhi Xing, Longxiang Zhu:
Three-Phase Motor Driver with Overcurrent Protection Function. 1-5 - Haoyu Bai
A 0.12mm2 K/Ka Band RX Front-end in 40-nm CMOS with Inductor-Less LO Generators. 1-5 - Runxi Wang, Ruge Xu, Xiaotian Zhao, Kai Jiang, Xinfei Guo:
CINEMA: A Configurable Binary Segmentation Based Arithmetic Module for Mixed-Precision In-Memory Acceleration. 1-5 - Xuexin Wang, Yunxiang He, Xiangyu Zhang, Pingqiang Zhou, Xin Lou:
An Efficient Hardware Volume Renderer for Convolutional Neural Radiance Fields. 1-5 - Manu Rathore, Garrett S. Rose:
AnSpiCS-Net: Reconfigurable Network-on-Chip for Analog Spiking Recurrent Neural Networks. 1-5 - Gewangzi Du, Liwei Chen, Tongshuai Wu, Xiong Zheng, Gang Shi:
Code Property Graph based Cross-Domain Vulnerability Detection via Deep Fused Feature. 1-5 - Yuqi Ding, Haobo Li, Xiangpeng Liang, Marija Vaskeviciute, Daniele Faccio, Hadi Heidari:
A Physical Reservoir Computing Processor for ECG-to-PCG Signals Prediction. 1-5 - Benedicto James Sitou Campbell, Sudarshan K. Srinivasan:
Formal Verification For Cyclic Quantum Walk Circuits. 1-5 - Xin Wang, Khayle Torres, Yuting Xu, Stefan Karolcík, Damien K. Ming, Sophie Yacoub, Alison H. Holmes, Pantelis Georgiou
Live Demonstration: A Low-cost Wearable Continuous Monitoring Platform for Dengue. 1 - Kangning Li, Qing Shen, Wei Liu
Wideband DOA Estimation Based on Tensor Completion and Decomposition. 1-5 - Yidan Sun, Siew-Kei Lam, Guiyuan Jiang, Peilan He:
Streamlining DNN Obfuscation to Defend Against Model Stealing Attacks. 1-5 - Jesko Flemming
A DAC Sharing and Linearization Technique for Time-Interleaved Incremental Delta-Sigma ADCs. 1-5 - Zixu Li, Wang Wang, Xin Zhong, Manni Li, Jiayu Yang, Yinyin Lin, Guhyun Kim, Yosub Song, Chengchen Wang, Xiankui Xiong:
LauWS: Local Adaptive Unstructured Weight Sparsity of Load Balance for DNN in Near-Data Processing. 1-5 - Yoko Uwate, Marie Engelene J. Obien, Urs Frey, Yoshifumi Nishio:
Feature Extraction of Neuronal Activity by Attractor Reconstruction in Neural Networks with Delayed Couplings. 1-5 - Prema Kumar Govindaswamy, Mursina Khatun, Vijay Shankar Pasupureddi:
A 0.2 pJ/bit, Energy-Efficient, Half-Rate Hybrid Circuit Topology at 6-Gb/s in 1.2V, 65 nm CMOS. 1-5 - Zhentao Wu, Yu Wu, Andreas Demosthenous:
A 199 μW, 82.9% Efficiency Current Driver with Active Common-Mode Reduction for Impedance-Based Tactile Sensors. 1-4 - Duy-Hieu Bui, Duc-Manh Tran, Daniele D. Caviglia, Orazio Aiello:
Fully Synthesizable Dynamic Voltage Comparator across technology nodes and scaled supply voltages. 1-5 - Ibrahim Abe M. Elfadel:
On Various Extensions of the Shannon-Hagelbarger Concavity Theorem. 1-5 - Zhicheng Hu, Jiahao Zeng, Xin Zhao, Liang Zhou, Liang Chang:
SuperHCA: A Super-Resolution Accelerator with Sparsity-Aware Heterogeneous Core Architecture. 1-5 - Shaoting Guan, Haoyu Jiang, Yuxiao Zhao, Yifei Huang, Hao Min:
Integrated Cold-Start of a Boost Converter at 54mV Using a Two-Stage Capacitive Voltage Multiplier. 1-5 - Anik Batabyal
A Compact 25-32 GHz High IMRR Double Quadrature CMOS Transmitter for 5G Applications. 1-5 - Shen-Fu Hsiao, Hou-Chun Kuo, Yu Kuo, Kun-Chih Chen:
Neural Network Acceleration Using Digit-Plane Computation with Early Termination. 1-4 - Yukinojo Kotani, Yoko Uwate, Yoshifumi Nishio:
Synchronizations in Oscillatory Networks with Memristor Couplings as Ring Structure. 1-5 - Karam Ellahi, Soon-Jae Kweon, Asra Malik, Muhammad Abrar Akram, Song-I Cheon, Yoontae Jung, Minkyu Je, Hammad M. Cheema, Sohmyung Ha:
A High-throughput Impedance Measurement IC Using Synchronous Cyclic Integration Technique. 1-5 - Can Liang
A 5.80 ns, 22.77 fJ, Energy Efficient Level Shifter Using Auto Switch Logic. 1-5 - Jia-Yu Li, Wai-Chi Fang:
An Edge AI Accelerator Design Based on HDC Model for Real-time EEG-based Emotion Recognition System with RISC-V FPGA Platform. 1-5 - Cheng Tian, Zijie Chen, Junrui Liang:
A Battery-free and Sensor-less Photovoltaic Tag for Real-time Indoor Light Illuminance Evaluation. 1-5 - Tzung-Je Lee, Ji-Hau Chiou:
A 3.2-GHz 0.3/0.5 V 16-nm FinFET I/O Buffer With Low-Power PVT Compensation Circuit. 1-5 - Xiaowei Zhang, Fuyue Qian, Jianxiong Xi, Lenian He:
A BJT-Based Fully Integrated 16-bit ZOOM Temperature Sensor with an Inaccuracy of 0.28°C (3σ) from -40°C to 125°C using improved 1-point Calibration. 1-5 - Miyuru Thathsara, Siew-Kei Lam, Damith Kawshan, Duvindu Piyasena:
Hardware Accelerator for Feature Matching with Binary Search Tree. 1-5 - Clément Metz, Olivier Bichler, Antoine Dupret:
Efficient Neural Compression with Inference-time Decoding. 1-5 - Weihang Tan, Yingjie Lao, Keshab K. Parhi:
Area-Efficient Matrix-Vector Polynomial Multiplication Architecture for ML-KEM Using Interleaving and Folding Transformation. 1-5 - Ye Liu, Shuang Hao, Kun Huang, Minghui Yang, Zili Huang, Xiuyuan Qi, Yiting Li, Liang Zhou, Yu Long, Jun Zhou:
An FPGA-based Ultra-High Performance and Scalable Optical Flow Hardware Accelerator for Autonomous Driving. 1-5 - Zhengfeng Wu, Ioannis Savidis:
Edge-weighted Graph Neural Networks for Post-placement Interconnect Capacitance Estimation of Analog Circuits. 1-5 - Yi Guo, Xiu Chen, Qilin Zhou, Heming Sun:
Power-Efficient and Small-Area Approximate Multiplier Design with FPGA-Based Compressors. 1-5 - Chengliang Wang, Zhetong Huang, Ao Ren, Xun Zhang:
An FPGA-based kNN Seach Accelerator for point cloud registration. 1-5 - Haruna Matsushita, Hiroaki Kurokawa, Takuji Kousaka:
Derivative-Free-Optimization-based Bifurcation Point Detection Method without Parameter Tuning. 1-5 - Sayan Sarkar, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui:
Adaptive Digitally-Controlled Active Rectifier-Based Receiver for Bioimplants. 1-5 - Samuel P. Jones, Saumya Kareem Reni, Izzet Kale:
Machine Learning for Monitoring Vocal Health and Performance of Professional Singers. 1-5 - Ye Cai, Zonglin Yang, Liwei Ni, Junfeng Liu, Biwei Xie, Xingquan Li:
Parallel AIG Refactoring via Conflict Breaking. 1-5 - Shuenn-Yuh Lee, Wei-Cheng Tseng, Ju-Yi Chen:
An Ultra-Lightweight Time Period CNN Based Model with AI Accelerator Design for Arrhythmia Classification. 1-4 - Antoine Lhomel, Maxandre Fellmann, Yann Deval, Eric Kerhervé, François Rivet, Nathalie Deltimple:
Co-simulation Workflow for D-Band Power Amplifier Linearization using Walsh-based DPD. 1-5 - Wen-Yue Lin
A Programmable CMOS Dielectrophoresis Array Chip with 128 × 128 Electrodes for Cell Manipulation. 1-5 - Soshi Hirayae, Kanta Yoshioka, Atsuki Yokota, Ichiro Kawashima, Yuichiro Tanaka, Yuichi Katori, Osamu Nomura, Takashi Morie, Hakaru Tamukoh:
Enhancing Memory Capacity of Reservoir Computing with Delayed Input and Efficient Hardware Implementation with Shift Registers. 1-5 - Lucas Grativol, Lubin Gauthier, Mathieu Léonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel:
PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. 1-5 - Ye Ke
A Low-Power Spike Detector Using In-Memory Computing for Event-based Neural Frontend. 1-5 - Heng You, Dashan Shi, Delong Shang, Yumei Zhou, Shushan Qiao:
A 409mV, Sub-10nW Power-on Reset Circuit Using Adaptive Accuracy Adjustment for Low Voltage Applications. 1-5 - Juhua Chen, Linxin Yang, Wenbin Ye:
A FPGA-based Energy-Efficient Processor for Radar-based Continuous Fall Detection. 1-5 - Haoran Zeng, Wendong Mao, Siyu Zhang
A Precision-Scalable Vision Accelerator for Robotic Applications. 1-5 - Jie Yang, Xi Zhang, Xingtang Wu:
An emergent EV dispatching method to enhance the resilience of power-transportation coupling systems. 1-4 - Guoao Liu, Yuanqi Hu:
A 400 MHz Voltage-Mode-Based Fully Integrated Regulating Rectifier for Deep Tissue Bio-implants. 1-5 - Fumito Shinomiya, Masayuki Yamauchi:
Development of an Initial Value Input System for a Ring of Coupled Four Oscillators. 1-5 - Dalhatu Muhammed
A Multi-Farm Irrigation Scheduling System (MISS) for Arid and Semi-Arid Regions: A Realistic Scenario. 1-5 - Jack Cai, Muhammad Ahsan Kaleem, Roman Genov, Mostafa Rahimi Azghadi, Amirali Amirsoleimani:
In-Memory Transformer Self-Attention Mechanism Using Passive Memristor Crossbar. 1-5 - Yixuan Gao, Xiongkuo Min, Xiaohong Liu, Lei Sun, Yonglin Luo, Zuowei Cao, Guangtao Zhai:
Calculating Color Differences of Images via Siamese Neural Network. 1-5 - Gabriel Maranhão, Deni Germano Alves Neto, Márcio Cherem Schneider, Carlos Galup-Montoro:
Live Demonstration: A 5-DC-parameter MOSFET model for circuit design and simulation using open-source EDA tools. 1 - Zixuan Ling, Xuanbang Chen, Yuhao Wang, Xun Zhang, Xiaodong Liu, Zhenghai Wang:
Design and Implementation of Optical Fiber-based Visible Light Communication System. 1-4 - Dahun Choi, Hyun Kim:
ARC: Adaptive Rounding and Clipping Considering Gradient Distribution for Deep Convolutional Neural Network Training. 1-5 - Julien Poupon
Dynamic Analysis of RF CMOS Inverter-Based Ring Oscillators using an All-Region MOSFET Charge-Based Model in 28nm FD-SOI CMOS. 1-5 - Elliott Worsey, Qi Tang, Manu Bala Krishnan, Mukesh Kumar Kulsreshath, Dinesh Pamunuwa
Nanoelectromechanical analog-to-digital converter for low power and harsh environments. 1-5 - Zhanel Kudaibergenova, Kassen Dautov, Mohammad S. Hashmi:
Near-Field WPT System Design for Concurrent Charging of Two Independent Loads. 1-3 - Chen Zhang, Zhijie Huang, QianXi Cheng, Changchun Zhou, Xin'an Wang:
An Energy-Efficient Configurable Coprocessor Based on 1-D CNN for ECG Anomaly Detection. 1-5 - Reo Nagasue, Isamu Mizuno, Ryo Kishida, Tatsuya Iwata, Takefumi Yoshikawa:
A Fractional-N PLL for Multi-phase Clock Generation with Loop Bandwidth Enhancement. 1-5 - Byung-Kwon An, Xueyong Zhang, Anh Tuan Do, Tony Tae-Hyoung Kim:
Time-based Sensing with Linear Current-to-Time Conversion for Multi-level Resistive Memory. 1-5 - Haiyang Guo, Zhongyuan Fang, Haonan Fan, Shen Xu, Xueyong Zhang, Weifeng Sun:
A 1.35-ppm/°C Temperature Coefficient, 86-dB PSR Voltage Reference With 1-mA Load Driving Capability. 1-5 - Ali Mostafa
A gm/Id based methodology to estimate OTA requirements in low-pass discrete time Σ∆-ADCs. 1-5 - Javad Shabanpour, Constantin Simovski:
On the design of reflecting intelligent surfaces for multi-user NOMA communication networks. 1-5 - Raúl Aparicio-Téllez
Enhancing Identifiability of PUFs with Built-in Compensation through Nonlinear Transformations. 1-5 - Manxin Li, Runpeng Gao, Calder Wilson, Amartya Basak, Evan C. Markwell, Matthew L. Johnston, Un-Ku Moon:
An Easy-to-Drive Discrete-Time ADC Topology Using Digital Predictive Level-Shifting. 1-5 - Subrato Bharati
FewShotEEG Learning and Classification for Brain- Computer Interface. 1-5 - Min Tang, Shuwen Chen, Shuihua Wang, Yudong Zhang:
Machine Learning for X-ray and CT-based COVID-19 Diagnosis. 1-5 - Bingjun Xiong, Feng Yan, Wenji Mo, Jian Guan, Yuxuan Huang, Jingjing Liu:
A 1.02 ppm/°C Precision Bandgap Reference with High-order Curvature Compensation for Fluorescence Detection. 1-4 - Deni Germano Alves Neto, Gabriel Maranhão, Márcio Cherem Schneider, Carlos Galup-Montoro:
A design-oriented single-piece short-channel MOSFET model. 1-5 - Yimin Wang, Xuanyao Fong:
Energy-Efficient Ising Machines Using Capacitance-Coupled Latches for MaxCut Solving. 1-5 - Shengzhe Gao, Shi Li, Xiangzhen Li, Hao Wang, Zhihua Jian, Cheng Zha:
A New Design of All-pass IIR Filters based Two-channel Quadrature Mirror Filter Bank. 1-5 - Malyaban Bal, Abhronil Sengupta:
Equilibrium-Based Learning Dynamics in Spiking Architectures. 1-5 - Jingqi Zhang
Modular Inversion Architecture over GF(2m) Using Optimal Exponentiation Blocks for ECC Cryptosystems. 1-5 - Yingchang Mao, Mingyu Shu, Qiang Liu:
PBN: Progressive Batch Normalization for DNN Training on Edge Device. 1-5 - Hamidreza Mafi
Utilization of Noise-Shaping in Mixed-Signal Timing-Skew Mismatch Calibration of TI-ADCs. 1-5 - Xu Meng, Jinxia Geng, Xu Tang, Min Zhou, Hailin Teng:
Fractional-N Injection-Locked Ring Oscillator Based on Two Points, Varying Strength Injection. 1-4 - Jose Luis Ceballos, Fulvio Ciciotti, Christopher Rogi, Alessandro Caspani, Luca Sant, Dietmar Straeussnigg, Andreas Wiesbauer, Simon Gruenberger, Chin Yeong Koh, Chern Sia Phillip Lim:
A 70dBA-460μW Companding Digital Silicon Microphone with Programmable Acoustic Overload Point and MEMS Asymmetry Robustness. 1-5 - Yanze Zheng, Yi Zhang, Naixin Zhou, Shibo Chen, Yijiu Zhao:
Noise Decomposition Based on VGG and LSTM Networks. 1-5 - Enrico Russo, Francesco Giulio Blanco, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Vincenzo Catania:
Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning. 1-5 - Sunyoung Park, Wooseok Byun, Minkyu Je, Ji-Hoon Kim:
Algorithm-Hardware Co-Design for Wearable BCIs: An Evolution from Linear Algebra to Transformers. 1-5 - Ajay B. S, Madhav Rao, Phani Pavan K:
Neuromorphic Energy Efficient Stress Detection System using Spiking Neural Network. 1-5 - Fanyang Li, Tao Yin, Faxiang Wang, Zhanpeng Yuan:
A Transient Response Improved Digital LDO with an Approximate CEAG Analog-to-Frequency Domain Converter. 1-4 - Linghui Kong, Zhiwei Zhang, Shan Yu, Jingna Mao:
An Intracortical Wireless Bidirectional Brain-Computer Interface with High Data Density. 1-5 - Ping Lu, Minhan Chen, Shaishav Desai:
A Reduced-Fractional-Spur DPLL Based on Cyclic Single-Delay-Pair Vernier TDC. 1-5 - Liang-Ying Su, Shih-Hsu Huang:
Design Flow for Incorporating Camouflaged Logic Gates to Enhance Hardware Security While Considering Timing Closure. 1-5 - Yusuke Kozawa:
Selective Multi-pulse Pulse Position Modulation for Lighting Constrained Visible Light Communications. 1-5 - Thanh-Hoang Nguyen-Vo
i6mA-CNN: A Web-based System to Identify DNA N6-Methyladenine Sites in Mouse Genomes. 1-5 - Dipesh C. Monga
A Dual Mode All NMOS 7-T Temperature Sensor and Voltage Reference for Biomedical Applications. 1-5 - Enne Wittenhagen, Dominik Wilding, Patrick Kurth, Sebastian Linnhoff, Frowin Buballa, Urs Hecht, Patrick J. Artz, Friedel Gerfers:
An 11-Bit 12 GS/s Beam-Forming Receiver ADC for a 2x2 Antenna Array utilizing True Time-Delay with 68 dBc SFDR and 55 dB SNDR. 1-5 - Yunwei Mao, You You, Xiaosi Tan, Yongming Huang, Xiaohu You, Chuan Zhang:
FLAG: Formula-LLM-Based Auto-Generator for Baseband Hardware. 1-5 - Zhaotong Zhang, Yi Zhong, Yingying Cui, Yawei Ding, Yukun Xue, Qibin Li, Ruining Yang, Jian Cao, Yuan Wang:
An End-to-End SoC for Brain-Inspired CNN-SNN Hybrid Applications. 1-5 - Gustavo Liñán Cembrano
Live Demonstration: Using ANNs to Predict the Evolution of Spectrum Occupancy. 1 - Leyu Zhang, Yuqing Ren, Yifei Shen, Wuyang Zhou, Alexios Balatsoukas-Stimming, Chuan Zhang, Andreas Burg:
A Low-Latency and High-Performance SCL Decoder with Frame-Interleaving. 1-5 - Xuelin Liu, Jiebin Yan, Zheng Wan, Yuming Fang, Hantao Liu:
Blind Quality Assessment of Panoramic Images Based on Multiple Viewport Sequences. 1-5 - Yuzhou Tong, Yongming Chen, Bah-Hwee Gwee, Qi Cao, Sirajudeen Gulam Razul, Zhiping Lin:
A Method for Out-of-Distribution Detection in Encrypted Mobile Traffic Classification. 1-5 - Danqing Zhang, Baoting Li, Hang Wang, Xuchong Zhang, Hongbin Sun:
An Efficient Sparse-Aware Summation Optimization Strategy for DNN Accelerator. 1-5 - Okba Bekhelifi
On Optimizing Deep Neural Networks Inference on CPUs for Brain-Computer Interfaces using Inference Engines. 1-5 - Minkyu Yang, Changjoo Park, Wanyeong Jung:
A Compact and Low-Power Column Readout Circuit based on Digital Delay Chain. 1-5 - Hong Chen, Nan Wang, Xiang Gao:
Analysis of Random Clock Jitter Effect in Time-Interleaved DACs. 1-5 - Sidharth Thomas, Jaskirat Singh Virdi, Anshul Verma, Bishnu Prasad Das, Kenichi Okada, Pratap Narayan Singh:
A Peak-detector-based Ultra Low Power ECG ASIC for Early Detection of Cardio-Vascular Diseases. 1-5 - Hocine Kaddour Drizi, Mounir Boukadoum:
CNN Model with Transfer learning and Data Augmentation for Obstacle Detection in Rail Systems. 1-5 - Vivek Mohan
Hybrid Event-Frame Neural Spike Detector for Neuromorphic Implantable BMI. 1-5 - Jinjie Hu, Suwen Song, Zhongfeng Wang:
A Novel Low-Complexity Massive MIMO Detector with Near-Optimum Performance. 1-5 - Snehalatha Lalithamma
A Chopper-Stabilized Bandgap Reference with a Double-Sampled FIR Filter in 180-nm CMOS. 1-5 - Jicheon Kim
A Scalable Multi-Chip YOLO Accelerator With a Lightweight Inter-Chip Adapter. 1-5 - Chenlong He, Wei Li, Xiaoxiang Chen, Zhijian Hao
CTU-Level Adaptive Quantization Method Joint with GOP based Temporal Filter for Video Coding. 1-5 - Shihao Hong, Yeh-Ching Chung:
ReShare: A Resource-Efficient Weight Pattern Sharing Scheme for Memristive DNN Accelerators. 1-5 - Jiayue Wang, Hyuk-Jae Lee, Hansang Cho, Byungsoo Kang, Hyunmin Jung:
Tri-Directional Decoder for Edge Discontinuity Classification. 1-5 - Pranay Kamal Miriyala, P. Nitin Srinivas, Nagaveni S:
On-Chip 5&6-GHz RF Energy Harvesting System for Implantable Medical Devices. 1-5 - Ioannis K. Chatzipaschalis, Theodoros Panagiotis Chatzinikolaou, Emmanouil Stavroulakis, Evangelos Tsipas, Iosif-Angelos Fyrigos, Antonio Rubio, Georgios Ch. Sirakoulis:
Low-Power Collision Avoidance Memristive Circuit for Swarms of Miniature Robots. 1-5 - Bahram Jafari, Shahriar Mirabbasi:
Back-Gate Coupling Technique for Phase Error Correction in PLL-Based Quadrature VCOs. 1-5 - Zili Zhou, Cong Li, Bo Qu, Xiang Li:
Predicting Higher-order Dynamics without Network Topology by Ridge Regression. 1-5 - Isaki Yamamoto, Hiroyuki Torikai:
A Novel Ergodic Cellular Automaton Asthma Model: Reproductions of Nonlinear Dynamics of Asthma and Efficient FPGA Implementation. 1-5 - Calder Wilson, Matthew L. Johnston:
Multi-segment Stretchable Strain Sensor using Time Domain Reflectometry. 1-5 - Bin Gong, Ke Chen, Pengfei Huang, Bi Wu, Weiqiang Liu:
Most Significant One-Driven Shifting Dynamic Efficient Multipliers for Large Language Models. 1-5 - Chun-An Lin, Tsung-Jung Liu
LIRSRN: A Lightweight Infrared Image Super-Resolution Network. 1-5 - Florian Mayer, Christian Vogel:
An Optimization-Based Approach to One-Bit Quantization. 1-5 - Michele Caselli, Andrea Boni:
A Write System for Compact RRAM Memory Arrays Based on F-1T1R. 1-5 - Kwabena Oppong Banahene, Randall L. Geiger:
Compact Temperature Sensor with Voltage-Ratio Current-Independent Output for Reference Independent Data Conversion. 1-5 - Qilin Zheng, Shiyu Li, Yitu Wang, Ziru Li, Yiran Chen, Hai (Helen) Li:
Hybrid Digital/Analog Memristor-based Computing Architecture for Sparse Deep Learning Acceleration. 1-5 - Vinay Rayapati, Gogireddy Ravi Kiran Reddy, Gandi Ajay Kumar, Saketh Gajawada, Sanampudi Gopala Krishna Reddy, Nanditha Rao:
FPGA-based Hardware Software Co-design to Accelerate Brain Tumour Segmentation. 1-5 - Yuhao Ji, Chao Fang
BETA: Binarized Energy-Efficient Transformer Accelerator at the Edge. 1-5 - Chang Sun, Yifan Zuo, Jinyue Lu, Yongxiang Xia, Haicheng Tu, Chunshan Liu:
Fault Diagnosis for Hybrid AC/DC Power System Based on Convolutional Neural Network with Transfer Learning. 1-5 - Yibin Tang, Linxiang Cui, Xiaotong Wang, Min Li, Ying Chen, Yuan Gao:
ADHD Classification with Robust Biomarker Detection Using Knowledge Distillation. 1-5 - Zhongpeng Zhang, Ying Liu:
Redundancy Removal Module for Reducing the Bitrates of Image Coding for Machines. 1-4 - Haonan Fan
A CMOS-Integrated 23.88-ppm/° C, 6.825-µW Voltage Reference with Offset-Self-Cancellation for Portable Biomedical Equipment Applications. 1-5 - Yuncheng Lu, Kaixiang Cui, Yucen Shi, Zehao Li, Junying Li, Wenhao Lu, Yuanjin Zheng, Tony Tae-Hyoung Kim:
A Memory-Efficient High-Speed Event-based Object Tracking System. 1-5 - Jianze Wang, Wei Zhang, Zhen Wu, Yimin Wang, Leming Jiao, Xiaolin Wang, Xiao Gong, Xuanyao Fong:
Transposable Memory Based on the Ferroelectric Field-Effect Transistor. 1-5 - Xiaodan Zhou, Weipeng He, Chen Su, Tao Liu, Dongbing Fu, Qiang Li:
A Low Power 16-bit 125MS/s Pipeline ADC with 100dB SFDR. 1-5 - Alessandro Ravera, Andrea Formentini, Matteo Lodi, Alberto Oliveri, Marco Storace:
A nonlinear model of air-gapped ferrite-core inductors for SMPS applications. 1-5 - Zhining Zhou, Zichen Hu, Hongming Lyu:
A μW-level Multi-channel Calibration-free Spike Detector with High Accuracy based on Stationary Wavelet Transform and Teager Energy Operators. 1-5 - Ruoheng Yao, Shengming Zhou, Zhiyue Gao, Yangyi Zhang, Yiwei Luo, Lei Chen, Fengwei An:
Live Demonstration: A Video Denoising Co-processor with Non-local Means Algorithm for FHD 30fps Image Sensor. 1 - Gaurav R, Abhishek A. Kadam
A Compact 140nW/input Winner-Take-All Circuit for Spiking Neural Networks. 1-5 - Yi-Fan Chen, Yu-Jen Chang, Ching-Te Chiu, Ming-Long Huang, Geng-Ming Liang, Chao-Lin Lee, Jenq-Kuen Lee, Ping-Yu Hsieh, Wei-Chih Lai:
Low DRAM Memory Access and Flexible Dataflow Convolutional Neural Network Accelerator based on RISC-V Custom Instruction. 1-5 - Xiuyuan Qi
A High-Performance ORB Accelerator with Algorithm and Hardware Co-design for Visual Localization. 1-5 - Baowei Wang, Xinyu Lv, Yufeng Wu, Changyu Dai, Zhengyu Hu, Xingyuan Zhao:
Embedding Guide: Improving Watermarking Robustness and Imperceptibility based on Attention and Edge Information. 1-5 - Chio-Hong Leong, Chi-Kong Wong, Cheng Gong, Chi-Seng Lam:
A Steady-state Operation Based Online Parameter Identification Method of Output Capacitor for DC-DC Buck Converters. 1-5 - Tokunbo Ogunfunmi:
Exploration of Generative AI tools for an Electric Circuits Course. 1-5 - Ettore Napoli, Antonio G. M. Strollo, Efstratios Zacharelos, Gennaro Di Meo:
Comprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers. 1-5 - Jinbo Chen, Hui Wu, Fengshi Tian, Qiming Hou, Siyu Lin, Jie Yang, Mohamad Sawan:
A Low-Power Level-Crossing Analog-to-Spike Converter Intended for Neuromorphic Biomedical Applications. 1-5 - Yi-Fan Tsao, Heng-Tung Hsu:
A Wideband Linear GaN-on-SiC Power Amplifier using Harmonic-Tuning Technique for 5G NewRadio FR2 Applications. 1-4 - Shiyu Meng, Yi Wang, Lap-Pui Chau:
Depth-powered Moving-obstacle Segmentation Under Bird-eye-view for Autonomous Driving. 1-5 - Paolo Arena, Carlo Famoso, Alessia Li Noce, Alberto Motta, Igor Galati, Luca Patanè:
A new motor-neuron circuit implementation. 1-5 - Yonguk Sim, Choongseok Song, Eun Chan Park, Jongwook Jeon, Daewoong Kwon, Doo Seok Jeong:
Optimal data distribution in FeFET-based computing-in-memory macros. 1-5 - Yaswanth K. Cherivirala, David D. Wentzloff:
A Capacitor-less Hybrid LDO for Low Frequency Supply Noise Suppression Achieving 99.87% Efficiency and 3.32ps Response Time in 65nm. 1-4 - Hagar Hendy, Karsten Bergthold, Tejasvi Das, Cory E. Merkel:
Design Space Exploration of Memristor-based Delay Cells for Time-domain Neuromorphic Computing. 1-5 - Huiyong Zheng, Yukun Ding, Xiao Liu:
A 0.04 mm2/Channel Neural Amplifier with An Input-Referred Noise of 4.6 µVrms and Power Consumption of 3 µW. 1-5 - Federico Bizzarri, Angelo Brambilla, Davide del Giudice, Daniele Linaro:
Fast Simulation of Circuits With Recursive Elements: Application to a BESS. 1-5 - Mingyang Li, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima:
A Fully-Parallel Reconfigurable Spiking Neural Network Accelerator with Structured Sparse Connections. 1-5 - M. Mahmudul Hasan Sajeeb, Sandeep Reddy Kukunuru, Loai G. Salem:
A Tunable Switched-Capacitor 2-Way Power Divider Based on N-Path Filters. 1-5 - Feifan Gao, Pak Kwong Chan:
A 0.5-V Feedback-based CMOS Buffer with Rail-to-rail Operating Range. 1-5 - Wing-Hung Ki, Yuan Yao, Chi-Ying Tsui:
Time Domain Analysis of Secondary Stage With Series Resonance Driving Rectifier Load. 1-4 - Xiang Zhang, Run He, Kai Tong, Shuquan Man, Jingyu Tong, Haodong Li, Huiping Zhuang:
Complex Motion Planning for Quadruped Robots Using Large Language Models. 1-5 - Oscal T.-C. Chen, Cheng-Hong Tsai, Manh-Hung Ha
Automatic Personality Recognition via XLNet with Refined Highway and Switching Module for Chatbot. 1-5 - Aorui Gou, Heming Sun, Xiaoyang Zeng, Yibo Fan:
Privacy-preserving with Flexible Autoencoder for Video Coding for Machines. 1-5 - Yang Yang, Wai-Chi Fang:
A Highly Reliable PPG Authentication System Based on an Improved AI Model with Dynamic Weighted Triplet Loss Function. 1-5 - Lanting Guo, Haiyan Chen, Chen Li, Sheng Liu:
LWECC: A Lightweight ECC Technology for HPC Accelerators Supporting Multi-granularity Memory Access. 1-5 - Jonathan J. Sanderson, Syed Rafay Hasan:
System Integration of Xilinx DPU and HDMI for Real-Time Inference in PYNQ Environment With Image Enhancement. 1-5 - Zhe Hu
Evolution Strategy and Controlled Residual Convolutional Neural Networks for ADC Calibration in the Absence of Ground Truth. 1-5 - Chang Liu, Yi Zhao, Yue Yin, He Guan, Hao Zhang, Fadhel M. Ghannouchi:
Broadband High-Efficiency Continuous Class-F/F-1 Power Amplifiers with Active Second Harmonic Injection Technique. 1-5 - Xin Felix Chen
Design of Wireless In-Wheel Motor Drive with S/CP Compensation. 1-5 - András Horváth:
Stable Diffusion with Memristive Cellular Neural Networks. 1-5 - Léo De La Fuente, Jean-Frédéric Christmann, Manuel Pezzin, Matthias Remars, Olivier Sentieys:
A Hardware Instruction Generation Mechanism for Energy-Efficient Computational Memories. 1-5 - Jiarui Zhang, Songnan Lin, Hao Cheng, Weixian Liu, Bihan Wen:
Learning-Based Human Detection via Radar for Dynamic and Cluttered Indoor Environments. 1-5 - Hyun-Bin Lee, Yoon Heo, Won-Young Lee:
A Wide-Range Reference-Less Digital Clock and Data Recovery for Harmonic-Lock-Free Frequency Acquisition. 1-5 - Ahmed Abdelaal, Michael Pietzko
Using Negative-R Assisted Integrators in Wide-band Delta-Sigma Modulators. 1-5 - Jared Marchant, Christian Carver, Austin Barlow, Benjamin Fisher, John Serafini, Nicholas A. Peters, Ryan Camacho, Shiuh-Hua Wood Chiang:
Modeling and Validation of Offset Cancellation for Hybrid Photonic-Electronic Transimpedance Amplifier Using All-Electronic Circuits. 1-5 - Tatsunori Matsumoto, Lin Du
Simultaneous Quantification of Multiple Drugs by Machine Learning on Electrochemical Sensors. 1-5 - Kuniyasu Shimizu:
Spectral mode decomposition of propagating wave in five-coupled bistable oscillators. 1-5 - Guoqiang Li, Yongfang Liu, Yuanjin Zheng:
Design of Magnetic Field Acquisition Probe and Front-End Signal Processing Circuit. 1-5 - Lei Lei, Zhiming Chen:
A Reconfigurable Fused Multiply-Accumulate For Miscellaneous Operators in Deep Neural Network. 1-5 - Xi Cheng, Shu Cao, Shangmei Wang, Xiaoyang Zeng, Wenhong Li, Mingyu Wang:
A 1024-Neuron 1M-Synapse Event-Driven SNN Accelerator for DVS Applications. 1-5 - Jay Shah, Nanditha Rao:
Hybrid Multi-tile Vector Systolic Architecture for Accelerating Convolution on FPGAs. 1-5 - Trio Adiono, Erwin Setiawan, Michael Jonathan, Rahmat Mulyawan, Nana Sutisna, Infall Syafalni, Wasiu O. Popoola:
FPGA Implementation of SFO for OFDM-based Network Enabled Li-Fi System. 1-5 - Rojin Salahi, Hossein Kassiri:
NMM-Based Patient-Specific Temporally-Adaptive Stimulation Optimization for Seizure Control. 1-5 - Shihang Tan, Jiayu Huang, Quanshu Yan, Lirong Zheng, Zhuo Zou:
A Near-Eye DVS-Based End-to-End Eye Tracking Processor for AR/VR Applications. 1-5 - Zhengyu Cai, Hamid Rahimian Kalatehbali, Ben Walters, Mostafa Rahimi Azghadi, Roman Genov, Amirali Amirsoleimani:
Advancing Image Classification with Phase-coded Ultra-Efficient Spiking Neural Networks. 1-5 - Jing Feng, Mei Wen, Xin Ju, Junzhong Shen, Yang Guo:
Enhancing the PE Utilization for Multi-Precision Systolic Array via Optimizing Computation Latency. 1-5 - Dengquan Li, Yexin Zhu, Longsheng Wang, Shubin Liu, Zhangming Zhu:
Low-Cost Linearity Testing of High-Resolution ADCs Using Segmentation Modeling and Partial Polynomial Fitting. 1-4 - Woobean Lee, Yoontae Jung, Hyuntak Jeon, Jimin Koo, Sein Oh, Soon-Jae Kweon, Minkyu Je:
An Area-Efficient, DC-Coupled VCO-Based CT ΔΣM with Input-TR-DAC for Neural Recording. 1-5 - Xiaoting Wang, Jingyu Liu, Xiaozhe Wang:
Efficient Probabilistic Optimal Power Flow Assessment Using an Adaptive Stochastic Spectral Embedding Surrogate Model. 1-5 - Riku Matsubara, Daisuke Kanemoto, Tetsuya Hirose:
Reducing Power Consumption in LNA by Utilizing EEG Signals as Basis Matrix in Compressed Sensing. 1-5 - Zichuan Yu, Lu Tang, Jianxun Li, Kai Wang, Yongchen Chen:
Interference Technology of Microphone Equipment Based on Time-Frequency Mosaic. 1-5 - Su Yeon Yun, Min Kyu Song, Soo Youn Kim:
Low-noise Image Sensors with Shifted Pseudo-correlated Multiple Sampling Method. 1-4 - Jing Liang, Xiaotao Jia, Yuanqi Hu:
Miniaturized and Integrated On-Chip Ag/AgCl Micro-electrodes for Chemical Detection. 1-5 - Chien-Cheng Tseng, Su-Ling Lee:
A Generalized Heat Kernel Smoothing Filter for Signal Denoising over Graph. 1-5 - Xingyu Lv, Rongyan Chen, Xian Tang:
A Circuit-Generator-Aided Design Methodology for GHz Pipelined SAR ADCs. 1-5 - Mohsin M. Jamali, Sepehr Arbabi, Hossein Hosseini, Lokesh Saharan:
Active Student Engagement in STEM Fields to Improve Retention and Graduation Rates. 1-5 - Hengjian Gao, Kaiwei Zhang, Wei Sun, Chunyi Li, Huiyu Duan, Xiaohong Liu, Xiongkuo Min, Guangtao Zhai:
PrefIQA: Human Preference Learning for AI-generated Image Quality Assessment. 1-5 - Victor Grimblatt:
Agriculture Impact on Climate Change and Climate Change Impact on Agriculture - Low Power Design. 1-5 - Andrea Mifsud, Adil Malik, Abdulaziz Alshaya, Peilong Feng, Timothy G. Constandinou
A Closed-Loop Readout Circuit with Voltage Drop Mitigation for Emerging Resistive Technologies. 1-5 - Gordana Jovanovic-Dolecek, Andres Rojas
Prospectives on the Use of ChatGPT in Education: Pros and Cons With a Classical Approach. 1-5 - Sangil Han, Jaehee Kim
Constrained Sorter Design using Zero-One Principle. 1-5 - Yu Li, Shan Cao, Beining Zhao, Wei Zhang, Zhiyuan Jiang:
Hybrid-Grained Pruning and Hardware Acceleration for Convolutional Neural Networks. 1-5 - Nandit Kaushik, L. Hemanth Krishna, Srinivasu Bodapati:
High-Speed Serial and Semi-Parallel IMPLY-based Approximate Adders through Memristors for In-Memory Computing. 1-5 - Bowen Hu, Weiyang He, Si Wang, Wenye Liu, Chip-Hong Chang:
Live Demonstration: Man-in-the-Middle Attack on Edge Artificial Intelligence. 1 - Jiahao Liu
A Tri-Loop Capacitor-Less LDO with Current Feedback Loop and Super Source Follower Achieving 8-mV Undershoot and 99-dB PSR. 1-5 - Tianyi Liu, Xuecheng Wang, Guolin Li, Milin Zhang:
Design and FPGA Implementation of a Light-Weight Calibration-Friendly Eye Gaze Tracking Algorithm. 1-5 - Yui Koyanagi, Tomoaki Ukezono, Toshinori Sato:
A Light-weight and Tamper-resistant AES Implementation by FPGAs. 1-5 - Kyosuke Yasuda, Masayuki Yamauchi:
Behavior of Phase-Inversion Waves on Coupled Van der Pol Oscillators as a Torus. 1-5 - Zhong Zhang, Zhangyuan Xie, Qi Yu, Kejun Wu, Jing Li, Ning Ning:
An Adaptive Common-Mode Cancellation Biopotential Amplifier for Two-Electrode Dynamic ECG Recording. 1-5 - Renas Ercan, Yunjia Xia, Yunyi Zhao, Rui C. V. Loureiro, Shufan Yang, Hubin Zhao:
A Real-Time Machine Learning Module for Motion Artifact Detection in fNIRS. 1-5 - Guido Di Patrizio Stanchieri, Orazio Aiello, Andrea De Marcellis:
A 0.4 V 180 nm CMOS Sub-μW Ultra-Compact and Low-Effort Design PWM-Based ADC. 1-5 - Benqing Guo, Jun Chen:
A CMOS Wideband Linear Low-Noise Amplifier Using Dual Capacitor-Cross-Coupled Configurations. 1-4 - Huiwen Shi, Yuchen Bao, Zihong He, Yongfu Li, Yanhan Zeng:
A 1.37 μW, 1.68 μVrms ECG AFE with Embedded DC-Servo Loop, Digital Calibration Unit and Three-State Ripple Reduction Loop. 1-5 - Takumi Owada, Kenya Jin'no:
Detection of Fake Images Focused on Few Local Blocks. 1-5 - Anamika Sharma, Luv Pandey, Paras Garg, Rajesh Zele:
Loop Filter Design Considerations for Noise-Shaping in SAR ADCs. 1-5 - Haidam Choi, Ji-Hoon Suh, Gichan Yun, Sein Oh, Song-I Cheon, Sohmyung Ha, Minkyu Je:
A Low-power Δ-ΔΣ-based Bio-impedance Readout IC with Capacitive-feedback Baseline Cancellation. 1-5 - Yu Lu, Hongwei Shen, Qingsong Zhang, Pengfei Jiang, Tianyue Sun, Yuxin Liao, Mengjiao Li, Hao Min:
A 91 dB SNDR Calibration-Free Fully-Passive Noise-Shaping SAR ADC with Mismatch Error Shaping. 1-5 - Xiang Cheng, Huihua Liu, Jingzhi Zhang, Yiming Yu, Yunqiu Wu, Chenxi Zhao, Kai Kang:
A Fast Transient Response Capless LDO Regulator Achieving -78 dB of PSR Up to 2 MHz. 1-5 - Jeong-Hoon Kim, Soumil Jain, Gopabandhu Hota, Jaeseoung Park, Ashwani Kumar, Duygu Kuzum, Gert Cauwenberghs:
Bio-plausible Learning-on-Chip with Selector-less Memristive Crossbars. 1-5 - Gayathri Malamal, Mahesh Raveendranatha Panicker:
FPGA based Adaptive Receive Apodization Design for Diagnostic Ultrasound Imaging. 1-4 - Ching-Wen Chiang, Neda Khiabani, Donglin Gao, Chien-Nan Kuo, Yen-Cheng Kuan, Chung-Tse Michael Wu:
A Ka- to W-Band Tightly Coupled Array Antenna-in-Package Using Glass IPD for Ultrawideband mmWave Wireless Communication. 1-5 - Haruka Matano, Haixin Wang, Jinjia Zhou:
An Iterative Image Inpainting Method Using Mask Shrinking. 1-5 - Sahar Ben Rached, Carmen G. Almudéver, Eduard Alarcón, Sergi Abadal:
Spatio-Temporal Characterization of Qubit Routing in Connectivity-Constrained Quantum Processors. 1-5 - Shuanghua Liu, Junming Zeng, Pantelis Georgiou
A Low Power Analogue Compressed Sensing Approach for CMOS ISFET Arrays. 1-5 - Anmol Singh Narwariya
REVBiT: REVerse Engineering of BiTstream for LUT Extraction & Logic Identification. 1-5 - Jiyu Xie, Li Li, Dong Liu, Houqiang Li:
Content-adaptive Variable Resolution Framework for Intra Coding. 1-5 - Cheng Gong, Chio-Hong Leong, Chi-Seng Lam:
Deterministic Policy Gradient based Reinforcement Learning for Current Control of Hybrid Active Power Filter. 1-5 - Andrea Boni, Edoardo Graiani, Valentina Bianchi, Ilaria De Munari, Michele Caselli:
A Wireless Biosensor Node for Real-Time Crop Monitoring in Precision Agriculture. 1-5 - Yousef Helal, Naomi Sagan, Drake Lin, Anmol Parande, Dominic Carrano, Babak Ayazifar:
Toward Scalable Laboratories in Signals and Systems: Content, Deployment, and Grading. 1-5 - Siyu Wang, David D. Wentzloff:
A 1.41µW Motion Sensing Front-End for Passive Infrared Sensors. 1-4 - Jung-An Liang, Jian-Jiun Ding:
Swin Transformer for Pedestrian and Occluded Pedestrian Detection. 1-5 - Zhenhui Dai, Jiawei Wang, Yi Zhong, Kunyu Feng, Cheng Zhao, Yuanyuan Jiang, Peiyu Chen
An Energy-Efficient Differential Frame Convolutional Accelerator with on-Chip Fusion Storage Architecture and Pixel-Level Pipeline Data Flow. 1-5 - Xinpeng Gui, Xinfa Zheng, Haigang Feng, Georges G. E. Gielen, Zhihua Wang, Xinpeng Xing:
A 70dB SNDR 20MHz-BW VCO-Based CT Sturdy MASH Delta-Sigma Modulator with Robust Quantization Error Extraction. 1-5 - Xin Lei, Hongwei Ma, Bin Liu, Zhen Li:
Power System Events Classification Technology Based on Deep-Learning. 1-5 - Yuxin Liu, Wenxin Yu, Zhiqiang Zhang, Qi Wang, Lu Che:
Axial Attention Transformer for Fast High-quality Image Style Transfer. 1-5 - Andrew Ensinger, Ramin Javadi
Minimum Power Point Design of Inverter Based Continuous Time Linear Equalizer (CTLE). 1-5 - Arpan Jain, Ashfakh Ali, Dheekshith Akula, Abhishek Pullela, Zia Abbas:
A Single-Point, Auto-Calibration Technique For PTAT/CTAT Resistance Based Current References. 1-5 - Cihan Ruan, Liang Yang, Rongduo Han, Shan Gao, Haoyu Wu, Nam Ling:
Robust DNA Image Storage Decoding with Residual CNN. 1-5 - Zhaofeng Zhong, Pathmapirian Nanthakumar, Gabriel Field, Chamira U. S. Edussooriya, Aleksandar Ignjatovic, Chamith Wijenayake
Acquisition and Processing of Chromatic Derivatives using FPGA-based Digital Hardware. 1-5 - Wei Jia, Kai Zhang, Yang Wang, Tianliang Fu, Yue Li, Li Zhang:
Geometry Transform of Intra-frames in ECM. 1-5 - Tianze Huang, Jiahao Lu, Dongsheng Liu, Aobo Li, Shuo Yang, Lei Chen, Xiang Li:
A Timing Attack Resistant Lightweight Post-Quantum Crypto-Processor for SPHINCS+. 1-5 - Pei Wang, Hongzhan Huang, Xiaotong Luo, Yanyun Qu:
Data-Free Learning for Lightweight Multi-Weather Image Restoration. 1-5 - Haoyun Zhao, Xiongfei Jiang, Shiwei Wang:
A 4th Order CIFB High Dynamic Range Sigma-Delta Modulator with Multi-level Quantizer and Intrinsically Linear Capacitive DACs. 1-5 - Zirui Jiang, Xiao Ji, Yiran He, Haihua Shen:
HWSim: Hardware Similarity Learning for Intellectual Property Piracy Detection. 1-5 - Yangyang Jiang, Chang Sun, Yongxiang Xia, Haicheng Tu, Chunshan Liu:
Fault Detection and Location of Transmission Lines Based on Convolutional Neural Network. 1-5 - Jung-Hye Hwang, Jubin Kang, Yongjae Park, Insang Son, Kieop Hong, Seong-Jin Kim:
An Indirect Time-of-Flight Sensor with Adaptive Multiple Sampling for High Depth Precision. 1-5 - Li-Wen Wang, Wan-Chi Siu, Yi-Hao Cheng, H. Anthony Chan:
Video Assisted Face Recognition in Smart Classroom. 1-5 - Joren Dumoulin, Pouya Houshmand, Vikram Jain, Marian Verhelst
Enabling Efficient Hardware Acceleration of Hybrid Vision Transformer (ViT) Networks at the Edge. 1-5 - Haitham M. Kanakri, Euzeli Cipriano dos Santos, Maher E. Rizkalla:
Capacitor-Less Buck-Boost Converter Using Integrated Planar Inductor-Capacitor Fabricated with Nanotechnology Processes. 1-5 - Xiaozhen Zheng, Yu Liu, Jianglin Wang, Zihao Ren, Shuyuan Zhu, Qingmin Liao:
Region Motion-based Adaptive Composite Long-Term Reference Coding for VVC. 1-5 - Yonghong Kuang, Yekan Chen, Tianyi Cai, Qi Zhang, Zipeng Cheng, Bo Zhao, Yuxuan Luo:
A One-Point-Trimmed 18.4 ppm/°C On-Chip Oscillator with Capacitively-Biased-Diode-based Quasi-Digital Temperature Compensation. 1-5 - Muhammad Hamis Haider, Stephany Valarezo-Plaza, Sayed Muhsin, Hao Zhang, Seok-Bum Ko:
Optimized Transformer Models: ℓ′ BERT with CNN-like Pruning and Quantization. 1-5 - Zhubin Xu, Tianlei Wang, Dekang Liu, Dinghan Hu, Huanqiang Zeng, Jiuwen Cao:
Audio-Visual Cross-Modal Generation with Multimodal Variational Generative Model. 1-5 - Anaam Ansari, Tokunbo Ogunfunmi:
A Multi-Stride Convolution Acceleration Algorithm for CNNs. 1-5 - An-Nan Xiong, Yuzhong Jiao, Xuejiao Liu, Manto Yung, Xianghong Hu, Luhong Liang, Jie Yuan, Mansun Chan:
An End-to-End Deep-Learning-Based Indirect Time-of-Flight Image Signal Processor. 1-5 - Pranjal Mahajan, Devansh Chaudhary, Mujeev Khan
A Point Cloud-Based Non-Intrusive Approach for Human Posture Classification by Utilizing 77 GHz FMCW Radar and Deep Learning Models. 1-5 - Tong Zhang, Dingguo Zhang, Jing Jin, Patrick P. Mercier, Hui Wang:
Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a Current-Source Transistor and a Resistive-Load Transistor. 1-5 - Shihang Lu, Zhuolin Peng, Zhuoling Xiao, Bo Yan, Shuisheng Lin, Sheng Yu, Di He:
GraSS: Graph Neural Networks for Loop Closure Detection with Semantic and Spatial Assistance. 1-5 - Jiaju Lu, Siqi Zhang, Wang Ling Goh, Yuan Gao:
A 99.8-dB SNDR 10kHz-BW Second-Order DT Delta-Sigma Modulator with Single OTA and Enhanced Noise-Coupling. 1-5 - Jordan Edwards, Luke Parker, Suma George Cardwell
Neural-Inspired Dendritic Multiplication Using a Reconfigurable Analog Integrated Circuit. 1-5 - Tai-Jung Hsu, Jhih-Hao Hong, Kuang-Wei Cheng:
28 GHz VCO Using Magnetically Tuning Trifilar Transformer in Cryogenic CMOS Application. 1-5 - Zhangyi Pei, Vishnu P. Nambiar, Yi Sheng Chong, Wang Ling Goh, Anh Tuan Do:
3881 Gbps/W, 3005 µm AES Core with State Based Clock Gating for IoT applications. 1-5 - Andrew Ash, John Hu
Improving High School Math Engagement with Circuit and Transistor Examples. 1-5 - Che-Hao Li, Tzu-Han Su, Chien-Nan Kuo:
A 4-7 GHz Broadband Cryogenic GaAs mHEMT LNA with a Flatness Gain Variation of ±1.2 dB. 1-4 - Astria Nur Irfansyah:
Leveraging Open Source IC Design Tools for an Undergraduate Microelectronic Circuit Design Course. 1-5 - Dominik Walter, Marcel Brand, Christian Heidorn, Michael Witterauf, Frank Hannig, Jürgen Teich:
ALPACA: An Accelerator Chip for Nested Loop Programs. 1-5 - Yang Wang, Chenhao Li, Qingyang Dong, Chunyue Bo, Xiuhao Wu, Ke Wei, Xinyu Liu, Weijun Luo:
A 14~18 GHz Compact Double-Pole Triple-Throw Switch Based Multi-Phase Integrated 6-bit Passive Phase Shifter. 1-5 - Shuyang Li, Xilang Zhou, Haodong Lu, Kun Wang:
DNNMapper: An Elastic Framework for Mapping DNNs to Multi-die FPGAs. 1-5 - Abdullah Alshehri, Khaled N. Salama
A 19 fJ/op, Low-Offset StrongARM Latch Comparator for Low-Power High-Speed Applications. 1-5 - Chia-Hua Hsu, Yu-Wei Lin, Kea-Tiong Tang:
A Low-Noise, Low-Power Neural Signal Amplifier for Deep Brain Stimulation System Chips Tolerating 3V Stimulation. 1-5 - Xuenong Hong, Zilong Hu, Han Zhang, Yee-Yang Tee, Tong Lin, Yiqiong Shi, Deruo Cheng, Bah-Hwee Gwee:
MLConnect: A Machine Learning Based Connection Prediction Framework for Error Correction in Recovered Circuit. 1-5 - Raúl Aparicio-Téllez
Novel PUF based on Generalized Galois Ring Oscillators with 10-15 EER and 0.53% BER. 1-5 - Takatoshi Inaba, Konosuke Hiraki, Takafumi Matsuura, Takayuki Kimura:
A routing method using chaotic neurodynamics for the transportation networks with the next generation vehicles. 1-5 - Yongliang Zhou, Zhen Yang, Yiming Wei, Xiao Lin, Saiai Wu, Wenjuan Lu, Chunyu Peng, Xin Li, Xiulong Wu:
A Timing-Shared Adaptive Sensing Methodology for Low-Voltage SRAM. 1-5 - Alberto Patiño-Saucedo, Roy Meijer, Paul Detterer, Amirreza Yousefzadeh
Co-optimized training of models with synaptic delays for digital neuromorphic accelerators. 1-5 - Trung-Khanh Le
A Probability Method to Estimate the State of a Digital Resonate-And-Fire Neuron without Running a Simulation. 1-5 - Richa Sharma, G. K. Sharma, Manisha Pattanaik:
Adversarial Label Flipping Attack on Supervised Machine Learning-Based HT Detection Systems. 1-5 - Taotao Wu, Yuxiao Zhao, Kuanfeng Tang, Haoyu Jiang, Wentao Liu, Tuo Hu, Meng Liu, Hanyang Wang, Hao Min:
Backscatter Sensing with Single-tag Path Variation Cancelling. 1-5 - Anqin Xiao, Xin Zhang, Jinqiao Yang, Lirong Zheng, Zhuo Zou:
Spiking-HDC: A Spiking Neural Network Processor with HDC Classifier Enabling Transfer Learning. 1-5 - P. J. Zhou, Q. Yu, M. Chen, Y. C. Wang, L. W. Meng, Y. Zuo, N. Ning, Y. Liu, S. G. Hu, G. C. Qiao:
A 0.96pJ/SOP, 30.23K-neuron/mm2 Heterogeneous Neuromorphic Chip With Fullerene-like Interconnection Topology for Edge-AI Computing. 1-5 - Sohyeon Kim, Injun Choi, Minkyu Je, Ji-Hoon Kim:
Dynamic Resource Management in Reconfigurable SoC for Multi-Tenancy Support. 1-5 - Kai Misselwitz, Friedel Gerfers:
A 16 GS/s Voltage-to-Time Conversion Sampler with 35.9 dB SNDR in 22 nm CMOS FDSOI. 1-5 - Koki Sone, Hiroyuki Torikai:
A Novel Design of Ergodic Sequential Logic Integrated Cochlear Model for Reproduction of Nonlinear Compression Characteristics of Mammalian Cochlea and Efficient Implementation. 1-5 - Yun-Chia Yu, Mao-Chi Weng, Ming-Guang Lin, An-Yeu Andy Wu:
Retraining-free Constraint-aware Token Pruning for Vision Transformer on Edge Devices. 1-5 - Chetan Vudadha:
Design of CNFET-based Ternary Conditional Sum Adders using Binary Carry Propagation. 1-5 - Yunosuke Takemae, Hiroyuki Torikai, Masaya Kudo, Koki Sone:
A Novel Hardware-Efficient Wireless Functional Electrical Stimulation Device Based on Nonlinear Dynamics of Ergodic Cellular Automaton. 1-5 - Yu-Ting Wu, Hung-Wen Tsai, Pau-Choo Chung, Chein-I Chang, Nien-Tsu Li, Yu-Xian Huang, Kuo-Sheng Cheng:
Domain Generalization with Anti-background Perturbation Consistency and Texture Reduction Ensemble Models for Hepatocyte Nucleus Segmentation. 1-5 - Majid Radman, Amir M. Sodagar:
High-CMRR, Operational Transconductance Amplifier for Low-Voltage Applications Based on a Degenerative Current TRAM. 1-5 - Nicoleta Cucu Laurencin, Charles Timmermans, Sorin Dan Cotofana
An Energy-Efficient Graphene-based Spiking Neural Network Architecture for Pattern Recognition. 1-5 - Niklas Klefe, Rudolf Ritter, Mahdi Rajabzadeh, Thomas Mayer, Maurits Ortmanns:
Overcoming Impedance-Mismatch Induced Offsets in Background Bond Wire Defect Detection. 1-5 - Qi-Fen Zeng, Chia-Hui Tien, Yung-Hui Chung:
A 105-dB SFDR 16-bit SAR ADC with a Window Capacitor Calibration Scheme. 1-4 - Da Shen, Zhongrong Wang, Fei He, Zhijie Sun, Ce Zhu, Yipeng Liu:
Epilepsy Detection with Personal Identification Based on Regularized O-minus Decomposition. 1-5 - Ziheng Jia, Xiongkuo Min, Guangtao Zhai:
DSA-QoE: Quality of Experience Evaluation for Streaming Video Based on Dual-Stage Attention. 1-5 - Russell Trafford, Dwaipayan Chakraborty, Ravi P. Ramachandran:
Early Impacts on Retention and Curriculum After Introducing A First-Year Experience Course. 1-5 - Buyuan Zhu, Qinglai Liu, Saihua Xu, Zhiping Lin:
A Simulated Annealing Based Approach for Near-Optimal Sensor Selection in TDOA Localization System. 1-5 - Lih-Yih Chiou, Hong-Ming Shih, Shun-Hsiu Hsu, Zu-Cheng Sheng, Soon-Jyh Chang:
Design and Analysis of an Energy-efficient Duo-Core SRAM-based Compute-in-Memory Accelerator. 1-4 - Pierre Courouve, Ali Al Shakoush, Cedric Dehos, Laurent Ouvry:
Artificial-Intelligence-Driven RF Carrier Aggregation Filter For 6G Application. 1-5 - Jie Zheng, Jienan Chen, Peizhi Lei, Zhaoting Ou, Zeyan Lu:
Fast Decoupling Capacitor Optimization for Power Delivery Network Based on Model and Data Fusion Method. 1-5 - Jie Tang, Shuai Wang, Song Chen, Yi Kang:
DP-FFN: Block-Based Dynamic Pooling for Accelerating Feed-Forward Layers in Transformers. 1-5 - Lingxiao Qian
A Highly Parallel Capacitive Sensing Circuit for High-Throughput Thin-Film Transistor Digital Microfluidic Chips. 1-5 - Ruijian Xu, Ning Jiang, Jialiang Tang, Xinlei Huang:
Adaptive Informative Semantic Knowledge Transfer for Knowledge Distillation. 1-5 - Jiebao Li, Yongfu Li, Yanhan Zeng:
A 5V-Input Sub-1V-Output Single-Inductor Multi-Path Hybrid Buck Converter Achieving 96.1% Peak Efficiency with 250mΩ DCR Inductor. 1-5 - Hardeep Kaur Takhar, Luiz Felipe Oliveira, Ljiljana Trajkovic:
Case Study: Understanding Internet Anomalies. 1-5 - Pengfei Qi, Yi Wang, Xue Feng, Yuanjin Zheng:
FIRNet: Forward-Inverse Reinforcement Network For Image Restoration Through Scattering Media. 1-5 - Chiang Liang Kok, Tee Hui Teo, Yit Yan Koh, Yuwei Dai, Boon Kang Ang, Jian Ping Chai:
Development and Evaluation of an IoT-Driven Auto-Infusion System with Advanced Monitoring and Alarm Functionalities. 1-5 - Andrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli:
An Enhanced Resubstitution Algorithm for Area-Oriented Logic Optimization. 1-5 - Fredrick Angelo R. Galapon, Anastacia B. Alvarez:
A Hyperdimensional Computing Architecture with 4.4x Energy Efficiency in 65nm CMOS. 1-5 - Ilkin Aliyev, Tosiron Adegbija:
PULSE: Parametric Hardware Units for Low-power Sparsity-Aware Convolution Engine. 1-5 - Muyao Wang, Bo Wang, Lu Jia, Haicheng Li, Xue Feng:
Flexible Integrated Circuits via Stress-minimized Layout and Ultra-thin Chip. 1-4 - Qingjiang Xia, You You, Yacong Zhang, Wengao Lu, Runkun Zhu, Zhongjian Chen:
A 27.5 fJ/step SAR Capacitance-to-Digital Converter Based on Correlated Double Sampling. 1-5 - Fei Yuan:
Gated Ring Oscillator Time Amplifier with Pico-Second Sensitivity and Applications in All-Digital Variable-Gain Time Integrator. 1-5 - Xiang Ke, Jin Chen, Jingjing Sun, Rikui Xiang, Wenjing Fang, Liangzun Fu, Xiwei Huang, Yan Xia, Jinhong Guo, Lingling Sun:
A Microfluidic Impedance Cytometer for Accurate Detection and Counting of Circulating Tumor Cells by Simultaneous Mechanical and Electrical Sensing. 1-5 - Samuel J. Murray, Joseph A. Schmitz, Sina Balkir, Michael W. Hoffman:
Curriculum Development for Tapeout-Ready Mixed-Signal System-on-Chip Design and Assembly. 1-5 - Daniel García-Lesta, Fernando Pardo, Óscar Pereira-Rial, Víctor M. Brea, Paula López, Diego Cabello:
Live Demonstration: A Mixed-Mode Signal CMOS Chip for Hyperdimensional Computing. 1 - Jiacong Qiu, Junrui Liang:
A Synchronous Current Inversion and Energy Extraction Circuit for Electromagnetic Energy Harvesting. 1-5 - Sora Togawa, Kenya Jin'no:
Examination of the Relationship between Feature Extraction by Kernels and CNN Performance. 1-5 - Jiaying Lin, Ryuji Nagazawa, Koichi Tokunaga, Kien Nguyen, Hiroo Sekiya, Hiroyuki Torikai, Won-Joo Hwang:
SNN Modeling of Cricket Auditory Network with Izhikevich Model Optimized by PSO. 1-5 - Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis:
DNA: DC Nodal Analysis Attack for Analog Circuits. 1-5 - Cancheng Xiao, Yuxuan Ma, Dingsong Jiang, Jianle Liu, Bingqian Song, Jianshi Tang, Huaqiang Wu, Tianxiang Nan
HXNOR-PBNN: A Scalable and Parallel Spintronics Synaptic Architecture for Probabilistic Binary Neural Networks. 1-5 - Nicholas Sica, Ragh Kuttappa, Vinayak Honkote, Baris Taskin:
High-Speed Phase-Based Computing. 1-5 - Vineeta Vasudevan Nair
High Voltage Transformer Condition Monitoring Using Memristive Echo State Networks. 1-5 - Takao Sawa, Takeshi Nakatani, Yosaku Maeda, Tatsuya Asou:
Data harvesting from seabed-mounted observation instruments using optical wireless communication on underewater drone. 1-5 - Marco Privitera, Andrea Ballo, Alfio Dario Grasso, Massimo Alioto:
A 15-nA quiescent current capacitor-less LDO for sub-1V μW-powered fully-harvested systems. 1-5 - Chia-Hsiang Chang, Pang-Cheng Chen, Hsiang-Chi Cheng, Chung-Hung Chen, Chun-Yen Lin, Chih-Ting Lin, Tsung-Hsien Lin:
A VCO-Based Readout ADC for Quasi-Static Sensing Applications in 3-µm Low-Temperature Poly-Silicon Thin-Film Transistor Technology. 1-5 - Tianma Shen, Wen-Hsiao Peng, Huang-Chia Shih, Ying Liu:
Learning-Based Conditional Image Compression. 1-5 - Feng Liu, Xianyue Zhao, Ziang Chen, Christopher Bengel, Nan Du
Realization of Reading-based Ternary Łukasiewicz Logic using Memristive Devices. 1-5 - Jian Yang, Kun Xiang, Haixin Wang, Yibo Fan, Jinjia Zhou:
ASAUN-CS: Adaptive Stage Activated Unfolding Network for Compressive Sensing. 1-5 - Kavitha S, Bhupendra S. Reniwal:
In-Memory Encryption using XOR-based Feistel Cipher in SRAM Array. 1-5 - Chen Chen, Fangzhen Jiang, Peng Wang, Yongli Chen, Yan Xiao, Fule Li, Xiang Xie:
A Reconfigurable Continuous-Time Delta-Sigma Modulator Structure Using Hybrid Loop Filter and Time-Interleaved Quantizer. 1-5 - Yunsong Tao
A Dithered-Digital-Mixing Background Timing-Skew Calibration Method for Time-Interleaved ADCs. 1-5 - Sara Alahmadi, Kasem Khalil, Haytham Idriss, Magdy A. Bayoumi:
Fortifying Strong PUFs: A Modeling Attack-Resilient Approach Using Weak PUF for IoT Device Security. 1-5 - Shengping Lv, Zhijie Chen, Peng Zhang, Peiyuan Wan, Liuxin Lv, Hanjun Jiang:
A Capacitor-Less LDO Regulator Compensated by Adaptive Zero for Zero-Load Stability Enhancement. 1-5 - Lu Liu, Tao Shi, Dan Wang, Nan Gu, Zhouhua Peng:
Finite Set Model Predictive Control for PWM Rectifiers Based on Data-driven Neural Network Predictor. 1-5 - Zidu Li, Phil David Börner, Soumya Shatakshi Panda, Maurice Müller, Andreas Bablich, Peter Haring Bolívar, Bhaskar Choubey:
Amorphous Silicon Single Photon Avalanche Diode Integrated with Memristor for Short Term Memory Based Rapid Passive Quenching. 1-5 - Zaitian Yang, Qiujin Chen, Shaowei Zhen, Mo Huang:
A LDO with 5-nA Quiescent Current and Improved Transient Response within a 50-mA Load Current Range. 1-5 - Yoshitaka Itoh:
Predicting a Critical Transition from Time-series Datasets Generated by LTspice Using a Parameter Space Estimation. 1-5 - Shen-Fu Hsiao, Tzu-Hsien Chao, Yen-Che Yuan, Kun-Chih Chen:
Hardware Accelerator for MobileViT Vision Transformer with Reconfigurable Computation. 1-4 - Zehao Li, Wenhao Lu, Yuncheng Lu, Junying Li, Yucen Shi, Yuanjin Zheng, Tony Tae-Hyoung Kim:
An Energy-Efficient Object Detection System in IoT with Dynamic Neuromorphic Vision Sensors. 1-5 - Corey Lammie, Athanasios Vasilopoulos, Julian Büchel, Giacomo Camposampiero, Manuel Le Gallo, Malte J. Rasch, Abu Sebastian:
Improving the Accuracy of Analog-Based In-Memory Computing Accelerators Post-Training. 1-5 - Junwen Zhang, Xiaopeng Yu, Zhenghao Lu, Nianxiong Nick Tan, Xinjie Wu, Chenxu Jiang, Haowei Lu, Zhong Tang:
A 2.1/5.2-NEF/PEF Capacitively Coupled Instrumentation Amplifier with Fast - Settling for Biosensor. 1-5 - Eunbin Park, Myungjun Jin, Youngjoo Lee:
Cost-Efficient SIMD ASIP Architecture for Mobile Touchscreen Controllers. 1-5 - Chithambara Moorthii J, Vinay Rayapati, Nanditha Rao, Manan Suri:
VPU-CIM: A 130nm, 33.98 TOPS/W RRAM based Compute-In-Memory Vector Co-Processor. 1-5 - Patrick Kurth, Philipp Scholz, Philipp Nickel, Urs Hecht, Enne Wittenhagen, Kai Misselwitz, Friedel Gerfers:
A mmw Low-Noise Sub-Sampling Phase-Locked Loop with a Non-Pulsed Charge Pump, Frequency Calibration and a Compact Ultra-High-Q Resonator. 1-5 - Philip C. Jose, Ying Xu, André van Schaik, Runchun Wang:
An FPGA Implementation of An Event-Driven Unsupervised Feature Extraction Algorithm for Pattern Recognition. 1-5 - Yanshu Guo, Wenqiang Huang, Yaoyu Li, Tian Tian, Yange Wang, Shiquan Wang, Zhihua Wang, Hanjun Jiang, Yuanjin Zheng:
A Cryogenic Phase-Selection Superconducting Qubit Controller with Envelope-Tracking in 28nm Bulk CMOS. 1-5 - Chun-Jen Shih, Jian-Jiun Ding:
Interpolation and Extrapolation by Prolate Spheroidal Wave Functions Using Nonuniform Division and Generalized Chirp Modulation. 1-5 - Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Khai-Duy Nguyen, Tetsuya Iizuka, Trong-Thuc Hoang, Cong-Kha Pham
A Unified OTP and PUF Exploiting Post-Program Current on Standard CMOS Technology. 1-5 - Wuyoung Jang, Sangho Lee, Jinhoon Jo, Jueun Jung, Donghyeon Han, Kyuho Lee
A 422.1 Mpixels/J Tile-based 4K Super Resolution Processor with Variable Bit Compression. 1-5 - Wenyu Peng, Willem D. van Driel
An Efficient Rectifier Hybridizing Synchronized Electric Charge Extraction and Bias-Flipping for Triboelectric Energy Harvesting. 1-5 - Reyhan Kevser Keser, Muhammet Sebul Beratoglu, Behçet Ugur Töreyin:
Generated Compressed Domain Images to the Rescue: Cross Distillation from Compressed Domain to Pixel Domain. 1-5 - Sicheng Sun, Yijiu Zhao, Yanze Zheng, Naixin Zhou, Yongling Ban:
A 1536-Element Ku-Band Dual-Polarized Transmit Phased Array for SATCOM Application. 1-5 - Biwei Li
Strengthening Critical Power Network Branches for Cascading Failure Mitigation. 1-5 - Ao Shi, Yizhou Zhang, Lixia Han, Zheng Zhou, Yiyang Chen, Lifeng Liu, Linxiao Shen, Peng Huang, Xiaoyan Liu, Jinfeng Kang:
Low Quantization Error Readout Circuit with Fully Charge-Domain Calculation for Computation-in-Memory Deep Neural Network. 1-5 - Wei-Chung Lin, Yung-Chi Chang, Yung-Hui Chung:
A 10b 400MS/s 2x-Time-Interleaved 2-Then-1b/Cycle SAR ADC in 90nm CMOS. 1-5 - Nishant Kumar, Hari Shanker Gupta, Anuj Srivastava, Nihar Ranjan Mohapatra:
A Programmable and Adaptive Dead-Time Controller for Low-Offset Output Generation for Cryo-Cooler Drive Applications. 1-5 - Yoomi Park, Sangjin Byun:
An 884MHz, -41.8dBm Input Power Sensitivity, 570-Stage CMOS RF-DC Rectifier With Ground Shielded Input Coupling Capacitors. 1-5 - Fukun Su, Mingqi Sun, Chao Wang, Xian Tang:
High-Precision Noise-Shaping SAR ADC using KT/C Noise Cancellation within CIFF Path for Brain-Machine Interface Application. 1-5 - Kenichi Okada:
Sub-THz CMOS Phased-Array Transceiver Design for 6G. 1-4 - Jooyeon Lee, Donghun Lee, Jaeha Kung:
A Ready-to-Use RTL Generator for Systolic Tensor Arrays and Analysis Using Open-Source EDA Tools. 1-5 - Prasha Srivastava, Pawan Kumar, Zia Abbas:
Enhancing ML model accuracy for Digital VLSI circuits using diffusion models: A study on synthetic data generation. 1-5 - He Wang, Qitong Wang, Leilei Huang, Chunqi Shi, Runxi Zhang:
A PCA Acceleration Algorithm For WiFi Sensing And Its Hardware Implementation. 1-5 - Hao You, Jianxiong Xu, Amirali Amirsoleimani, Mostafa Rahimi Azghadi, Roman Genov:
SAR-MemPipe: A Hybrid Pipeline-SAR Memristive ADC for Analog Resistive Arrays. 1-5 - Song-I Cheon, Seonghyun Park, Haidam Choi, Yebin Choi, Minho Seok, Young-Ho Cho, Sohmyung Ha, Minkyu Je:
Ultrahigh-G Accelerometer Readout IC with Adaptive Gain Path for Shock Resilience. 1-5 - Zhuoya Yan, Yingna Huang, Hailong Jiao:
A Low-Power Single-Phase Split-Controlled Flip-Flop With No Redundant Switching. 1-5 - Erxiang Ren
NS-Engine: Near-Sensor Neural Network Engine with SRAM-Based Compute-in-Memory Macro. 1-5 - Yutaro Komiyama, Wenqi Zhu, Akihiro Konishi, Kien Nguyen, Hiroo Sekiya:
Design of Class-Φ3 Power Oscillator. 1-5 - Yang Min, Yi Zhang, Tao Yang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Yonghui Lin, Huiyao Peng, Jingbo Shi, Nan Qi:
A 32Gb/s NRZ Low-Bias DFB Driver with Frequency Boosting for High Efficiency Data Transmission. 1-4 - Da Hyeon Jung, Min-Wu Jeong, Xuan Truong Nguyen, Chae-Eun Rhee:
A Resource-Constrained Spatio-Temporal Super Resolution Model. 1-5 - Renhe Chen, Albert Lee, Yongqi Hu, Hao Xu, Xufeng Kou:
A 12-bit 75 MS/s Asynchronous SAR ADC with Gain-Boosting Dynamic Comparator. 1-5 - Diogo Dias, João Goes, Tiago L. Costa:
A PVT-Robust Open-loop Gm-Ratio ×16 Gain Residue Amplifier for >1 GS/s Pipelined ADCs. 1-5 - Lech Kolonko, Jörg Velten, Anton Kummert:
Parallelized Hardware Acceleration of Automatic Differentiating Wave Digital Filters. 1-5 - Yuanyuan Jiang, Li Lun, Jiawei Wang, Mingqi Yin, Hanqing Liu, Zhenhui Dai, Xiaole Cui, Xiaoxin Cui:
SPAT: FPGA-based Sparsity-Optimized Spiking Neural Network Training Accelerator with Temporal Parallel Dataflow. 1-5 - Mihir Kavishwar
Massive MIMO Signal Detection using SRAM-based In-Memory Computing. 1-5 - Hantian Wu, Qing Shen, Wei Liu
2-D Wideband DOA Estimation with Circular Arrays Based on the Difference Co-Array Concept. 1-5 - Shahenda M. Abdelhafiz, Mohammed E. Fouda, Ahmed G. Radwan:
Battery Modeling with Mittag-Leffler Function. 1-4 - Yuxuan Zhang, Miaojing Shi, Taiyi Su, Hanli Wang:
Memory-Based Contrastive Learning with Optimized Sampling for Incremental Few-Shot Semantic Segmentation. 1-5 - Theodoros Panagiotis Chatzinikolaou, Ioannis K. Chatzipaschalis, Emmanouil Stavroulakis, Evangelos Tsipas, Iosif-Angelos Fyrigos, Antonio Rubio, Georgios Ch. Sirakoulis:
Variability Tolerance Analysis of Memristive Wave Cellular Automata. 1-5 - Ruijie Xi, Chenkang Xue, Jiping Li, Tianting Zhao, Mengjiao Li, Yong Ding, Wuhua Li, Wanyuan Qu:
A 60-nA IQ 96.5% Peak Efficiency Buck Converter with Wide Load Range for Internet of Things. 1-5 - Federico Bizzarri, Angelo Brambilla, Davide del Giudice, Daniele Linaro:
An Active-Perturbation Method to Estimate Online Inertia and Damping in Electric Power Systems. 1-5 - Binqiang Dan, Hui Qian, Zhongfeng Wang:
A High Dynamic Range Feedback Compensation Front-End for Unlimited Sampling ASDM ADC. 1-5 - Liyu Lin, Jingguo Wu, Xiaoyang Zeng, Yun Chen:
A Semi-Folded Based High-Power-Efficiency FFT for Frequency Offset Estimate. 1-5 - Liu Liu, Ann Franchesca Laguna, Michael T. Niemier, Xiaobo Sharon Hu:
Design of High-Performance and Compact CAM for Supporting Data-Intensive Applications. 1-5 - Alexander Meyer, Kaoru Yamashita, Adilet Dossanov, Martin Maier, Finn Stapelfeldt, Yerzhan Kudabay, Peter Toth, Fa Foster Dai, Hiroki Ishikuro, Vadim Issakov:
A 10-bit 100kS/s SAR ADC With a Monotonic Capacitor Switching Procedure for Single-Ended Inputs in 22nm CMOS FDSOI. 1-5 - Faxing Lei, Chao Liu, Wei Li, Ming-e Jing, Xiankui Xiong, Xuanpeng Zhu, Yibo Fan:
SFFTNet: Sparse Feature Fusion Transformer Network for Image Deblurring. 1-5 - Mirvala Sadrafshari, Octavia A. Dobre, Lihong Zhang:
Reinforcement-Learning-Based Foggy-Aware Optimal Placement Method for Analog and MixedSignal Circuits. 1-5 - Lakshmi Sarvaani P, Subba Ramkumar Reddy Annapalli, Vikramkumar Pudi:
Redefining Clock Network Construction: The Nested Flex Paradigm for Enhanced PPA Dynamics. 1-5 - Wei Qiu
Enhanced Student-graph Representation for At-risk Student Detection. 1-5 - Yukai Shen, Carlos Perez, Dietmar Straeussnigg, Eric Gutierrez:
Time-Encoded Mostly Digital Feature Extraction for Voice Activity Detection Tasks. 1-5 - Noor Faris Ali
Non-Invasive Continuous Real-Time Blood Glucose Estimation Using PPG Features-based Convolutional Autoencoder with TinyML Implementation. 1-5 - Jiwoo Kim, Gunho Park, Youngjoo Lee:
Low-Power Encoder and Compressor Design for Approximate Radix-8 Booth Multiplier. 1-5 - Hector A. Gonzalez, Marco Stolba, Bernhard Vogginger, Tim Rosmeisl, Chen Liu, Christian Mayr:
A Low-footprint FFT Accelerator for a RISC-V-based Multi-core DSP in FMCW Radars. 1-5 - Yuejiao Su, Yi Wang, Lei Yao, Lap-Pui Chau:
Few-shot Class-agnostic Counting with Occlusion Augmentation and Localization. 1-5 - Michael Pietzko
A 600MS/s 10-bit SAR ADC with unit via-based delta-length C-DAC in 22nm FDSOI. 1-5 - Hao-Chi Chiu, Vita Pi-Ho Hu:
Improved RF Performance with Buried Power Rail and Contact over Active Gate in Nanosheet FETs. 1-5 - Siyi Wang, Eugene Lim, Anupam Chattopadhyay:
Boosting the Efficiency of Quantum Divider through Effective Design Space Exploration. 1-5 - Zhen Gao, Jie Deng, Pedro Reviriego, Shanshan Liu, Fabrizio Lombardi:
Reducing the Energy Dissipation of Large Language Models (LLMs) with Approximate Memories. 1-5 - Fengshi Tian, Jiakun Zheng, Jingyu He, Jinbo Chen, Xiaomeng Wang, Chaoming Fang, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting Cheng:
BOLS: A Bionic Sensor-direct On-chip Learning System with Direct-Feedback-Through-Time for Personalized Wearable Health Monitoring. 1-5 - Luis Henrique Rodovalho, Orazio Aiello:
Inverter-Based Amplifier with Active Frequency Compensation and Adaptive Voltage Scaling. 1-5 - Yaohua Zhang, Bruno Grandi Sgambato, Jiaxing Zhang, Anette Jakob, Marc Fournelle, Mohamad Rahal, Meng-Xing Tang, Dario Farina, Dai Jiang, Andreas Demosthenous:
Live Demonstration: A Wearable Eight-Channel A-Mode Ultrasound System for Hand Gesture Recognition and Interactive Gaming. 1 - Muhao Li, Huizheng Wang, Yifei Shen, Xiaosi Tan, Chuan Zhang:
Code Length Compatible Belief Propagation Polar Decoder Based on Folding and Unfolding. 1-5 - Chia-Jung Lee, Chung-Lun Tu, Shyh-Jye Jou:
Online Self-Adaptive Estimation and Compensation Design for DC Voltage Offset, Frequency-Independent, and Frequency-Dependent IQ Mismatch in Sub-THz Digital Baseband Transceiver. 1-5 - Jiang Zhu
Fusing EO and LiDAR for SAR Image Translation with Multi-Modal Generative Adversarial Networks. 1-5 - John Hu
Research Experiences for Teachers on Chip Design. 1-5 - Sameer Vashishtha, Prashant Kumar Singh, Mohd. Rizvi, Paras Garg:
A Novel 2.7 pJ/bit, Low Supply, Power Efficient, Wide-Range 2.5-6 Gb/s Transmitter for 4-Channel High-Speed Serial Transmit Port (HSSTP) in 28nm FD-SOI Technology. 1-5 - Xipeng Xing, Qiji Huang, Tinghua Chen, Haigang Feng, Zhongfeng Wang:
A 14-bit 6GS/s DAC Achieving >65dBc SFDR with Bilateral Output Impedance Compensation in 22nm CMOS. 1-5 - Jiacheng Guo, Huiming Sun, Minghai Qin, Hongkai Yu, Tianyun Zhang:
A Min-Max Optimization Framework for Multi-task Deep Neural Network Compression. 1-5 - Jimin Koo, Yoontae Jung, Sein Oh, Sunglim Han, Sohmyung Ha, Minkyu Je:
A Reconfigurable Multimodal Sensor Interface IC Based on Direct-Conversion ΔΣ Modulator Structure. 1-5 - Christian C. Enz, Hung-Chi Han, Corentin Délignac, Thierry Taris:
A Comprehensive Output Conductance Model Valid in All Regions of Inversion. 1-5 - Santeri Porrasmaa
Analysis and Design of Constant-Slope Voltage-to-Time Converters. 1-5 - Kenta Yokoyama, Kenya Jin'no:
Performance Study by Changing the Internal Structure of Hysteresis Reservoir Computing. 1-5 - Mingzhong He, Yufei Ai, Wengao Lu, Yi Zhuo, Qingjiang Xia, Runkun Zhu, Yacong Zhang, Zhongjian Chen:
An Event-Driven High-Speed Imaging and Trace Detection ROIC for Cryogenic Infrared FPAs. 1-5 - Hao Chen, Xuyan Wang, Jinming Zhang, Xiao Han, Siqi Cai, Yaoyao Ye, Guanghui He:
MEIN: A Multicast-Efficient Interconnect Network for Multi-Chiplet DNN Accelerators. 1-5 - Sriharini Krishnakumar
Design Considerations for DC-DC Voltage Regulators in Distributed Vertical Power Delivery Systems. 1-5 - Chiyuan Zhang, Nan Chen, Douming Hu, Fang Zhu, Yuesheng Pu, Libin Yao:
A 0.002-mm2, 2.9-μW Pulse-Frequency-Modulation based Temperature Sensor with 40-mK Resolution. 1-4 - HongRui Song, Liang Xu, Ya Wang, Xiao Wu, Meiqi Wang, Zhongfeng Wang:
HSViT: A Hardware and Software Collaborative Design for Vision Transformer via Multi-level Compression. 1-5 - Prabodh Katti, Anagha Nimbekar, Chen Li, Amit Acharyya, Bashir M. Al-Hashimi, Bipin Rajendran:
Bayesian Inference Accelerator for Spiking Neural Networks. 1-5 - Paul Kaesser, Sebastian Kaltenstadler, Joschua Conrad, Johannes Wagner, Omar Ismail, Maurits Ortmanns:
Stability Prediction of Δ∑ Modulators using Artificial Neural Networks. 1-5 - Elizabeth George, Sruthi Pallathuvalappil, Alex Pappachen James:
Smart Clothing using Antenna and Memristive ANN. 1-5 - Yuxuan Jiang, Zhiqiang Xu, Esther Rodríguez-Villegas:
An Efficiency-Enhanced Active Rectifier with Offset-Controlled Comparators for WPT Systems. 1-5 - Fan Huang, Xiongkuo Min, Yuqin Cao, Xiao-Ping Zhang, Guangtao Zhai:
Multidimensional Similarity Fusion for Speech Quality Assessment. 1-5 - Walter D. Leon-Salas, Diana Narvaez-Bernal, Rodrigo Esparza, Gabriel Baquero:
Live Demonstration: Optical Communications using Solar Cells. 1 - Yanjie Pan, Simeng Yin, Xiaguang Li, Yixin Zhou, Keping Wang:
A Self-Powered P-SSHI Active Rectifier With Energy-Efficient Adaptive Switch Control for Piezoelectric Energy Harvesting. 1-5 - Hossein Sayadi, Zhangying He, Tahereh Miari, Mehrdad Aliasgari:
Redefining Trust: Assessing Reliability of Machine Learning Algorithms in Intrusion Detection Systems. 1-5 - Yanis Basso-Bert, William Guicquero, Anca Molnos, Romain Lemaire, Antoine Dupret:
On Class-Incremental Learning for Fully Binarized Convolutional Neural Networks. 1-5 - Nana Sutisna, Elkhan J. Brillianshah, Infall Syafalni, Muhammad Ogin Hasanuddin
Low-Complexity and High-Throughput Number Theoretic Transform Architecture for Polynomial Multiplication in Homomorphic Encryption. 1-5 - Yufei Sun, Wan Wang, Na Kang, Jing Fu, Xiaoya Fan, Yanzhao Ma:
A Fully Integrated LDO Using Synchronous VTC and Asynchronous Step Detection Recovery for Under-1 V Supply Voltage Application. 1-5 - Ran Zhang, Ka-Fai Un, Mingqiang Guo, Liang Qi, Dengke Xu, Weibing Zhao, Rui Paulo Martins, Franco Maloberti, Sai-Weng Sin:
A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation. 1-5 - Yu Wang, Haoyu Zhang, Wei Hu, Xin Zhang, Xinyu Tian, Fei Lyu
An Optimized Architecture for Computing the Square Root of Complex Numbers. 1-5 - Arpit Jain, Pabitra Das
ANN-based Accurate and Fast Post-Route QoR Data Prediction Methodology from Pre-Clock Tree Synthesis by Skipping CTS and Routing. 1-5 - Yujie Xian, Jiyi Liu, Shang Ma, Bowen Li, Runsen Yan, Mengtao Yang:
A DEM Structure Based on Random Combination Group Encoding toward a Reduced Circuit Area. 1-5 - Meng Guo, Yuekai Liu, Jinlei Pan, Liang Qi:
Comparative Study for Different Loop-Filter Architectures of 2x Time-Interleaved CT DSM. 1-5 - Lebin Li, Ning Jiang, Jialiang Tang, Xinlei Huang:
Amalgamating Knowledge for Comprehensive Classification with Uncertainty Suppression. 1-5 - Cheng Han, Shan Yu, Zhiwei Zhang, Jingna Mao:
A Lumped Circuit Model for Implantable Body-Coupled Channel. 1-5 - Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu:
Obfuscation of FSMs for Secure Outsourcing of Neural Network Inference onto FPGAs. 1-5 - Minki Jeong, Wanyeong Jung:
MAC-DO: DRAM-Based Multi-Bit Analog Accelerator Using Output Stationary. 1-5 - Changyan Chen, Rui Pan, Huajie Huang, Qing Zhang, Xuya Jiang, Yuhang Zhang, Jian Zhao, Yongfu Li:
PSCS: A Physiological Sound Compression System Based on Compressive Sensing with Self-Adaptive Compression Ratio and Optimized DCT. 1-5 - Rakesh Kumar Palani:
Analysis and design of Chopperless 7 ppm/°C Bandgap Voltage Reference. 1-4 - Feng Yan
A 0.816nW 12.3pS Tunable Low-Gm Transconductor for Bio-electrical Signal Acquisition. 1-5 - Feng-Ju Liao, Chung-Lun Tu, Shyh-Jye Jou:
Channel Estimation and Equalization Design with SNR Decision Based Universal Threshold for Sub-THz Single Carrier Baseband Receiver. 1-5 - Prema Kumar Govindaswamy, Mursina Khatun, Vijay Shankar Pasupureddi:
A 27-1, 20-Gb/s, 0.1-pJ/b Pseudo Random Bit Sequence Generator Using Incomplete Settling in 1.2V, 65 nm CMOS. 1-5 - Jiahao Liu, Leilei Huang, Shushi Chen, Wei Li, Yibo Fan:
An 8K@120fps Hardware Implementation for Decoder-Side Motion Vector Refinement in VVC. 1-5 - Yizhuo Wu
OpenDPD: An Open-Source End-to-End Learning & Benchmarking Framework for Wideband Power Amplifier Modeling and Digital Pre-Distortion. 1-5 - Chongxi Wang, Penghao Song, Haoyu Zhao, Fuxin Zhang, Jian Wang, Longbing Zhang:
High-Utilization GPGPU Design for Accelerating GEMM Workloads: An Incremental Approach. 1-5 - Charana Sonnadara, Sahil Shah:
On-Chip Adaptation for Reducing Mismatch in Analog Non-Volatile Device Based Neural Networks. 1-5 - Shigeki Matsumoto, Yuki Ichikawa, Nobuki Kajihara, Hakaru Tamukoh:
FPGA Implementation for Large Scale Reservoir Computing based on Chaotic Boltzmann Machine. 1-5 - An-Ting Hsieh, Ching-Te Chiu, Tsai-Chieh Chen, Mao-Hsiu Hsu, Wenyong Long:
Feature Points based Residual UNet with Nonlinear Decay Rate for Partial Wet Fingerprint Restoration and Recognition. 1-5 - Jiayang Li
A Current DAC Based Current Generator with Fourth-Order Current-Mode Filter for Electrical Impedance Tomography. 1-4 - Ling Hao, Keer Gao, Haoyu Bai
A 136μW Over 800m Range Backscatter-Like UHF Band Transceiver. 1-5 - Congpeng Du, Seok-Bum Ko, Hao Zhang:
Energy Efficient FPGA-Based Binary Transformer Accelerator for Edge Devices. 1-5 - Yuanrui Qi, Zejun Gan, Jinghao Ding, Zhaoqi Fu, Mengshi Gong, Wenxin Yu:
Track Assignment Using Gradient Indication and Simulated Annealing. 1-5 - Sanghyuk Seo, Yong-Un Jeong, Jaekwang Yun, Jaewook Kim, Suhwan Kim:
A 0.77-pJ/bit 40-Gb/s/pin Single-Ended Hybrid DAC-Based Transmitter for Memory Interfaces. 1-5 - Anil Kali, Samrat L. Sabat, Pramod Kumar Meher:
A Novel DA-Based Parallel Architecture for Inner-Product of Variable Vectors. 1-5 - Yuan-June Luo, Yu-Shan Tai, Ming-Guang Lin, An-Yeu Andy Wu:
Similarity-Aware Fast Low-Rank Decomposition Framework for Vision Transformers. 1-5 - Venu Birudu, Tirumalarao Kadiyam, Koteswararao Penumalli, Aditya Japa, Sushma Nirmala Sambatur, Chongyan Gu, Siva Sankar Yellampalli, Ramesh Vaddi:
Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices. 1-5 - Atharva Raut
A sub-100 nW Power, Compact CTDSM with a Band-To-Band Tunnelling Loop Filter. 1-5 - Farzad Sabahi, M. Omair Ahmad, M. N. S. Swamy:
Adaptive Weighting Feature Aggregation using Particle Swarm Optimization for Image Retrieval. 1-5 - Thomas Booij
Fast Mutual-Heating Prediction Method for Integrated Electronics and Photonics. 1-5 - Subrato Bharati
MAGNet: A Convolutional Neural Network with Multi-Scale and Global Attention Modules for Medical Image Segmentation. 1-5 - Bahareh Shirmohammadi, Reza Molavi, Shahriar Mirabbasi:
A Low-Power Non-Uniform Third-Derivative-Based Sampling Technique for ECG Applications. 1-5 - Wen Wang, Bingjie Xia, Bing Xiong, Xiaoxia Han, Peng Liu:
Mantissa-Aware Floating-Point Eight-Term Fused Dot Product Unit. 1-5 - Qiuyu Cheng, Yakun Zhou, Chentao Liang, Zuofeng Zhang, Jienan Chen:
A Hardware Efficient Matrix Multiplications Scheme with Dynamic Precisions and Dimensions for Massive MIMO Systems. 1-5 - Tobias Zekorn, Florian Schimkat, Kenny Vohl, Erik Wehr, Ralf Wunderlich, Stefan Heinen:
A High-Voltage Single-Inductor Multiple-Output DC-DC Buck Converter for the Power Management Unit of a Gate-Shaping Digital Gate Driver. 1-5 - Yung-Pei Li, Wei-Ting Bai, Tian-Wei Huang, Chien Chen, Yuh-Jing Hwang:
A 70-to-110 GHz 28-nm CMOS Low Noise Amplifier with 6.1-dB NF Minimum Using Differential Noise Optimization. 1-4 - Mario Costanza, Antonino Pagano, Samuel Margueron, Ilenia Tinnirello, Roberto La Rosa:
An Energy-Autonomous and Battery-Free Resistive Sensor using a Time-Domain to Digital Conversion with Bluetooth Low Energy connectivity. 1-5 - Phuc-Phan Duong, Trong-Thuc Hoang, Cong-Kha Pham
A Strong 4 × 4 S-Box Using an Enhanced Tent Map. 1-5 - Sourabh Panwar, Shobhit Srivastava, Shashidhara M, Nithin Chatterji, Prabhat Dubey, Deepak Joshi, Abhishek Acharya:
Proposal & Investigation of Schottky Ring Engineered Reconfigurable Nanowire Transistor. 1-4 - Jungyoun Kwak, Gihun Choe, Junmo Lee, Shimeng Yu:
Monolithic 3D Transposable 3T Embedded DRAM with Back-end-of-line Oxide Channel Transistor. 1-5 - Rung-Bin Lin, Pei-Sheng Lu:
Sub-10nm Standard Cell Library Design Methodology for On-Grid Pin Accesses. 1-5 - Shirin Qaisar, Muhammad Abrar Akram, Muhammad Haris Farooq, Soon-Jae Kweon, Hammad M. Cheema, Sohmyung Ha:
An Analog-assisted Fast-transient Digital LDO with a Charge-pump-based Fine Loop Achieving 0.14-mV Output Voltage Ripples. 1-5 - L. Hemanth Krishna, Nandit Kaushik, Srinivasu Bodapati:
Energy Efficient Accurate and Approximate Modified Adders for Ternary Multipliers. 1-5 - Sara Radfar, Glenn E. R. Cowan:
Interleaving Active Feedback in Inverter-Based Optical Receivers for Bandwidth Extension and Linearity Improvement. 1-5 - Yunzhe Yang, Qiujin Chen, Zaitian Yang, Sijun Du, Mo Huang:
A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction. 1-5 - Zhongkai Wang, Minsoo Choi, Paul Kwon, Zhaokai Liu, Bozhi Yin, Kyoungtae Lee, Kwanseo Park, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon:
A 24.6-29.6GHz Hybrid Sub-Sampling PLL with Tri-State Integral Path Achieving 44fs Jitter and -254.8dB FOM in 28nm CMOS. 1-5 - Antonio Aprile, Edoardo Bonizzoni, Piero Malcovati:
On the Segmentation of Gigasample Rate Current Steering DACs. 1-5 - Clint Sweeney, Donald Y. C. Lie, Jill C. Mayeda, Jerry Lopez:
Broadband High-Efficiency Watt-Level Millimeter-Wave GaN Power Amplifier for Potential Robust and Cost-Effective 5G RF Front-End Design. 1-4 - Yan-Cheng Guo, Tian-Sheuan Chang, Chih-Sheng Lin, Bo-Cheng Chiou, Chih-Ming Lai, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang:
CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device. 1-5 - Zhengyuan Lou, Meng Xu, Yuekang Guo, Jing Jin, Jianjun Zhou:
A Self-Calibrated Sampling Noise Cancellation Technique for Noise-Shaping SAR ADC. 1-5 - Kimi Jokiniemi, Kaisa Ryynänen, Joni Vähä, Kari Stadius, Jussi Ryynänen:
Analysis of Current-Commutating Passive and Active Mixers for mmWave Applications. 1-5 - Tsunato Nakai, Ryo Yamamoto:
Co-designing Trusted Execution Environment and Model Encryption for Secure High-Performance DNN Inference on FPGAs. 1-5 - Xu Ren, Liqiao Liu, Yandong He, Gang Du:
A Dual-Mode CMOS Image Sensor Based on in-Pixel Frame Differencing. 1-5 - Yi Sheng Chong, Hongyu Cao, Wang Ling Goh, Patrick Bore, Yuanzheng Paul Tan
Quantum Readout Processing Accelerator with a CORDIC Core at Cryogenic Temperature. 1-5 - Xinrun Xu, Zhanbiao Lian, Yurong Wu, Manying Lv, Zhiming Ding, Jin Yan, Shan Jiang:
A Multi-constraint and Multi-objective Allocation Model for Emergency Rescue in IoT Environment. 1-5 - Yunjia Xia, Elisabetta Maria Frijia, Rui C. V. Loureiro, Robert J. Cooper, Hubin Zhao:
An FPGA-based, multi-channel, real-time, motion artifact detection technique for fNIRS/DOT systems. 1-5 - Kaushik Bhattacharyya, Minxiang Gong, Muya Chang, Xin Zhang, Arijit Raychowdhury:
A 24/48V to 0.8V-1.2V All-Digital Synchronous Buck Converter with Package-Integrated GaN power FETs and 180nm Silicon Controller IC. 1-5 - Madhan Venkatesh, Gerardo Molina Salgado, Kevin G. McCarthy, Ivan John O'Connell:
A Low Power Programmable Switch Supply Dynamic Comparator. 1-5 - Yuguo Xiang
Hardware-Implemented Calibration Based on Sinusoidal Fitting for Hybrid Pipeline ADC. 1-5 - Asim Arif, Adedayo Adegbile, Qiraat Khan, Hamda Memon, Ibrahim M. Elfadel:
Live Demonstration: W3M Wearable Weight and Walk Monitoring System. 1 - Loai G. Salem:
A Wide-Bandwidth Supply Modulator using Binary Switched-Capacitor dc-to-dc Converters. 1-5 - Naoki Wakamiya:
Investigation of Influence of APCMA-based Wireless Communication on Neural Computation in Wireless Spiking Neural Networks. 1-4 - Zhengzhe Wei, Boyi Dong, Yuqi Su, Yi Wang, Chuanshi Yang, Yuncheng Lu, Chao Wang, Tony Tae-Hyoung Kim, Yuanjin Zheng:
A 2.793µW Near-Threshold Neuronal Population Dynamics Simulator for Reliable Simultaneous Localization and Mapping. 1-5 - Tsung-Han Wu, Ching Liang Yeh, Yi-Shan Huang, Shyh-Jye Jou:
A 128 Gb/s LDPC Decoder Using Partial Syndrome-based Dynamic Decoding Scheme for Terahertz Wireless Multi-Media Networks. 1-5 - Kuchul Jung, Jongseok Woo, Saibal Mukhopadhyay:
Enhancing IoT Security with a Hardware Accelerated Machine Learning Model coupling Autoencoder and Long-Short-Term-Memory for Anomaly Detection. 1-5 - Kamal Raj, Srinivasu Bodapati, Anupam Chattopadhyay:
PUF-based Lightweight Mutual Authentication Protocol for Internet of Things (IoT) Devices. 1-5 - Trong-Hung Nguyen
Unified-pipelined NTT Architecture for Polynomial Multiplication in Lattice-based Cryptosystems. 1-5 - Xuguang Zhang, Jiawen Xue, Wei Song, Guolin Li, Xiang Xie:
Improved Camera Calibration Method Using Complementary Patterns. 1-5 - Yue Wang, Aiying Guo, Jianhua Zhang, Jingjing Liu:
A Constant-Quiescent-Current and Fast-Transient CL-LDO with 99.99% Efficiency Using Dynamic Embedded Slew-Rate Enhancement Circuit. 1-5 - Emeric Perez, Carlos Augusto Berlitz, Yasser Moursy, Sami Oukassi, Bruno Allard, Gaël Pillonnet:
Miniaturized Solid-State Battery-Based DC-DC Switched Converter. 1-5 - Wenyi Wang, Yingzhan Xu, Bharath Vishwanath, Kai Zhang, Li Zhang:
Improved Geometry Coding for Spinning LiDAR Point Cloud Compression. 1-5 - Marwane Rezzouki, Guillaume Ferré, Guillaume Terrasson, Alvaro Llaria:
Net Fishing Localization: Performance of TDOA-based Positioning Technique in Underwater Acoustic Channels Using Chirp Signals. 1-5 - Kai Cui, Fantao Wang, Ba Peng, Xiaoya Fan, Yanzhao Ma:
A 6.78MHz Wireless Power Transfer System With Efficient Global Hysteresis Control for Implantable Medical Devices. 1-5 - Daniel De Dorigo, Roman Willaredt, Christoph Grandauer
A Compact Low-Power Bidirectional Two-Wire Interface for Digital Neural Probes. 1-5 - Mengzhe Han, Xiaotao Jia, Zihao Zhao, Yingchun Hu:
Hierarchical Placement Algorithm for Analog Circuit With Polygonal Modules. 1-5 - Soham Lakhote, Easha, Gaurab Banerjee:
A Dual-Slope BlueFMCW Radar for Simultaneous Mitigation Against Close-in DRFM and Frequency Domain Spoofing Attacks. 1-5
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