A simple AMU using HBL2 as package.

A fork of Xiangshan for AI

Development repository for the Triton language and compiler

An experimental CPU backend for Triton

GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as…

🌟 Wiki of OI / ICPC for everyone. （某大型游戏线上攻略，内含炫酷算术魔法）

The Unified TileLink Memory Subsystem Tester for XiangShan

关于移植模型至gemmini的文档

A matrix extension proposal for AI applications under RISC-V architecture

Gemmini extensions for Spike

RTL, Cmodel, and testbench for NVDLA

LLM Inference with Deep Learning Accelerator.

eyeriss-chisel3

Fast and memory-efficient exact attention

Medusa: Simple Framework for Accelerating LLM Generation with Multiple Decoding Heads

交易模块

A flexible framework powered by ComfyUI for generating personalized Nobel Prize images.

Lectures for the Agile Hardware Design course in Jupyter Notebooks

The original sources of MS-DOS 1.25, 2.0, and 4.0 for reference purposes

体系结构研讨 + ysyx高阶大纲 (WIP

Cact Compiler for UCAS Compiler Lab

⭐Github Ranking⭐ Github stars and forks ranking list. Github Top100 stars list of different languages. Automatically update daily. | Github仓库排名，每日自动更新

RISC-V Instruction Set Manual

GPGPU processor supporting RISCV-V extension, developed with Chisel HDL

A high-throughput and memory-efficient inference and serving engine for LLMs