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1. Verilog-Floating-Point-Clock-Divider Verilog-Floating-Point-Clock-Divider Public

   Forked from BrianHGinc/Verilog-Floating-Point-Clock-Divider

   Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter using fractional floating point division.

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2. Ecko Ecko Public

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3. AMPA_APB4_Protocol AMPA_APB4_Protocol Public

   Forked from MohamedHussein27/AMPA_APB4_Protocol

   This Repository contains the Implementation of the AMBA APB4 Protocol with Verilog, featuring an APB master, APB slave with cache memory, and comprehensive testbenches. Includes scripts for fast si…

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4. delta_sigma delta_sigma Public

   Forked from Matlab-Toolbox/delta_sigma

   Ported the toolbox from [MatlabCentral](http://www.mathworks.co.uk/matlabcentral/fileexchange/19-delta-sigma-toolbox).

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5. asciiflow asciiflow Public

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6. obi obi Public

   Forked from pulp-platform/obi

   OBI SystemVerilog synthesizable interconnect IPs for on-chip communication

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