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5 stars written in SystemVerilog
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A minimal GPU design in Verilog to learn how GPUs work from the ground up

SystemVerilog 12,343 1,165 Updated Aug 18, 2024

RSD: RISC-V Out-of-Order Superscalar Processor

SystemVerilog 1,170 119 Updated Feb 21, 2026

Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer

SystemVerilog 400 48 Updated Oct 2, 2025

FX68K 68000 cycle accurate SystemVerilog core

SystemVerilog 162 35 Updated Jun 1, 2021

A small RISC-V core (SystemVerilog)

SystemVerilog 33 2 Updated Aug 26, 2019