Implementation of 4-bit Arithmetic Logic Unit using structural modeling in Verilog. Features 8 operations controlled by 3-bit select line. Simulated on EDA Playground with waveform analysis.
Ripple carry 4-bit Arithmetic Logic Unit with 8 operations.
| sel | Operation |
|---|---|
| 000 | ADD |
| 001 | SUB |
| 010 | AND |
| 011 | OR |
| 100 | XOR |
| 101 | NOR |
| 110 | NAND |
| 111 | XNOR |
- Open EDA Playground
- Upload
design.vandtestbench.v - Simulator: Icarus Verilog 0.12
- Top Module: tb_alu_4bit