VHDL 2008/93/87 simulator

A huge VHDL library for FPGA and digital ASIC development

Basic RISC-V CPU implementation in VHDL.

Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.

FPGA based microcomputer sandbox for software and RTL experimentation

Framework to simplify porting MiSTer (and other) cores to the MEGA65

LinuxCNC FPGA board port to LiteX

An all-digital GPS disciplined oscillator using MMCM phase shift.

This repository is a collection of designs invloving FPGAs and AI technologies.

A collection of HLS IP designs for Zybo-Z2