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2 stars written in SystemVerilog
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verilator / verilator

Verilator open-source SystemVerilog simulator and lint system

SystemVerilog 3,338 749 Updated Feb 4, 2026

lowRISC / ariane

Forked from openhwgroup/cva6

Ariane is a 6-stage RISC-V CPU

SystemVerilog 153 28 Updated Dec 4, 2019