This repo is for the Linkedin Learning course: C++ Design Patterns: Structural

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

XLS: Accelerated HW Synthesis

Qdrant - High-performance, massive-scale Vector Database and Vector Search Engine for the next generation of AI. Also available in the cloud https://cloud.qdrant.io/

Implement a ChatGPT-like LLM in PyTorch from scratch, step by step

Fair-code workflow automation platform with native AI capabilities. Combine visual building with custom code, self-host or cloud, 400+ integrations.

Modern C++ Programming Course (C++03/11/14/17/20/23/26)

CodiMD - Realtime collaborative markdown notes on all platforms.

📐 Jekyll theme for building a personal site, blog, project documentation, or portfolio.

GPT4All: Run Local LLMs on Any Device. Open-source and available for commercial use.

Verilator open-source SystemVerilog simulator and lint system

Algorithmic C Datatypes

D3 Sankey Diagram Generator with self-loops

🌊 Digital timing diagram rendering engine

A complete computer science study plan to become a software engineer.

Ariane is a 6-stage RISC-V CPU

Animation engine for explanatory math videos

Comprehensive Python Cheatsheet

Kaitai Struct: declarative language to generate binary data parsers in C++ / C# / Go / Java / JavaScript / Lua / Nim / Perl / PHP / Python / Ruby / Rust

Sionna: An Open-Source Library for Research on Communication Systems

Genetic Algorithm, Particle Swarm Optimization, Simulated Annealing, Ant Colony Optimization Algorithm,Immune Algorithm, Artificial Fish Swarm Algorithm, Differential Evolution and TSP(Traveling sa…

Source codes of the article "Deep CNN-Based Channel Estimation for mmWave Massive MIMO Systems" in IEEE JSTSP

PicoRV32 - A Size-Optimized RISC-V CPU

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Chisel: A Modern Hardware Design Language

GNU toolchain for RISC-V, including GCC