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Dynamic indexed part-select writes to packed structs import successfully but fail to lower because moore.dyn_extract_ref only handles integer and array references. Allow llhd.sig.extract to project bits of statically sized aggregates using the hw.bitcast layout, and use it to lower dynamic packed struct references. Keep the projection as an alias so that partial writes preserve other bits. Teach Mem2Reg to flatten aggregate values when resolving bit projections and restore their types after updates. Preserve reference types when folding full-width extracts, and conservatively decline SROA and CombineDrives transformations that would confuse aggregate indices with bit offsets. Add conversion, verifier, canonicalization, transformation, and end-to-end regressions covering cross-field writes, nested aggregates, and nonblocking assignments. Validation: 101 lit tests passed with one pre-existing expected failure. The original reproducer passes Moore, LLHD, and HW lowering. Additional local Verilator checks pass 11,264 input sequences both with and without SROA. Formatting and whitespace checks pass; full check-circt was not run. Assisted-by: Codex:GPT-6
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Results of circt-tests run for c3987e4 compared to results for de58b29: sv-testsChanges in emitted diagnostics:
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Dynamic indexed part-select writes such as
payload[i * 32 +: 32] = laneimport successfully when
payloadis a packed struct, but fail in MooreToCorebecause
moore.dyn_extract_refonly lowers integer and array references.Allow
llhd.sig.extractto project bits of a statically sized aggregate usingthe same layout as
hw.bitcast, and use this operation for dynamic packedstruct references in MooreToCore. The projection continues to alias the source
signal, so a partial write only updates the selected bits. Struct ports and
named field accesses retain their types.
Mem2Reg flattens aggregate values when resolving bit projections and restores
the aggregate type when packing updates. Full-width extracts retain their
reference type, and SROA and CombineDrives conservatively decline transformations
that would confuse aggregate element indices with bit offsets.
Regression coverage includes the original lane-write reproducer, cross-field
updates, nested struct and array layouts, a struct-valued field selected within
another struct, nonblocking assignments, operation verification and round trips,
and the affected LLHD transformations.
Validation on macOS arm64, Release with assertions and the slang frontend:
These suites contain 102 tests: 101 passed and one expected failure. The original
reproducer now succeeds with
--ir-moore,--ir-llhd, and--ir-hw. Changedfiles pass
git clang-formatandgit diff --check.Additional local Verilator checks compare the exported circuit with an
independent bit-mask reference for 11,264 input sequences, both with and without
SROA. They cover ascending and descending selects, single-bit writes, nested
struct fields, preservation of unselected bits, and overlapping nonblocking
assignments. The full
check-circtsuite was not run.Assisted-by: Codex:GPT-6